1#
2# Topology for generic Apollolake UP^2 with pcm512x codec and HDMI.
3#
4
5# if XPROC is not defined, define with default pipe
6ifdef(`DMICPROC', , `define(DMICPROC, eq-iir-volume)')
7ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, eq-iir-volume)')
8
9# if CHANNELS is not defined, define with default 2ch. Note that
10# it can be overrode with DMIC_DAI_CHANNELS, DMIC_PCM_CHANNELS
11# in intel-generic-dmic.m4. Same macros exist for DMIC16K too.
12ifdef(`CHANNELS', , `define(CHANNELS, 2)')
13
14# Include topology builder
15include(`utils.m4')
16include(`dai.m4')
17include(`pipeline.m4')
18include(`ssp.m4')
19include(`hda.m4')
20
21# Include TLV library
22include(`common/tlv.m4')
23
24# Include Token library
25include(`sof/tokens.m4')
26
27# Include Apollolake DSP configuration
28include(`platform/intel/bxt.m4')
29
30define(`SSP_SCHEDULE_TIME_DOMAIN',
31	ifdef(`CODEC_MASTER', SCHEDULE_TIME_DOMAIN_DMA, SCHEDULE_TIME_DOMAIN_TIMER))
32
33DEBUG_START
34
35#
36# Define the pipelines
37#
38# PCM0 <---> volume <----> SSP5 (pcm512x)
39# PCM5 ----> volume -----> iDisp1
40# PCM6 ----> volume -----> iDisp2
41# PCM7 ----> volume -----> iDisp3
42# PCM4 ----> volume -----> Media Playback 4
43# PCM1 <------------------ DMIC0 (DMIC)
44# PCM2 <------------------ DMIC1 (DMIC16kHz)
45#
46
47dnl PIPELINE_PCM_ADD(pipeline,
48dnl     pipe id, pcm, max channels, format,
49dnl     period, priority, core,
50dnl     pcm_min_rate, pcm_max_rate, pipeline_rate,
51dnl     time_domain, sched_comp)
52
53# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
54# Set 1000us deadline on core 0 with priority 0
55PIPELINE_PCM_ADD(sof/pipe-low-latency-playback.m4,
56	1, 0, 2, s32le,
57	1000, 0, 0,
58	FSYNC, FSYNC, FSYNC)
59
60# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s32le.
61# 1000us deadline on core 0 with priority 0
62PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
63	6, 0, 2, s32le,
64	1000, 0, 0,
65	FSYNC, FSYNC, FSYNC)
66
67# Low Latency playback pipeline 2 on PCM 5 using max 2 channels of s32le.
68# 1000us deadline on core 0 with priority 0
69PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
70	2, 5, 2, s32le,
71	1000, 0, 0,
72	48000, 48000, 48000)
73
74# Low Latency playback pipeline 3 on PCM 6 using max 2 channels of s32le.
75# 1000us deadline on core 0 with priority 0
76PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
77	3, 6, 2, s32le,
78	1000, 0, 0,
79	48000, 48000, 48000)
80
81# Low Latency playback pipeline 4 on PCM 7 using max 2 channels of s32le.
82# 1000us deadline on core 0 with priority 0
83PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
84	4, 7, 2, s32le,
85	1000, 0, 0,
86	48000, 48000, 48000)
87
88# platform/intel/intel-generic-dmic.m4 uses DAI link IDs for PCM IDs so we have
89# to use PCM1 and PCM2 for DMICs.
90
91ifelse(CHANNELS, `0', ,
92`
93define(DMIC_PCM_48k_ID, `1')
94define(DMIC_PCM_16k_ID, `2')
95define(DMIC_DAI_LINK_48k_ID, `1')
96define(DMIC_DAI_LINK_16k_ID, `2')
97define(DMIC_PIPELINE_48k_ID, `7')
98define(DMIC_PIPELINE_16k_ID, `8')
99include(`platform/intel/intel-generic-dmic.m4')
100'
101)
102
103#
104# DAIs configuration
105#
106
107dnl DAI_ADD(pipeline,
108dnl     pipe id, dai type, dai_index, dai_be,
109dnl     buffer, periods, format,
110dnl     deadline, priority, core, time_domain)
111
112# playback DAI is SSP5 using 2 periods
113# Buffers use s24le format, 1000us deadline on core 0 with priority 0
114DAI_ADD(sof/pipe-dai-playback.m4,
115	1, SSP, 5, SSP5-Codec,
116	PIPELINE_SOURCE_1, 2, s24le,
117	1000, 0, 0, SSP_SCHEDULE_TIME_DOMAIN)
118
119# capture DAI is SSP5 using 2 periods
120# Buffers use s16le format, 1000us deadline on core 0 with priority 0
121DAI_ADD(sof/pipe-dai-capture.m4,
122	6, SSP, 5, SSP5-Codec,
123	PIPELINE_SINK_6, 2, s24le,
124	1000, 0, 0, SSP_SCHEDULE_TIME_DOMAIN)
125
126# Media playback pipeline 5 on PCM 4 using max 2 channels of s16le.
127# Set 1000us deadline on core 0 with priority 0
128PIPELINE_PCM_ADD(sof/pipe-pcm-media.m4,
129	5, 4, 2, s16le,
130	1000, 0, 0,
131	8000, 96000, FSYNC,
132	SSP_SCHEDULE_TIME_DOMAIN,
133	PIPELINE_PLAYBACK_SCHED_COMP_1)
134
135# Connect pipelines together
136SectionGraph."media-pipeline" {
137	index "0"
138
139	lines [
140		dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_5)
141	]
142}
143
144# playback DAI is iDisp1 using 2 periods
145# Buffers use s32le format, 1000us deadline on core 0 with priority 0
146DAI_ADD(sof/pipe-dai-playback.m4,
147	2, HDA, 0, iDisp1,
148	PIPELINE_SOURCE_2, 2, s32le,
149	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
150
151# playback DAI is iDisp2 using 2 periods
152# Buffers use s32le format, 1000us deadline on core 0 with priority 0
153DAI_ADD(sof/pipe-dai-playback.m4,
154	3, HDA, 1, iDisp2,
155	PIPELINE_SOURCE_3, 2, s32le,
156	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
157
158# playback DAI is iDisp3 using 2 periods
159# Buffers use s32le format, 1000us deadline on core 0 with priority 0
160DAI_ADD(sof/pipe-dai-playback.m4,
161	4, HDA, 2, iDisp3,
162	PIPELINE_SOURCE_4, 2, s32le,
163	1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
164
165# PCM Low Latency, id 0
166dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
167PCM_DUPLEX_ADD(Port5, 0, PIPELINE_PCM_1, PIPELINE_PCM_6)
168PCM_PLAYBACK_ADD(HDMI1, 5, PIPELINE_PCM_2)
169PCM_PLAYBACK_ADD(HDMI2, 6, PIPELINE_PCM_3)
170PCM_PLAYBACK_ADD(HDMI3, 7, PIPELINE_PCM_4)
171
172#
173# BE configurations - overrides config in ACPI if present
174#
175
176dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
177#SSP 5 (ID: 0)
178ifdef(`CODEC_MASTER',
179`
180DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
181	SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
182		SSP_CLOCK(bclk, eval(FSYNC * 64), codec_master),
183		SSP_CLOCK(fsync, FSYNC, codec_master),
184		SSP_TDM(2, 32, 3, 3),
185		SSP_CONFIG_DATA(SSP, 5, 24)))
186'
187,
188`
189DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
190	SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
191		SSP_CLOCK(bclk, 3072000, codec_slave),
192		SSP_CLOCK(fsync, 48000, codec_slave),
193		SSP_TDM(2, 32, 3, 3),
194		SSP_CONFIG_DATA(SSP, 5, 24)))
195'
196)
197
198# 3 HDMI/DP outputs (ID: 3,4,5)
199DAI_CONFIG(HDA, 0, 3, iDisp1,
200	HDA_CONFIG(HDA_CONFIG_DATA(HDA, 0, 48000, 2)))
201DAI_CONFIG(HDA, 1, 4, iDisp2,
202	HDA_CONFIG(HDA_CONFIG_DATA(HDA, 1, 48000, 2)))
203DAI_CONFIG(HDA, 2, 5, iDisp3,
204	HDA_CONFIG(HDA_CONFIG_DATA(HDA, 2, 48000, 2)))
205
206DEBUG_END
207