1 /* SPDX-License-Identifier: BSD-3-Clause 2 * 3 * Copyright(c) 2018 Intel Corporation. All rights reserved. 4 * 5 * Author: Liam Girdwood <liam.r.girdwood@linux.intel.com> 6 * Keyon Jie <yang.jie@linux.intel.com> 7 */ 8 9 /* 10 * Topology IDs and tokens. 11 * 12 * ** MUST BE ALIGNED WITH TOPOLOGY CONFIGURATION TOKEN VALUES ** 13 */ 14 15 #ifndef __KERNEL_TOKENS_H__ 16 #define __KERNEL_TOKENS_H__ 17 18 /* 19 * Kcontrol IDs 20 */ 21 #define SOF_TPLG_KCTL_VOL_ID 256 22 #define SOF_TPLG_KCTL_ENUM_ID 257 23 #define SOF_TPLG_KCTL_BYTES_ID 258 24 #define SOF_TPLG_KCTL_SWITCH_ID 259 25 #define SOF_TPLG_KCTL_BYTES_VOLATILE_RO 260 26 #define SOF_TPLG_KCTL_BYTES_VOLATILE_RW 261 27 #define SOF_TPLG_KCTL_BYTES_WO_ID 262 28 29 /* 30 * Tokens - must match values in topology configurations 31 */ 32 33 /* buffers */ 34 #define SOF_TKN_BUF_SIZE 100 35 #define SOF_TKN_BUF_CAPS 101 36 37 /* DAI */ 38 /* Token retired with ABI 3.2, do not use for new capabilities 39 * #define SOF_TKN_DAI_DMAC_CONFIG 153 40 */ 41 #define SOF_TKN_DAI_TYPE 154 42 #define SOF_TKN_DAI_INDEX 155 43 #define SOF_TKN_DAI_DIRECTION 156 44 45 /* scheduling */ 46 #define SOF_TKN_SCHED_PERIOD 200 47 #define SOF_TKN_SCHED_PRIORITY 201 48 #define SOF_TKN_SCHED_MIPS 202 49 #define SOF_TKN_SCHED_CORE 203 50 #define SOF_TKN_SCHED_FRAMES 204 51 #define SOF_TKN_SCHED_TIME_DOMAIN 205 52 53 /* volume */ 54 #define SOF_TKN_VOLUME_RAMP_STEP_TYPE 250 55 #define SOF_TKN_VOLUME_RAMP_STEP_MS 251 56 57 /* SRC */ 58 #define SOF_TKN_SRC_RATE_IN 300 59 #define SOF_TKN_SRC_RATE_OUT 301 60 61 /* ASRC */ 62 #define SOF_TKN_ASRC_RATE_IN 320 63 #define SOF_TKN_ASRC_RATE_OUT 321 64 #define SOF_TKN_ASRC_ASYNCHRONOUS_MODE 322 65 #define SOF_TKN_ASRC_OPERATION_MODE 323 66 67 /* PCM */ 68 #define SOF_TKN_PCM_DMAC_CONFIG 353 69 70 /* Generic components */ 71 #define SOF_TKN_COMP_PERIOD_SINK_COUNT 400 72 #define SOF_TKN_COMP_PERIOD_SOURCE_COUNT 401 73 #define SOF_TKN_COMP_FORMAT 402 74 /* Token retired with ABI 3.2, do not use for new capabilities 75 * #define SOF_TKN_COMP_PRELOAD_COUNT 403 76 */ 77 #define SOF_TKN_COMP_CORE_ID 404 78 #define SOF_TKN_COMP_UUID 405 79 80 /* SSP */ 81 #define SOF_TKN_INTEL_SSP_CLKS_CONTROL 500 82 #define SOF_TKN_INTEL_SSP_MCLK_ID 501 83 #define SOF_TKN_INTEL_SSP_SAMPLE_BITS 502 84 #define SOF_TKN_INTEL_SSP_FRAME_PULSE_WIDTH 503 85 #define SOF_TKN_INTEL_SSP_QUIRKS 504 86 #define SOF_TKN_INTEL_SSP_TDM_PADDING_PER_SLOT 505 87 #define SOF_TKN_INTEL_SSP_BCLK_DELAY 506 88 89 /* DMIC */ 90 #define SOF_TKN_INTEL_DMIC_DRIVER_VERSION 600 91 #define SOF_TKN_INTEL_DMIC_CLK_MIN 601 92 #define SOF_TKN_INTEL_DMIC_CLK_MAX 602 93 #define SOF_TKN_INTEL_DMIC_DUTY_MIN 603 94 #define SOF_TKN_INTEL_DMIC_DUTY_MAX 604 95 #define SOF_TKN_INTEL_DMIC_NUM_PDM_ACTIVE 605 96 #define SOF_TKN_INTEL_DMIC_SAMPLE_RATE 608 97 #define SOF_TKN_INTEL_DMIC_FIFO_WORD_LENGTH 609 98 99 /* DMIC PDM */ 100 #define SOF_TKN_INTEL_DMIC_PDM_CTRL_ID 700 101 #define SOF_TKN_INTEL_DMIC_PDM_MIC_A_Enable 701 102 #define SOF_TKN_INTEL_DMIC_PDM_MIC_B_Enable 702 103 #define SOF_TKN_INTEL_DMIC_PDM_POLARITY_A 703 104 #define SOF_TKN_INTEL_DMIC_PDM_POLARITY_B 704 105 #define SOF_TKN_INTEL_DMIC_PDM_CLK_EDGE 705 106 #define SOF_TKN_INTEL_DMIC_PDM_SKEW 706 107 108 /* Tone */ 109 #define SOF_TKN_TONE_SAMPLE_RATE 800 110 111 /* Processing Components */ 112 #define SOF_TKN_PROCESS_TYPE 900 113 114 /* for backward compatibility */ 115 #define SOF_TKN_EFFECT_TYPE SOF_TKN_PROCESS_TYPE 116 117 /* SAI */ 118 #define SOF_TKN_IMX_SAI_MCLK_ID 1000 119 120 /* ESAI */ 121 #define SOF_TKN_IMX_ESAI_MCLK_ID 1100 122 123 /* Led control for mute switches */ 124 #define SOF_TKN_MUTE_LED_USE 1300 125 #define SOF_TKN_MUTE_LED_DIRECTION 1301 126 127 /* ALH */ 128 #define SOF_TKN_INTEL_ALH_RATE 1400 129 #define SOF_TKN_INTEL_ALH_CH 1401 130 131 /* HDA */ 132 #define SOF_TKN_INTEL_HDA_RATE 1500 133 #define SOF_TKN_INTEL_HDA_CH 1501 134 135 #endif /* __KERNEL_TOKENS_H__ */ 136
