1 /********************************************************************* 2 * SEGGER Microcontroller GmbH * 3 * The Embedded Experts * 4 ********************************************************************** 5 * * 6 * (c) 1995 - 2021 SEGGER Microcontroller GmbH * 7 * * 8 * www.segger.com Support: support@segger.com * 9 * * 10 ********************************************************************** 11 * * 12 * SEGGER SystemView * Real-time application analysis * 13 * * 14 ********************************************************************** 15 * * 16 * All rights reserved. * 17 * * 18 * SEGGER strongly recommends to not make any changes * 19 * to or modify the source code of this software in order to stay * 20 * compatible with the SystemView and RTT protocol, and J-Link. * 21 * * 22 * Redistribution and use in source and binary forms, with or * 23 * without modification, are permitted provided that the following * 24 * condition is met: * 25 * * 26 * o Redistributions of source code must retain the above copyright * 27 * notice, this condition and the following disclaimer. * 28 * * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * 30 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * 31 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * 32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * 33 * DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * 34 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * 36 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * 37 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * 38 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * 40 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * 41 * DAMAGE. * 42 * * 43 ********************************************************************** 44 * * 45 * SystemView version: 3.40 * 46 * * 47 ********************************************************************** 48 ---------------------------END-OF-HEADER------------------------------ 49 File : SEGGER_RTT_Conf.h 50 Purpose : Implementation of SEGGER real-time transfer (RTT) which 51 allows real-time communication on targets which support 52 debugger memory accesses while the CPU is running. 53 Revision: $Rev: 24316 $ 54 55 */ 56 57 #ifndef SEGGER_RTT_CONF_H 58 #define SEGGER_RTT_CONF_H 59 60 #ifdef __IAR_SYSTEMS_ICC__ 61 #include <intrinsics.h> 62 #endif 63 64 /********************************************************************* 65 * 66 * Defines, configurable 67 * 68 ********************************************************************** 69 */ 70 71 // 72 // Take in and set to correct values for Cortex-A systems with CPU cache 73 // 74 //#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system 75 //#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached 76 // 77 // Most common case: 78 // Up-channel 0: RTT 79 // Up-channel 1: SystemView 80 // 81 #define SEGGER_RTT_MAX_NUM_UP_BUFFERS CONFIG_SEGGER_RTT_MAX_NUM_UP_BUFFERS // Max. number of up-buffers (T->H) available on this target (Default: 3) 82 // 83 // Most common case: 84 // Down-channel 0: RTT 85 // Down-channel 1: SystemView 86 // 87 #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS CONFIG_SEGGER_RTT_MAX_NUM_DOWN_BUFFERS // Max. number of down-buffers (H->T) available on this target (Default: 3) 88 89 #define BUFFER_SIZE_UP CONFIG_SEGGER_RTT_BUFFER_SIZE_UP // Size of the buffer for terminal output of target, up to host (Default: 1k) 90 91 #define BUFFER_SIZE_DOWN CONFIG_SEGGER_RTT_BUFFER_SIZE_DOWN // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) 92 93 #define SEGGER_RTT_PRINTF_BUFFER_SIZE CONFIG_SEGGER_RTT_PRINTF_BUFFER_SIZE // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) 94 95 #define SEGGER_RTT_MODE_DEFAULT CONFIG_SEGGER_RTT_MODE // Mode for pre-initialized terminal channel (buffer 0) 96 97 #if defined(CONFIG_SEGGER_RTT_SECTION_DTCM) 98 #define SEGGER_RTT_SECTION ".dtcm_data" 99 #elif defined(CONFIG_SEGGER_RTT_SECTION_CUSTOM) 100 #define SEGGER_RTT_SECTION CONFIG_SEGGER_RTT_SECTION_CUSTOM_NAME 101 #endif 102 103 /********************************************************************* 104 * 105 * RTT memcpy configuration 106 * 107 * memcpy() is good for large amounts of data, 108 * but the overhead is big for small amounts, which are usually stored via RTT. 109 * With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. 110 * 111 * SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. 112 * This is may be required with memory access restrictions, 113 * such as on Cortex-A devices with MMU. 114 */ 115 #if defined(CONFIG_SEGGER_RTT_MEMCPY_USE_BYTELOOP) 116 #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 1 // 1: Use a simple byte-loop 117 #else 118 #ifndef SEGGER_RTT_MEMCPY_USE_BYTELOOP 119 #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY 120 #endif 121 #endif 122 // 123 // Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets 124 // 125 //#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) 126 // #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) 127 //#endif 128 129 // 130 // Target is not allowed to perform other RTT operations while string still has not been stored completely. 131 // Otherwise we would probably end up with a mixed string in the buffer. 132 // If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. 133 // 134 // SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. 135 // Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. 136 // When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. 137 // (Higher priority = lower priority number) 138 // Default value for embOS: 128u 139 // Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) 140 // In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC 141 // or define SEGGER_RTT_LOCK() to completely disable interrupts. 142 // 143 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 144 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) 145 #endif 146 147 /********************************************************************* 148 * 149 * RTT lock configuration for SEGGER Embedded Studio, 150 * Rowley CrossStudio and GCC 151 */ 152 #if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) 153 #if defined(__ZEPHYR__) && defined (CONFIG_SEGGER_RTT_CUSTOM_LOCKING) 154 #ifdef CONFIG_MULTITHREADING 155 extern void zephyr_rtt_mutex_lock(void); 156 extern void zephyr_rtt_mutex_unlock(void); 157 #define SEGGER_RTT_LOCK() zephyr_rtt_mutex_lock() 158 #define SEGGER_RTT_UNLOCK() zephyr_rtt_mutex_unlock() 159 #else 160 extern unsigned int zephyr_rtt_irq_lock(void); 161 extern void zephyr_rtt_irq_unlock(unsigned int key); 162 #define SEGGER_RTT_LOCK() { \ 163 unsigned int key = zephyr_rtt_irq_lock() 164 #define SEGGER_RTT_UNLOCK() zephyr_rtt_irq_unlock(key); \ 165 } 166 #endif 167 #define RTT_USE_ASM 0 168 #elif (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) 169 #define SEGGER_RTT_LOCK() { \ 170 unsigned int _SEGGER_RTT__LockState; \ 171 __asm volatile ("mrs %0, primask \n\t" \ 172 "movs r1, #1 \n\t" \ 173 "msr primask, r1 \n\t" \ 174 : "=r" (_SEGGER_RTT__LockState) \ 175 : \ 176 : "r1", "cc" \ 177 ); 178 179 #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ 180 : \ 181 : "r" (_SEGGER_RTT__LockState) \ 182 : \ 183 ); \ 184 } 185 #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)) 186 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 187 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 188 #endif 189 #define SEGGER_RTT_LOCK() { \ 190 unsigned int _SEGGER_RTT__LockState; \ 191 __asm volatile ("mrs %0, basepri \n\t" \ 192 "mov r1, %1 \n\t" \ 193 "msr basepri, r1 \n\t" \ 194 : "=r" (_SEGGER_RTT__LockState) \ 195 : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ 196 : "r1", "cc" \ 197 ); 198 199 #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ 200 : \ 201 : "r" (_SEGGER_RTT__LockState) \ 202 : \ 203 ); \ 204 } 205 206 #elif (defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__)) 207 #define SEGGER_RTT_LOCK() { \ 208 unsigned int _SEGGER_RTT__LockState; \ 209 __asm volatile ("mrs r1, CPSR \n\t" \ 210 "mov %0, r1 \n\t" \ 211 "orr r1, r1, #0xC0 \n\t" \ 212 "msr CPSR_c, r1 \n\t" \ 213 : "=r" (_SEGGER_RTT__LockState) \ 214 : \ 215 : "r1", "cc" \ 216 ); 217 218 #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ 219 "mrs r1, CPSR \n\t" \ 220 "bic r1, r1, #0xC0 \n\t" \ 221 "and r0, r0, #0xC0 \n\t" \ 222 "orr r1, r1, r0 \n\t" \ 223 "msr CPSR_c, r1 \n\t" \ 224 : \ 225 : "r" (_SEGGER_RTT__LockState) \ 226 : "r0", "r1", "cc" \ 227 ); \ 228 } 229 #elif defined(__riscv) || defined(__riscv_xlen) 230 #define SEGGER_RTT_LOCK() { \ 231 unsigned int _SEGGER_RTT__LockState; \ 232 __asm volatile ("csrr %0, mstatus \n\t" \ 233 "csrci mstatus, 8 \n\t" \ 234 "andi %0, %0, 8 \n\t" \ 235 : "=r" (_SEGGER_RTT__LockState) \ 236 : \ 237 : \ 238 ); 239 240 #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ 241 "or %0, %0, a1 \n\t" \ 242 "csrs mstatus, %0 \n\t" \ 243 : \ 244 : "r" (_SEGGER_RTT__LockState) \ 245 : "a1" \ 246 ); \ 247 } 248 #else 249 #define SEGGER_RTT_LOCK() 250 #define SEGGER_RTT_UNLOCK() 251 #endif 252 #endif 253 254 /********************************************************************* 255 * 256 * RTT lock configuration for IAR EWARM 257 */ 258 #ifdef __ICCARM__ 259 #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ 260 (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) 261 #define SEGGER_RTT_LOCK() { \ 262 unsigned int _SEGGER_RTT__LockState; \ 263 _SEGGER_RTT__LockState = __get_PRIMASK(); \ 264 __set_PRIMASK(1); 265 266 #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ 267 } 268 #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ 269 (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ 270 (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ 271 (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) 272 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 273 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 274 #endif 275 #define SEGGER_RTT_LOCK() { \ 276 unsigned int _SEGGER_RTT__LockState; \ 277 _SEGGER_RTT__LockState = __get_BASEPRI(); \ 278 __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); 279 280 #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ 281 } 282 #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ 283 (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) 284 #define SEGGER_RTT_LOCK() { \ 285 unsigned int _SEGGER_RTT__LockState; \ 286 __asm volatile ("mrs r1, CPSR \n\t" \ 287 "mov %0, r1 \n\t" \ 288 "orr r1, r1, #0xC0 \n\t" \ 289 "msr CPSR_c, r1 \n\t" \ 290 : "=r" (_SEGGER_RTT__LockState) \ 291 : \ 292 : "r1", "cc" \ 293 ); 294 295 #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ 296 "mrs r1, CPSR \n\t" \ 297 "bic r1, r1, #0xC0 \n\t" \ 298 "and r0, r0, #0xC0 \n\t" \ 299 "orr r1, r1, r0 \n\t" \ 300 "msr CPSR_c, r1 \n\t" \ 301 : \ 302 : "r" (_SEGGER_RTT__LockState) \ 303 : "r0", "r1", "cc" \ 304 ); \ 305 } 306 #endif 307 #endif 308 309 /********************************************************************* 310 * 311 * RTT lock configuration for IAR RX 312 */ 313 #ifdef __ICCRX__ 314 #define SEGGER_RTT_LOCK() { \ 315 unsigned long _SEGGER_RTT__LockState; \ 316 _SEGGER_RTT__LockState = __get_interrupt_state(); \ 317 __disable_interrupt(); 318 319 #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ 320 } 321 #endif 322 323 /********************************************************************* 324 * 325 * RTT lock configuration for IAR RL78 326 */ 327 #ifdef __ICCRL78__ 328 #define SEGGER_RTT_LOCK() { \ 329 __istate_t _SEGGER_RTT__LockState; \ 330 _SEGGER_RTT__LockState = __get_interrupt_state(); \ 331 __disable_interrupt(); 332 333 #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ 334 } 335 #endif 336 337 /********************************************************************* 338 * 339 * RTT lock configuration for KEIL ARM 340 */ 341 #ifdef __CC_ARM 342 #if (defined __TARGET_ARCH_6S_M) 343 #define SEGGER_RTT_LOCK() { \ 344 unsigned int _SEGGER_RTT__LockState; \ 345 register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ 346 _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ 347 _SEGGER_RTT__PRIMASK = 1u; \ 348 __schedule_barrier(); 349 350 #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ 351 __schedule_barrier(); \ 352 } 353 #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) 354 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 355 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 356 #endif 357 #define SEGGER_RTT_LOCK() { \ 358 unsigned int _SEGGER_RTT__LockState; \ 359 register unsigned char BASEPRI __asm( "basepri"); \ 360 _SEGGER_RTT__LockState = BASEPRI; \ 361 BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ 362 __schedule_barrier(); 363 364 #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ 365 __schedule_barrier(); \ 366 } 367 #endif 368 #endif 369 370 /********************************************************************* 371 * 372 * RTT lock configuration for TI ARM 373 */ 374 #ifdef __TI_ARM__ 375 #if defined (__TI_ARM_V6M0__) 376 #define SEGGER_RTT_LOCK() { \ 377 unsigned int _SEGGER_RTT__LockState; \ 378 _SEGGER_RTT__LockState = __get_PRIMASK(); \ 379 __set_PRIMASK(1); 380 381 #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ 382 } 383 #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) 384 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 385 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 386 #endif 387 #define SEGGER_RTT_LOCK() { \ 388 unsigned int _SEGGER_RTT__LockState; \ 389 _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); 390 391 #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ 392 } 393 #endif 394 #endif 395 396 /********************************************************************* 397 * 398 * RTT lock configuration for CCRX 399 */ 400 #ifdef __RX 401 #include <machine.h> 402 #define SEGGER_RTT_LOCK() { \ 403 unsigned long _SEGGER_RTT__LockState; \ 404 _SEGGER_RTT__LockState = get_psw() & 0x010000; \ 405 clrpsw_i(); 406 407 #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ 408 } 409 #endif 410 411 /********************************************************************* 412 * 413 * RTT lock configuration for embOS Simulation on Windows 414 * (Can also be used for generic RTT locking with embOS) 415 */ 416 #if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) 417 418 void OS_SIM_EnterCriticalSection(void); 419 void OS_SIM_LeaveCriticalSection(void); 420 421 #define SEGGER_RTT_LOCK() { \ 422 OS_SIM_EnterCriticalSection(); 423 424 #define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ 425 } 426 #endif 427 428 /********************************************************************* 429 * 430 * RTT lock configuration fallback 431 */ 432 #ifndef SEGGER_RTT_LOCK 433 #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) 434 #endif 435 436 #ifndef SEGGER_RTT_UNLOCK 437 #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) 438 #endif 439 440 #endif 441 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