1 /********************************************************************* 2 * SEGGER Microcontroller GmbH * 3 * The Embedded Experts * 4 ********************************************************************** 5 * * 6 * (c) 1995 - 2021 SEGGER Microcontroller GmbH * 7 * * 8 * www.segger.com Support: support@segger.com * 9 * * 10 ********************************************************************** 11 * * 12 * SEGGER SystemView * Real-time application analysis * 13 * * 14 ********************************************************************** 15 * * 16 * All rights reserved. * 17 * * 18 * SEGGER strongly recommends to not make any changes * 19 * to or modify the source code of this software in order to stay * 20 * compatible with the SystemView and RTT protocol, and J-Link. * 21 * * 22 * Redistribution and use in source and binary forms, with or * 23 * without modification, are permitted provided that the following * 24 * condition is met: * 25 * * 26 * o Redistributions of source code must retain the above copyright * 27 * notice, this condition and the following disclaimer. * 28 * * 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * 30 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * 31 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * 32 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * 33 * DISCLAIMED. IN NO EVENT SHALL SEGGER Microcontroller BE LIABLE FOR * 34 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * 35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * 36 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * 37 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * 38 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * 40 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * 41 * DAMAGE. * 42 * * 43 ********************************************************************** 44 * * 45 * SystemView version: 3.30 * 46 * * 47 ********************************************************************** 48 ---------------------------END-OF-HEADER------------------------------ 49 File : SEGGER_RTT_Conf.h 50 Purpose : Implementation of SEGGER real-time transfer (RTT) which 51 allows real-time communication on targets which support 52 debugger memory accesses while the CPU is running. 53 Revision: $Rev: 21386 $ 54 55 */ 56 57 #ifndef SEGGER_RTT_CONF_H 58 #define SEGGER_RTT_CONF_H 59 60 #ifdef __IAR_SYSTEMS_ICC__ 61 #include <intrinsics.h> 62 #endif 63 64 /********************************************************************* 65 * 66 * Defines, configurable 67 * 68 ********************************************************************** 69 */ 70 71 // 72 // Take in and set to correct values for Cortex-A systems with CPU cache 73 // 74 //#define SEGGER_RTT_CPU_CACHE_LINE_SIZE (32) // Largest cache line size (in bytes) in the current system 75 //#define SEGGER_RTT_UNCACHED_OFF (0xFB000000) // Address alias where RTT CB and buffers can be accessed uncached 76 // 77 // Most common case: 78 // Up-channel 0: RTT 79 // Up-channel 1: SystemView 80 // 81 #define SEGGER_RTT_MAX_NUM_UP_BUFFERS CONFIG_SEGGER_RTT_MAX_NUM_UP_BUFFERS // Max. number of up-buffers (T->H) available on this target (Default: 3) 82 // 83 // Most common case: 84 // Down-channel 0: RTT 85 // Down-channel 1: SystemView 86 // 87 #define SEGGER_RTT_MAX_NUM_DOWN_BUFFERS CONFIG_SEGGER_RTT_MAX_NUM_DOWN_BUFFERS // Max. number of down-buffers (H->T) available on this target (Default: 3) 88 89 #define BUFFER_SIZE_UP CONFIG_SEGGER_RTT_BUFFER_SIZE_UP // Size of the buffer for terminal output of target, up to host (Default: 1k) 90 91 #define BUFFER_SIZE_DOWN CONFIG_SEGGER_RTT_BUFFER_SIZE_DOWN // Size of the buffer for terminal input to target from host (Usually keyboard input) (Default: 16) 92 93 #define SEGGER_RTT_PRINTF_BUFFER_SIZE CONFIG_SEGGER_RTT_PRINTF_BUFFER_SIZE // Size of buffer for RTT printf to bulk-send chars via RTT (Default: 64) 94 95 #define SEGGER_RTT_MODE_DEFAULT CONFIG_SEGGER_RTT_MODE // Mode for pre-initialized terminal channel (buffer 0) 96 97 #if defined(CONFIG_SEGGER_RTT_SECTION_DTCM) 98 #define SEGGER_RTT_SECTION ".dtcm_data" 99 #endif 100 101 /********************************************************************* 102 * 103 * RTT memcpy configuration 104 * 105 * memcpy() is good for large amounts of data, 106 * but the overhead is big for small amounts, which are usually stored via RTT. 107 * With SEGGER_RTT_MEMCPY_USE_BYTELOOP a simple byte loop can be used instead. 108 * 109 * SEGGER_RTT_MEMCPY() can be used to replace standard memcpy() in RTT functions. 110 * This is may be required with memory access restrictions, 111 * such as on Cortex-A devices with MMU. 112 */ 113 #if defined(CONFIG_SEGGER_RTT_MEMCPY_USE_BYTELOOP) 114 #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 1 // 1: Use a simple byte-loop 115 #else 116 #define SEGGER_RTT_MEMCPY_USE_BYTELOOP 0 // 0: Use memcpy/SEGGER_RTT_MEMCPY 117 #endif 118 // 119 // Example definition of SEGGER_RTT_MEMCPY to external memcpy with GCC toolchains and Cortex-A targets 120 // 121 //#if ((defined __SES_ARM) || (defined __CROSSWORKS_ARM) || (defined __GNUC__)) && (defined (__ARM_ARCH_7A__)) 122 // #define SEGGER_RTT_MEMCPY(pDest, pSrc, NumBytes) SEGGER_memcpy((pDest), (pSrc), (NumBytes)) 123 //#endif 124 125 // 126 // Target is not allowed to perform other RTT operations while string still has not been stored completely. 127 // Otherwise we would probably end up with a mixed string in the buffer. 128 // If using RTT from within interrupts, multiple tasks or multi processors, define the SEGGER_RTT_LOCK() and SEGGER_RTT_UNLOCK() function here. 129 // 130 // SEGGER_RTT_MAX_INTERRUPT_PRIORITY can be used in the sample lock routines on Cortex-M3/4. 131 // Make sure to mask all interrupts which can send RTT data, i.e. generate SystemView events, or cause task switches. 132 // When high-priority interrupts must not be masked while sending RTT data, SEGGER_RTT_MAX_INTERRUPT_PRIORITY needs to be adjusted accordingly. 133 // (Higher priority = lower priority number) 134 // Default value for embOS: 128u 135 // Default configuration in FreeRTOS: configMAX_SYSCALL_INTERRUPT_PRIORITY: ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) ) 136 // In case of doubt mask all interrupts: 1 << (8 - BASEPRI_PRIO_BITS) i.e. 1 << 5 when 3 bits are implemented in NVIC 137 // or define SEGGER_RTT_LOCK() to completely disable interrupts. 138 // 139 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 140 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) // Interrupt priority to lock on SEGGER_RTT_LOCK on Cortex-M3/4 (Default: 0x20) 141 #endif 142 143 /********************************************************************* 144 * 145 * RTT lock configuration for SEGGER Embedded Studio, 146 * Rowley CrossStudio and GCC 147 */ 148 #if ((defined(__SES_ARM) || defined(__SES_RISCV) || defined(__CROSSWORKS_ARM) || defined(__GNUC__) || defined(__clang__)) && !defined (__CC_ARM) && !defined(WIN32)) 149 #if defined(__ZEPHYR__) && defined (CONFIG_SEGGER_RTT_CUSTOM_LOCKING) 150 #include <kernel.h> 151 #ifdef CONFIG_MULTITHREADING 152 extern struct k_mutex rtt_term_mutex; 153 #define SEGGER_RTT_LOCK() k_mutex_lock(&rtt_term_mutex, K_FOREVER); 154 #define SEGGER_RTT_UNLOCK() k_mutex_unlock(&rtt_term_mutex); 155 #else 156 #define SEGGER_RTT_LOCK() { \ 157 unsigned int key = irq_lock() 158 #define SEGGER_RTT_UNLOCK() irq_unlock(key); \ 159 } 160 #endif 161 #define RTT_USE_ASM 0 162 #elif (defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_8M_BASE__)) 163 #define SEGGER_RTT_LOCK() { \ 164 unsigned int _SEGGER_RTT__LockState; \ 165 __asm volatile ("mrs %0, primask \n\t" \ 166 "movs r1, #1 \n\t" \ 167 "msr primask, r1 \n\t" \ 168 : "=r" (_SEGGER_RTT__LockState) \ 169 : \ 170 : "r1", "cc" \ 171 ); 172 173 #define SEGGER_RTT_UNLOCK() __asm volatile ("msr primask, %0 \n\t" \ 174 : \ 175 : "r" (_SEGGER_RTT__LockState) \ 176 : \ 177 ); \ 178 } 179 #elif (defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__)) 180 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 181 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 182 #endif 183 #define SEGGER_RTT_LOCK() { \ 184 unsigned int _SEGGER_RTT__LockState; \ 185 __asm volatile ("mrs %0, basepri \n\t" \ 186 "mov r1, %1 \n\t" \ 187 "msr basepri, r1 \n\t" \ 188 : "=r" (_SEGGER_RTT__LockState) \ 189 : "i"(SEGGER_RTT_MAX_INTERRUPT_PRIORITY) \ 190 : "r1", "cc" \ 191 ); 192 193 #define SEGGER_RTT_UNLOCK() __asm volatile ("msr basepri, %0 \n\t" \ 194 : \ 195 : "r" (_SEGGER_RTT__LockState) \ 196 : \ 197 ); \ 198 } 199 200 #elif defined(__ARM_ARCH_7A__) 201 #define SEGGER_RTT_LOCK() { \ 202 unsigned int _SEGGER_RTT__LockState; \ 203 __asm volatile ("mrs r1, CPSR \n\t" \ 204 "mov %0, r1 \n\t" \ 205 "orr r1, r1, #0xC0 \n\t" \ 206 "msr CPSR_c, r1 \n\t" \ 207 : "=r" (_SEGGER_RTT__LockState) \ 208 : \ 209 : "r1", "cc" \ 210 ); 211 212 #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ 213 "mrs r1, CPSR \n\t" \ 214 "bic r1, r1, #0xC0 \n\t" \ 215 "and r0, r0, #0xC0 \n\t" \ 216 "orr r1, r1, r0 \n\t" \ 217 "msr CPSR_c, r1 \n\t" \ 218 : \ 219 : "r" (_SEGGER_RTT__LockState) \ 220 : "r0", "r1", "cc" \ 221 ); \ 222 } 223 #elif defined(__riscv) || defined(__riscv_xlen) 224 #define SEGGER_RTT_LOCK() { \ 225 unsigned int _SEGGER_RTT__LockState; \ 226 __asm volatile ("csrr %0, mstatus \n\t" \ 227 "csrci mstatus, 8 \n\t" \ 228 "andi %0, %0, 8 \n\t" \ 229 : "=r" (_SEGGER_RTT__LockState) \ 230 : \ 231 : \ 232 ); 233 234 #define SEGGER_RTT_UNLOCK() __asm volatile ("csrr a1, mstatus \n\t" \ 235 "or %0, %0, a1 \n\t" \ 236 "csrs mstatus, %0 \n\t" \ 237 : \ 238 : "r" (_SEGGER_RTT__LockState) \ 239 : "a1" \ 240 ); \ 241 } 242 #else 243 #define SEGGER_RTT_LOCK() 244 #define SEGGER_RTT_UNLOCK() 245 #endif 246 #endif 247 248 /********************************************************************* 249 * 250 * RTT lock configuration for IAR EWARM 251 */ 252 #ifdef __ICCARM__ 253 #if (defined (__ARM6M__) && (__CORE__ == __ARM6M__)) || \ 254 (defined (__ARM8M_BASELINE__) && (__CORE__ == __ARM8M_BASELINE__)) 255 #define SEGGER_RTT_LOCK() { \ 256 unsigned int _SEGGER_RTT__LockState; \ 257 _SEGGER_RTT__LockState = __get_PRIMASK(); \ 258 __set_PRIMASK(1); 259 260 #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ 261 } 262 #elif (defined (__ARM7EM__) && (__CORE__ == __ARM7EM__)) || \ 263 (defined (__ARM7M__) && (__CORE__ == __ARM7M__)) || \ 264 (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) || \ 265 (defined (__ARM8M_MAINLINE__) && (__CORE__ == __ARM8M_MAINLINE__)) 266 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 267 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 268 #endif 269 #define SEGGER_RTT_LOCK() { \ 270 unsigned int _SEGGER_RTT__LockState; \ 271 _SEGGER_RTT__LockState = __get_BASEPRI(); \ 272 __set_BASEPRI(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); 273 274 #define SEGGER_RTT_UNLOCK() __set_BASEPRI(_SEGGER_RTT__LockState); \ 275 } 276 #elif (defined (__ARM7A__) && (__CORE__ == __ARM7A__)) || \ 277 (defined (__ARM7R__) && (__CORE__ == __ARM7R__)) 278 #define SEGGER_RTT_LOCK() { \ 279 unsigned int _SEGGER_RTT__LockState; \ 280 __asm volatile ("mrs r1, CPSR \n\t" \ 281 "mov %0, r1 \n\t" \ 282 "orr r1, r1, #0xC0 \n\t" \ 283 "msr CPSR_c, r1 \n\t" \ 284 : "=r" (_SEGGER_RTT__LockState) \ 285 : \ 286 : "r1", "cc" \ 287 ); 288 289 #define SEGGER_RTT_UNLOCK() __asm volatile ("mov r0, %0 \n\t" \ 290 "mrs r1, CPSR \n\t" \ 291 "bic r1, r1, #0xC0 \n\t" \ 292 "and r0, r0, #0xC0 \n\t" \ 293 "orr r1, r1, r0 \n\t" \ 294 "msr CPSR_c, r1 \n\t" \ 295 : \ 296 : "r" (_SEGGER_RTT__LockState) \ 297 : "r0", "r1", "cc" \ 298 ); \ 299 } 300 #endif 301 #endif 302 303 /********************************************************************* 304 * 305 * RTT lock configuration for IAR RX 306 */ 307 #ifdef __ICCRX__ 308 #define SEGGER_RTT_LOCK() { \ 309 unsigned long _SEGGER_RTT__LockState; \ 310 _SEGGER_RTT__LockState = __get_interrupt_state(); \ 311 __disable_interrupt(); 312 313 #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ 314 } 315 #endif 316 317 /********************************************************************* 318 * 319 * RTT lock configuration for IAR RL78 320 */ 321 #ifdef __ICCRL78__ 322 #define SEGGER_RTT_LOCK() { \ 323 __istate_t _SEGGER_RTT__LockState; \ 324 _SEGGER_RTT__LockState = __get_interrupt_state(); \ 325 __disable_interrupt(); 326 327 #define SEGGER_RTT_UNLOCK() __set_interrupt_state(_SEGGER_RTT__LockState); \ 328 } 329 #endif 330 331 /********************************************************************* 332 * 333 * RTT lock configuration for KEIL ARM 334 */ 335 #ifdef __CC_ARM 336 #if (defined __TARGET_ARCH_6S_M) 337 #define SEGGER_RTT_LOCK() { \ 338 unsigned int _SEGGER_RTT__LockState; \ 339 register unsigned char _SEGGER_RTT__PRIMASK __asm( "primask"); \ 340 _SEGGER_RTT__LockState = _SEGGER_RTT__PRIMASK; \ 341 _SEGGER_RTT__PRIMASK = 1u; \ 342 __schedule_barrier(); 343 344 #define SEGGER_RTT_UNLOCK() _SEGGER_RTT__PRIMASK = _SEGGER_RTT__LockState; \ 345 __schedule_barrier(); \ 346 } 347 #elif (defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) 348 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 349 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 350 #endif 351 #define SEGGER_RTT_LOCK() { \ 352 unsigned int _SEGGER_RTT__LockState; \ 353 register unsigned char BASEPRI __asm( "basepri"); \ 354 _SEGGER_RTT__LockState = BASEPRI; \ 355 BASEPRI = SEGGER_RTT_MAX_INTERRUPT_PRIORITY; \ 356 __schedule_barrier(); 357 358 #define SEGGER_RTT_UNLOCK() BASEPRI = _SEGGER_RTT__LockState; \ 359 __schedule_barrier(); \ 360 } 361 #endif 362 #endif 363 364 /********************************************************************* 365 * 366 * RTT lock configuration for TI ARM 367 */ 368 #ifdef __TI_ARM__ 369 #if defined (__TI_ARM_V6M0__) 370 #define SEGGER_RTT_LOCK() { \ 371 unsigned int _SEGGER_RTT__LockState; \ 372 _SEGGER_RTT__LockState = __get_PRIMASK(); \ 373 __set_PRIMASK(1); 374 375 #define SEGGER_RTT_UNLOCK() __set_PRIMASK(_SEGGER_RTT__LockState); \ 376 } 377 #elif (defined (__TI_ARM_V7M3__) || defined (__TI_ARM_V7M4__)) 378 #ifndef SEGGER_RTT_MAX_INTERRUPT_PRIORITY 379 #define SEGGER_RTT_MAX_INTERRUPT_PRIORITY (0x20) 380 #endif 381 #define SEGGER_RTT_LOCK() { \ 382 unsigned int _SEGGER_RTT__LockState; \ 383 _SEGGER_RTT__LockState = _set_interrupt_priority(SEGGER_RTT_MAX_INTERRUPT_PRIORITY); 384 385 #define SEGGER_RTT_UNLOCK() _set_interrupt_priority(_SEGGER_RTT__LockState); \ 386 } 387 #endif 388 #endif 389 390 /********************************************************************* 391 * 392 * RTT lock configuration for CCRX 393 */ 394 #ifdef __RX 395 #include <machine.h> 396 #define SEGGER_RTT_LOCK() { \ 397 unsigned long _SEGGER_RTT__LockState; \ 398 _SEGGER_RTT__LockState = get_psw() & 0x010000; \ 399 clrpsw_i(); 400 401 #define SEGGER_RTT_UNLOCK() set_psw(get_psw() | _SEGGER_RTT__LockState); \ 402 } 403 #endif 404 405 /********************************************************************* 406 * 407 * RTT lock configuration for embOS Simulation on Windows 408 * (Can also be used for generic RTT locking with embOS) 409 */ 410 #if defined(WIN32) || defined(SEGGER_RTT_LOCK_EMBOS) 411 412 void OS_SIM_EnterCriticalSection(void); 413 void OS_SIM_LeaveCriticalSection(void); 414 415 #define SEGGER_RTT_LOCK() { \ 416 OS_SIM_EnterCriticalSection(); 417 418 #define SEGGER_RTT_UNLOCK() OS_SIM_LeaveCriticalSection(); \ 419 } 420 #endif 421 422 /********************************************************************* 423 * 424 * RTT lock configuration fallback 425 */ 426 #ifndef SEGGER_RTT_LOCK 427 #define SEGGER_RTT_LOCK() // Lock RTT (nestable) (i.e. disable interrupts) 428 #endif 429 430 #ifndef SEGGER_RTT_UNLOCK 431 #define SEGGER_RTT_UNLOCK() // Unlock RTT (nestable) (i.e. enable previous interrupt lock state) 432 #endif 433 434 #endif 435 /*************************** End of file ****************************/ 436
