1 /* @(#)e_fmod.c 1.3 95/01/18 */
2 /*-
3 * ====================================================
4 * Copyright (C) 1993 by Sun Microsystems, Inc. All rights reserved.
5 *
6 * Developed at SunSoft, a Sun Microsystems, Inc. business.
7 * Permission to use, copy, modify, and distribute this
8 * software is freely granted, provided that this notice
9 * is preserved.
10 * ====================================================
11 */
12
13
14
15
16 #define BIAS (LDBL_MAX_EXP - 1)
17
18 /*
19 * These macros add and remove an explicit integer bit in front of the
20 * fractional mantissa, if the architecture doesn't have such a bit by
21 * default already.
22 */
23 #ifdef LDBL_IMPLICIT_NBIT
24 #define LDBL_NBIT 0
25 #define SET_NBIT(hx) ((hx) | (1ULL << LDBL_MANH_SIZE))
26 #define HFRAC_BITS LDBL_MANH_SIZE
27 #else
28 #define LDBL_NBIT 0x80000000
29 #define SET_NBIT(hx) (hx)
30 #define HFRAC_BITS (LDBL_MANH_SIZE - 1)
31 #endif
32
33 #define MANL_SHIFT (LDBL_MANL_SIZE - 1)
34
35 static const long double one = 1.0l, Zero[] = {0.0l, -0.0l,};
36
37 /*
38 * fmodl(x,y)
39 * Return x mod y in exact arithmetic
40 * Method: shift and subtract
41 *
42 * Assumptions:
43 * - The low part of the mantissa fits in a manl_t exactly.
44 * - The high part of the mantissa fits in an int64_t with enough room
45 * for an explicit integer bit in front of the fractional bits.
46 */
47 long double
fmodl(long double x,long double y)48 fmodl(long double x, long double y)
49 {
50 union IEEEl2bits ux, uy;
51 int64_t hx,hz; /* We need a carry bit even if LDBL_MANH_SIZE is 32. */
52 uint32_t hy;
53 uint32_t lx,ly,lz;
54 int ix,iy,n,sx;
55
56 ux.e = x;
57 uy.e = y;
58 sx = ux.bits.sign;
59
60 if (isnanl_inline(x) || isnanl_inline(y))
61 return x + y;
62
63 if (isinfl(x))
64 return __math_invalidl(x);
65
66 if (y == 0.0L)
67 return __math_invalidl(y);
68
69 if(ux.bits.exp<=uy.bits.exp) {
70 if((ux.bits.exp<uy.bits.exp) ||
71 (ux.bits.manh<=uy.bits.manh &&
72 (ux.bits.manh<uy.bits.manh ||
73 ux.bits.manl<uy.bits.manl))) {
74 return x; /* |x|<|y| return x or x-y */
75 }
76 if(ux.bits.manh==uy.bits.manh &&
77 ux.bits.manl==uy.bits.manl) {
78 return Zero[sx]; /* |x|=|y| return x*0*/
79 }
80 }
81
82 /* determine ix = ilogb(x) */
83 if(ux.bits.exp == 0) { /* subnormal x */
84 ux.e *= 0x1.0p512l;
85 ix = ux.bits.exp - (BIAS + 512);
86 } else {
87 ix = ux.bits.exp - BIAS;
88 }
89
90 /* determine iy = ilogb(y) */
91 if(uy.bits.exp == 0) { /* subnormal y */
92 uy.e *= 0x1.0p512l;
93 iy = uy.bits.exp - (BIAS + 512);
94 } else {
95 iy = uy.bits.exp - BIAS;
96 }
97
98 /* set up {hx,lx}, {hy,ly} and align y to x */
99 hx = SET_NBIT(ux.bits.manh);
100 hy = SET_NBIT(uy.bits.manh);
101 lx = ux.bits.manl;
102 ly = uy.bits.manl;
103
104 /* fix point fmod */
105 n = ix - iy;
106
107 while(n--) {
108 hz=hx-hy;lz=lx-ly; if(lx<ly) hz -= 1;
109 if(hz<0){hx = hx+hx+(lx>>MANL_SHIFT); lx = lx+lx;}
110 else {
111 if ((hz|lz)==0) /* return sign(x)*0 */
112 return Zero[sx];
113 hx = hz+hz+(lz>>MANL_SHIFT); lx = lz+lz;
114 }
115 }
116 hz=hx-hy;lz=lx-ly; if(lx<ly) hz -= 1;
117 if(hz>=0) {hx=hz;lx=lz;}
118
119 /* convert back to floating value and restore the sign */
120 if((hx|lx)==0) /* return sign(x)*0 */
121 return Zero[sx];
122 while(hx<(1LL<<HFRAC_BITS)) { /* normalize x */
123 hx = hx+hx+(lx>>MANL_SHIFT); lx = lx+lx;
124 iy -= 1;
125 }
126 ux.bits.manh = hx; /* The mantissa is truncated here if needed. */
127 ux.bits.manl = lx;
128 if (iy < LDBL_MIN_EXP) {
129 ux.bits.exp = iy + (BIAS + 512);
130 ux.e *= 0x1p-512l;
131 } else {
132 ux.bits.exp = iy + BIAS;
133 }
134 x = ux.e * one; /* create necessary signal */
135 return x; /* exact output */
136 }
137
