1/* 2 Copyright (c) 2024, Synopsys, Inc. All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions are met: 6 7 1) Redistributions of source code must retain the above copyright notice, 8 this list of conditions and the following disclaimer. 9 10 2) Redistributions in binary form must reproduce the above copyright notice, 11 this list of conditions and the following disclaimer in the documentation 12 and/or other materials provided with the distribution. 13 14 3) Neither the name of the Synopsys, Inc., nor the names of its contributors 15 may be used to endorse or promote products derived from this software 16 without specific prior written permission. 17 18 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 POSSIBILITY OF SUCH DAMAGE. 29*/ 30 31#include <picolibc.h> 32 33#include <sys/asm.h> 34 35/* ABI interface file 36 these are the stack mappings for the registers 37 as stored in the ABI for ARC */ 38 39ABIr14 = 0 40ABIr15 = ABIr14 + REG_SZ 41ABIr16 = ABIr15 + REG_SZ 42ABIr17 = ABIr16 + REG_SZ 43ABIr18 = ABIr17 + REG_SZ 44ABIr19 = ABIr18 + REG_SZ 45ABIr20 = ABIr19 + REG_SZ 46ABIr21 = ABIr20 + REG_SZ 47ABIr22 = ABIr21 + REG_SZ 48ABIr23 = ABIr22 + REG_SZ 49ABIr24 = ABIr23 + REG_SZ 50ABIr25 = ABIr24 + REG_SZ 51ABIr26 = ABIr25 + REG_SZ 52ABIr27 = ABIr26 + REG_SZ 53ABIr28 = ABIr27 + REG_SZ 54ABIr29 = ABIr28 + REG_SZ 55ABIr30 = ABIr29 + REG_SZ 56ABIr31 = ABIr30 + REG_SZ 57 58 59ENTRY (setjmp) 60 REG_ST r14, [r0, ABIr14] 61 REG_ST r15, [r0, ABIr15] 62 REG_ST r16, [r0, ABIr16] 63 REG_ST r17, [r0, ABIr17] 64 REG_ST r18, [r0, ABIr18] 65 REG_ST r19, [r0, ABIr19] 66 REG_ST r20, [r0, ABIr20] 67 REG_ST r21, [r0, ABIr21] 68 REG_ST r22, [r0, ABIr22] 69 REG_ST r23, [r0, ABIr23] 70 REG_ST r24, [r0, ABIr24] 71 REG_ST r25, [r0, ABIr25] 72 REG_ST r26, [r0, ABIr26] 73 REG_ST r27, [r0, ABIr27] 74 REG_ST r28, [r0, ABIr28] 75 REG_ST r29, [r0, ABIr29] 76 REG_ST r30, [r0, ABIr30] 77 REG_ST blink, [r0, ABIr31] 78 79 j.d [blink] 80 mov r0,0 81 .size setjmp,.-setjmp 82 83ENTRY (longjmp) 84 ; load registers 85 REG_LD r14, [r0, ABIr14] 86 REG_LD r15, [r0, ABIr15] 87 REG_LD r16, [r0, ABIr16] 88 REG_LD r17, [r0, ABIr17] 89 REG_LD r18, [r0, ABIr18] 90 REG_LD r19, [r0, ABIr19] 91 REG_LD r20, [r0, ABIr20] 92 REG_LD r21, [r0, ABIr21] 93 REG_LD r22, [r0, ABIr22] 94 REG_LD r23, [r0, ABIr23] 95 REG_LD r24, [r0, ABIr24] 96 REG_LD r25, [r0, ABIr25] 97 REG_LD r26, [r0, ABIr26] 98 REG_LD r27, [r0, ABIr27] 99 REG_LD r28, [r0, ABIr28] 100 REG_LD r29, [r0, ABIr29] 101 REG_LD r30, [r0, ABIr30] 102 REG_LD blink, [r0, ABIr31] 103 104 mov.f r1, r1 ; to avoid return 0 from longjmp 105 mov.z r1, 1 106 j.d [blink] 107 mov r0,r1 108 .size longjmp,.-longjmp 109
