1/* 2 Copyright (c) 2015-2024, Synopsys, Inc. All rights reserved. 3 4 Redistribution and use in source and binary forms, with or without 5 modification, are permitted provided that the following conditions are met: 6 7 1) Redistributions of source code must retain the above copyright notice, 8 this list of conditions and the following disclaimer. 9 10 2) Redistributions in binary form must reproduce the above copyright notice, 11 this list of conditions and the following disclaimer in the documentation 12 and/or other materials provided with the distribution. 13 14 3) Neither the name of the Synopsys, Inc., nor the names of its contributors 15 may be used to endorse or promote products derived from this software 16 without specific prior written permission. 17 18 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 POSSIBILITY OF SUCH DAMAGE. 29*/ 30 31/* ABI interface file 32 these are the stack mappings for the registers 33 as stored in the ABI for ARC */ 34 35#include <picolibc.h> 36 37#define ARC_REGSIZE __SIZEOF_LONG__ 38 39 .file "setjmp.S" 40 41ABIr13 = 0 42ABIr14 = ABIr13 + ARC_REGSIZE 43ABIr15 = ABIr14 + ARC_REGSIZE 44ABIr16 = ABIr15 + ARC_REGSIZE 45ABIr17 = ABIr16 + ARC_REGSIZE 46ABIr18 = ABIr17 + ARC_REGSIZE 47ABIr19 = ABIr18 + ARC_REGSIZE 48ABIr20 = ABIr19 + ARC_REGSIZE 49ABIr21 = ABIr20 + ARC_REGSIZE 50ABIr22 = ABIr21 + ARC_REGSIZE 51ABIr23 = ABIr22 + ARC_REGSIZE 52ABIr24 = ABIr23 + ARC_REGSIZE 53ABIr25 = ABIr24 + ARC_REGSIZE 54ABIr26 = ABIr25 + ARC_REGSIZE 55ABIr27 = ABIr26 + ARC_REGSIZE 56ABIr28 = ABIr27 + ARC_REGSIZE 57ABIr29 = ABIr28 + ARC_REGSIZE 58ABIr30 = ABIr29 + ARC_REGSIZE 59ABIr31 = ABIr30 + ARC_REGSIZE 60ABIlpc = ABIr31 + ARC_REGSIZE 61ABIlps = ABIlpc + ARC_REGSIZE 62ABIlpe = ABIlps + ARC_REGSIZE 63ABIflg = ABIlpe + ARC_REGSIZE 64ABIr58 = ABIflg + ARC_REGSIZE 65ABIr59 = ABIr58 + ARC_REGSIZE 66 67 .text 68 .align 4 69 .global setjmp 70 .type setjmp,@function 71setjmp: 72 st r13, [r0, ABIr13] 73 st r14, [r0, ABIr14] 74 st r15, [r0, ABIr15] 75 st r16, [r0, ABIr16] 76 st r17, [r0, ABIr17] 77 st r18, [r0, ABIr18] 78 st r19, [r0, ABIr19] 79 st r20, [r0, ABIr20] 80 st r21, [r0, ABIr21] 81 st r22, [r0, ABIr22] 82 st r23, [r0, ABIr23] 83 st r24, [r0, ABIr24] 84 st r25, [r0, ABIr25] 85 st r26, [r0, ABIr26] 86 st r27, [r0, ABIr27] 87 st r28, [r0, ABIr28] 88 st r29, [r0, ABIr29] 89 st r30, [r0, ABIr30] 90 st blink, [r0, ABIr31] 91#ifndef __ARCV3__ 92 st lp_count, [r0, ABIlpc] 93#endif 94 lr r2, [lp_start] 95 lr r3, [lp_end] 96 st r2, [r0, ABIlps] 97 st r3, [r0, ABIlpe] 98 99#if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__)) 100; Till the configure changes are decided, and implemented, the code working on 101; mlo/mhi and using mul64 should be disabled. 102; st mlo, [r0, ABIr58] 103; st mhi, [r0, ABIr59] 104 lr r2, [status32] 105 st r2, [r0, ABIflg] 106#endif 107 108; If "MPY_OPTION > 6 or FPU_FMA_OPTION" in an ARCHS target, then there 109; is accumulator support in the processor. 110#if (defined (__ARCHS__) && (defined (__ARC_FPU_DP_FMA__) || defined (__ARC_FPU_SP_FMA__) || defined (__ARC_MPY_DMPY__) || defined (__ARC_DSP__))) 111 st r58, [r0, ABIr58] 112 st r59, [r0, ABIr59] 113#endif 114 115 j.d [blink] 116 mov r0,0 117.Lfe1: 118 .size setjmp,.Lfe1-setjmp 119 120 .align 4 121 .global longjmp 122 .type longjmp,@function 123longjmp: 124 125 ; load registers 126 ld r13, [r0, ABIr13] 127 ld r14, [r0, ABIr14] 128 ld r15, [r0, ABIr15] 129 ld r16, [r0, ABIr16] 130 ld r17, [r0, ABIr17] 131 ld r18, [r0, ABIr18] 132 ld r19, [r0, ABIr19] 133 ld r20, [r0, ABIr20] 134 ld r21, [r0, ABIr21] 135 ld r22, [r0, ABIr22] 136 ld r23, [r0, ABIr23] 137 ld r24, [r0, ABIr24] 138 ld r25, [r0, ABIr25] 139 ld r26, [r0, ABIr26] 140 ld r27, [r0, ABIr27] 141 ld r28, [r0, ABIr28] 142 143 ld r3, [r0, ABIr29] 144 mov r29, r3 145 146 ld r3, [r0, ABIr30] 147 mov r30, r3 148 149 ld blink, [r0, ABIr31] 150 151#ifndef __ARCV3__ 152 ld r3, [r0, ABIlpc] 153 mov lp_count, r3 154#endif 155 156 ld r2, [r0, ABIlps] 157 ld r3, [r0, ABIlpe] 158 sr r2, [lp_start] 159 sr r3, [lp_end] 160 161#if (!defined (__ARC700__) && !defined (__ARCEM__) && !defined (__ARCHS__)) 162 ld r2, [r0, ABIr58] 163 ld r3, [r0, ABIr59] 164; We do not support restoring of mulhi and mlo registers, yet. 165 166; mulu64 0,r2,1 ; restores mlo 167; mov 0,mlo ; force multiply to finish 168; sr r3, [mulhi] 169 ld r2, [r0, ABIflg] 170 flag r2 ; restore "status32" register 171#endif 172 173#if (defined (__ARCHS__) && (defined (__ARC_FPU_DP_FMA__) || defined (__ARC_FPU_SP_FMA__) || defined (__ARC_MPY_DMPY__) || defined (__ARC_DSP__))) 174 ld r58, [r0, ABIr58] 175 ld r59, [r0, ABIr59] 176#endif 177 178 mov.f r1, r1 ; to avoid return 0 from longjmp 179 mov.eq r1, 1 180 j.d [blink] 181 mov r0,r1 182.Lfe2: 183 .size longjmp,.Lfe2-longjmp 184
