1 /*
2  * Copyright (c) 2023 Nordic Semiconductor ASA
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 #ifndef _NRF_HW_MODEL_UART_PRIVATE_H
7 #define _NRF_HW_MODEL_UART_PRIVATE_H
8 
9 #include "bs_types.h"
10 #include <stdint.h>
11 #include <stdio.h>
12 #include "NHW_UART_backend_if.h"
13 #include "NHW_config.h"
14 
15 #ifdef __cplusplus
16 extern "C"{
17 #endif
18 
19 enum uart_tx_status {Tx_Off = 0,
20                      Tx_Idle,
21                      Tx_Pend /* Waiting for CTS to lower to start Tx'ing */,
22                      Txing,
23                      Tx_Stopping /* Waiting for current frame to finish to finish a TASK STOP */};
24 enum uarte_dma_status {DMA_Off = 0, DMAing};
25 enum uart_rx_status {Rx_Off = 0, Rx_turning_off /* Waiting for RX TO */, Rx_On};
26 
27 #define RX_FIFO_SIZE 6
28 #define RX_FIFO_RTS_THRESHOLD 2
29 
30 struct uarte_status {
31   bs_time_t Rx_TO_timer;
32   bs_time_t Tx_byte_done_timer;
33   bs_time_t frametimeout_timer;
34 
35   uint inst;
36   uint clock_f; /* in MHz */
37 
38 #if (NHW_UARTE_HAS_UART)
39   NRF_UART_Type *UART_regs[NHW_UARTE_TOTAL_INST];
40 #endif
41   NRF_UARTE_Type *UARTE_regs[NHW_UARTE_TOTAL_INST];
42 #if (NHW_HAS_DPPI)
43   /* Mapping of peripheral instance to DPPI instance */
44   uint dppi_map;
45 
46   struct nhw_subsc_mem *DMA_RX_ENABLEMATCH_subscribed;
47   struct nhw_subsc_mem *DMA_RX_DISABLEMATCH_subscribed;
48 #endif
49 
50   enum uart_tx_status tx_status;
51   enum uart_rx_status rx_status;
52 
53   /* When was the last time the receiver was off (only valid if the receiver is currently On */
54   bs_time_t Last_Rx_off_time;
55 
56   uint8_t Rx_FIFO[RX_FIFO_SIZE];
57   int Rx_FIFO_cnt;
58 
59   uint16_t Tx_byte;
60 
61   bool RTSR; /* Logical level of RTS/R (false/lowered => Ready to receive)
62                 (this value is internal, and toggles even if the flow-control is disabled) */
63   bool CTS_blocking; /* CTS is blocking the Tx (i.e. it is high),
64                       * this value toggles even if flow control is disabled */
65 
66   /* DMA status including internally buffered/shadow version of the corresponding registers */
67   uint32_t TXD_PTR;
68   uint32_t TXD_MAXCNT;
69   uint32_t TXD_AMOUNT;
70   enum uarte_dma_status tx_dma_status;
71 
72   uint32_t RXD_PTR;
73   uint32_t RXD_MAXCNT;
74   uint32_t RXD_AMOUNT;
75   enum uarte_dma_status rx_dma_status;
76 
77   int n_match; /* Number of match registers this instance has */
78   uint32_t *MATCH_CANDIDATE; /* Shadow copy of DMA.RX.MATCH.CANDIDATE */
79 
80   bool rx_addr_filter_matched;
81 
82   struct backend_if backend;
83 
84   char *Rx_log_file_name;
85   char *Tx_log_file_name;
86   FILE *Tx_log_file;
87   FILE *Rx_log_file;
88 
89   uart_rtxb_cb_f trx_callbacks[2];
90 };
91 
92 #ifdef __cplusplus
93 }
94 #endif
95 
96 #endif /* _NRF_HW_MODEL_UART_PRIVATE_H */
97