1 /*
2  * Copyright (c) 2018 Oticon A/S
3  * Copyright (c) 2020-2023 Nordic Semiconductor ASA
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  */
7 
8 /*
9  * This file redefines macros from nrf that need to be different for simulated devices.
10  */
11 
12 #ifndef NRF_BSIM_REDEF_H
13 #define NRF_BSIM_REDEF_H
14 
15 #include "NHW_config.h"
16 
17 #ifdef __cplusplus
18 extern "C" {
19 #endif
20 
21 void *nhw_convert_periph_base_addr(void *hw_addr);
22 
23 #if defined(NRF52833_XXAA)
24 /*
25  * Redefine the base addresses.
26  */
27 extern NRF_AAR_Type NRF_AAR_regs;
28 #undef NRF_AAR_BASE
29 #define NRF_AAR_BASE                      (&NRF_AAR_regs)
30 extern NRF_RNG_Type NRF_RNG_regs;
31 #undef NRF_RNG_BASE
32 #define NRF_RNG_BASE                      (&NRF_RNG_regs)
33 extern NRF_TEMP_Type NRF_TEMP_regs;
34 #undef NRF_TEMP_BASE
35 #define NRF_TEMP_BASE                     (&NRF_TEMP_regs)
36 extern NRF_RTC_Type NRF_RTC_regs[];
37 #undef NRF_RTC0_BASE
38 #define NRF_RTC0_BASE                     (&NRF_RTC_regs[0])
39 #undef NRF_RTC1_BASE
40 #define NRF_RTC1_BASE                     (&NRF_RTC_regs[1])
41 #undef NRF_RTC2_BASE
42 #define NRF_RTC2_BASE                     (&NRF_RTC_regs[2])
43 extern NRF_ECB_Type NRF_ECB_regs;
44 #undef NRF_ECB_BASE
45 #define NRF_ECB_BASE                      (&NRF_ECB_regs)
46 extern NRF_CCM_Type NRF_CCM_regs;
47 #undef NRF_CCM_BASE
48 #define NRF_CCM_BASE                      (&NRF_CCM_regs)
49 extern NRF_RADIO_Type NRF_RADIO_regs;
50 #undef NRF_RADIO_BASE
51 #define NRF_RADIO_BASE                    (&NRF_RADIO_regs)
52 extern NRF_CLOCK_Type *NRF_CLOCK_regs[];
53 #undef NRF_CLOCK_BASE
54 #define NRF_CLOCK_BASE                    (NRF_CLOCK_regs[NHW_CLKPWR_0])
55 extern NRF_FICR_Type NRF_FICR_regs;
56 #undef NRF_FICR_BASE
57 #define NRF_FICR_BASE                     (&NRF_FICR_regs)
58 extern NRF_PPI_Type NRF_PPI_regs;
59 #undef NRF_PPI_BASE
60 #define NRF_PPI_BASE                      (&NRF_PPI_regs)
61 extern NRF_TIMER_Type NRF_TIMER_regs[];
62 #undef NRF_TIMER0_BASE
63 #define NRF_TIMER0_BASE                   (&NRF_TIMER_regs[0])
64 #undef NRF_TIMER1_BASE
65 #define NRF_TIMER1_BASE                   (&NRF_TIMER_regs[1])
66 #undef NRF_TIMER2_BASE
67 #define NRF_TIMER2_BASE                   (&NRF_TIMER_regs[2])
68 #undef NRF_TIMER3_BASE
69 #define NRF_TIMER3_BASE                   (&NRF_TIMER_regs[3])
70 #undef NRF_TIMER4_BASE
71 #define NRF_TIMER4_BASE                   (&NRF_TIMER_regs[4])
72 #undef NRF_POWER_BASE
73 extern NRF_POWER_Type *NRF_POWER_regs[];
74 #define NRF_POWER_BASE                    (NRF_POWER_regs[NHW_CLKPWR_0])
75 extern NRF_GPIO_Type NRF_GPIO_regs[];
76 #undef NRF_P0_BASE
77 #define NRF_P0_BASE                       (&NRF_GPIO_regs[0])
78 #undef NRF_P1_BASE
79 #define NRF_P1_BASE                       (&NRF_GPIO_regs[1])
80 extern NRF_GPIOTE_Type NRF_GPIOTE_regs;
81 #undef NRF_GPIOTE_BASE
82 #define NRF_GPIOTE_BASE                   (&NRF_GPIOTE_regs)
83 extern NRF_NVMC_Type *NRF_NVMC_regs_p[];
84 #undef NRF_NVMC_BASE
85 #define NRF_NVMC_BASE                     (NRF_NVMC_regs_p[0])
86 extern NRF_EGU_Type NRF_EGU_regs[6];
87 #undef NRF_EGU0_BASE
88 #define NRF_EGU0_BASE                     (&NRF_EGU_regs[0])
89 #undef NRF_EGU1_BASE
90 #define NRF_EGU1_BASE                     (&NRF_EGU_regs[1])
91 #undef NRF_EGU2_BASE
92 #define NRF_EGU2_BASE                     (&NRF_EGU_regs[2])
93 #undef NRF_EGU3_BASE
94 #define NRF_EGU3_BASE                     (&NRF_EGU_regs[3])
95 #undef NRF_EGU4_BASE
96 #define NRF_EGU4_BASE                     (&NRF_EGU_regs[4])
97 #undef NRF_EGU5_BASE
98 #define NRF_EGU5_BASE                     (&NRF_EGU_regs[5])
99 #undef NRF_UICR_BASE
100 extern NRF_UICR_Type *NRF_UICR_regs_p[];
101 #define NRF_UICR_BASE                     (NRF_UICR_regs_p[0])
102 extern NRF_UARTE_Type NRF_UARTE_regs[];
103 #undef NRF_UART0_BASE
104 #define NRF_UART0_BASE                    (&NRF_UARTE_regs[NHW_UART_0])
105 #undef NRF_UARTE0_BASE
106 #define NRF_UARTE0_BASE                   (&NRF_UARTE_regs[NHW_UART_0])
107 #undef NRF_UARTE1_BASE
108 #define NRF_UARTE1_BASE                   (&NRF_UARTE_regs[NHW_UART_1])
109 
110 /********************************************************************/
111 /********************************************************************/
112 /********************************************************************/
113 #elif defined(NRF5340_XXAA_NETWORK)
114 
115 extern void *NRF_FICR_regs_p[];
116 #undef NRF_FICR_NS_BASE
117 #define NRF_FICR_NS_BASE           (NRF_FICR_regs_p[NHW_FICR_NET])
118 extern NRF_UICR_Type *NRF_UICR_regs_p[];
119 #undef NRF_UICR_NS_BASE
120 #define NRF_UICR_NS_BASE           (NRF_UICR_regs_p[NHW_UICR_NET0])
121 #undef NRF_CTI_NS_BASE
122 #define NRF_CTI_NS_BASE            NULL
123 #undef NRF_DCNF_NS_BASE
124 #define NRF_DCNF_NS_BASE           NULL
125 extern NRF_VREQCTRL_Type NRF_VREQCTRL_regs;
126 #undef NRF_VREQCTRL_NS_BASE
127 #define NRF_VREQCTRL_NS_BASE       (&NRF_VREQCTRL_regs)
128 extern NRF_CLOCK_Type *NRF_CLOCK_regs[];
129 #undef NRF_CLOCK_NS_BASE
130 #define NRF_CLOCK_NS_BASE          (NRF_CLOCK_regs[NHW_CLKPWR_NET0])
131 extern NRF_POWER_Type *NRF_POWER_regs[];
132 #undef NRF_POWER_NS_BASE
133 #define NRF_POWER_NS_BASE          (NRF_POWER_regs[NHW_CLKPWR_NET0])
134 extern NRF_RESET_Type *NRF_RESET_regs[];
135 #undef NRF_RESET_NS_BASE
136 #define NRF_RESET_NS_BASE          (NRF_RESET_regs[NHW_CLKPWR_NET0])
137 #undef NRF_CTRLAP_NS_BASE
138 #define NRF_CTRLAP_NS_BASE         NULL
139 extern NRF_RADIO_Type NRF_RADIO_regs;
140 #undef NRF_RADIO_NS_BASE
141 #define NRF_RADIO_NS_BASE          (&NRF_RADIO_regs)
142 extern NRF_RNG_Type NRF_RNG_regs;
143 #undef NRF_RNG_NS_BASE
144 #define NRF_RNG_NS_BASE            (&NRF_RNG_regs)
145 #undef NRF_GPIOTE_NS_BASE
146 #define NRF_GPIOTE_NS_BASE         NULL
147 #undef NRF_WDT_NS_BASE
148 #define NRF_WDT_NS_BASE            NULL
149 #undef NRF_ECB_NS_BASE
150 extern NRF_ECB_Type NRF_ECB_regs;
151 #define NRF_ECB_NS_BASE            (&NRF_ECB_regs)
152 extern NRF_AAR_Type NRF_AAR_regs;
153 #undef NRF_AAR_NS_BASE
154 #define NRF_AAR_NS_BASE            (&NRF_AAR_regs)
155 extern NRF_CCM_Type NRF_CCM_regs;
156 #undef NRF_CCM_NS_BASE
157 #define NRF_CCM_NS_BASE            (&NRF_CCM_regs)
158 extern NRF_DPPIC_Type NRF_DPPIC_regs[];
159 #undef NRF_DPPIC_NS_BASE
160 #define NRF_DPPIC_NS_BASE          (&NRF_DPPIC_regs[NHW_DPPI_NET_0])
161 extern NRF_TEMP_Type NRF_TEMP_regs;
162 #undef NRF_TEMP_NS_BASE
163 #define NRF_TEMP_NS_BASE           (&NRF_TEMP_regs)
164 extern NRF_RTC_Type NRF_RTC_regs[];
165 #undef NRF_RTC0_NS_BASE
166 #define NRF_RTC0_NS_BASE           (&NRF_RTC_regs[NHW_RTC_NET0])
167 #undef NRF_RTC1_NS_BASE
168 #define NRF_RTC1_NS_BASE           (&NRF_RTC_regs[NHW_RTC_NET1])
169 extern NRF_IPC_Type NRF_IPC_regs[NHW_IPC_TOTAL_INST];
170 #undef NRF_IPC_NS_BASE
171 #define NRF_IPC_NS_BASE            (&NRF_IPC_regs[NHW_IPC_NET0])
172 #undef NRF_SPIM0_NS_BASE
173 #define NRF_SPIM0_NS_BASE          NULL
174 #undef NRF_SPIS0_NS_BASE
175 #define NRF_SPIS0_NS_BASE          NULL
176 #undef NRF_TWIM0_NS_BASE
177 #define NRF_TWIM0_NS_BASE          NULL
178 #undef NRF_TWIS0_NS_BASE
179 #define NRF_TWIS0_NS_BASE          NULL
180 extern NRF_UARTE_Type NRF_UARTE_regs[];
181 #undef NRF_UARTE0_NS_BASE
182 #define NRF_UARTE0_NS_BASE         (&NRF_UARTE_regs[NHW_UARTE_NET0])
183 extern NRF_EGU_Type NRF_EGU_regs[];
184 #undef NRF_EGU0_NS_BASE
185 #define NRF_EGU0_NS_BASE           (&NRF_EGU_regs[NHW_EGU_NET0])
186 extern NRF_TIMER_Type NRF_TIMER_regs[];
187 #undef NRF_TIMER0_NS_BASE
188 #define NRF_TIMER0_NS_BASE         (&NRF_TIMER_regs[NHW_TIMER_NET0])
189 #undef NRF_TIMER1_NS_BASE
190 #define NRF_TIMER1_NS_BASE         (&NRF_TIMER_regs[NHW_TIMER_NET1])
191 #undef NRF_TIMER2_NS_BASE
192 #define NRF_TIMER2_NS_BASE         (&NRF_TIMER_regs[NHW_TIMER_NET2])
193 extern int NRF_SWI_regs[];
194 #undef NRF_SWI0_NS_BASE
195 #define NRF_SWI0_NS_BASE           (&NRF_SWI_regs[NHW_SWI_NET0])
196 #undef NRF_SWI1_NS_BASE
197 #define NRF_SWI1_NS_BASE            (&NRF_SWI_regs[NHW_SWI_NET1])
198 #undef NRF_SWI2_NS_BASE
199 #define NRF_SWI2_NS_BASE            (&NRF_SWI_regs[NHW_SWI_NET2])
200 #undef NRF_SWI3_NS_BASE
201 #define NRF_SWI3_NS_BASE            (&NRF_SWI_regs[NHW_SWI_NET3])
202 extern NRF_MUTEX_Type NRF_MUTEX_regs;
203 #undef NRF_APPMUTEX_NS_BASE
204 #define NRF_APPMUTEX_NS_BASE       (&NRF_MUTEX_regs)
205 #undef NRF_APPMUTEX_S_BASE
206 #define NRF_APPMUTEX_S_BASE        (&NRF_MUTEX_regs)
207 #undef NRF_ACL_NS_BASE
208 #define NRF_ACL_NS_BASE            NULL
209 extern NRF_NVMC_Type *NRF_NVMC_regs_p[];
210 #undef NRF_NVMC_NS_BASE
211 #define NRF_NVMC_NS_BASE           (NRF_NVMC_regs_p[NHW_NVMC_NET0])
212 #undef NRF_VMC_NS_BASE
213 #define NRF_VMC_NS_BASE            NULL
214 #undef NRF_P0_NS_BASE
215 #define NRF_P0_NS_BASE             NULL
216 #undef NRF_P1_NS_BASE
217 #define NRF_P1_NS_BASE             NULL
218 
219 /********************************************************************/
220 /********************************************************************/
221 /********************************************************************/
222 #elif defined(NRF5340_XXAA_APPLICATION)
223 
224 #undef NRF_CACHEDATA_S_BASE
225 #define NRF_CACHEDATA_S_BASE        NULL
226 #undef NRF_CACHEINFO_S_BASE
227 #define NRF_CACHEINFO_S_BASE        NULL
228 extern void *NRF_FICR_regs_p[];
229 #undef NRF_FICR_S_BASE
230 #define NRF_FICR_S_BASE             (NRF_FICR_regs_p[NHW_FICR_APP])
231 extern NRF_UICR_Type *NRF_UICR_regs_p[];
232 #undef NRF_UICR_S_BASE
233 #define NRF_UICR_S_BASE             (NRF_UICR_regs_p[NHW_UICR_APP0])
234 #undef NRF_CTI_S_BASE
235 #define NRF_CTI_S_BASE              NULL
236 #undef NRF_TAD_S_BASE
237 #define NRF_TAD_S_BASE              NULL
238 #undef NRF_DCNF_NS_BASE
239 #define NRF_DCNF_NS_BASE            NULL
240 #undef NRF_FPU_NS_BASE
241 #define NRF_FPU_NS_BASE             NULL
242 #undef NRF_DCNF_S_BASE
243 #define NRF_DCNF_S_BASE             NULL
244 #undef NRF_FPU_S_BASE
245 #define NRF_FPU_S_BASE              NULL
246 #undef NRF_CACHE_S_BASE
247 #define NRF_CACHE_S_BASE            NULL
248 #undef NRF_SPU_S_BASE
249 #define NRF_SPU_S_BASE              NULL
250 #undef NRF_OSCILLATORS_NS_BASE
251 #define NRF_OSCILLATORS_NS_BASE     NULL
252 #undef NRF_REGULATORS_NS_BASE
253 #define NRF_REGULATORS_NS_BASE      NULL
254 #undef NRF_OSCILLATORS_S_BASE
255 #define NRF_OSCILLATORS_S_BASE      NULL
256 #undef NRF_REGULATORS_S_BASE
257 #define NRF_REGULATORS_S_BASE       NULL
258 extern NRF_CLOCK_Type *NRF_CLOCK_regs[];
259 #undef NRF_CLOCK_NS_BASE
260 #define NRF_CLOCK_NS_BASE          (NRF_CLOCK_regs[NHW_CLKPWR_APP0])
261 extern NRF_POWER_Type *NRF_POWER_regs[];
262 #undef NRF_POWER_NS_BASE
263 #define NRF_POWER_NS_BASE          (NRF_POWER_regs[NHW_CLKPWR_APP0])
264 extern NRF_RESET_Type *NRF_RESET_regs[];
265 #undef NRF_RESET_NS_BASE
266 #define NRF_RESET_NS_BASE          (NRF_RESET_regs[NHW_CLKPWR_APP0])
267 #undef NRF_CLOCK_S_BASE
268 #define NRF_CLOCK_S_BASE           (NRF_CLOCK_regs[NHW_CLKPWR_APP0])
269 #undef NRF_POWER_S_BASE
270 #define NRF_POWER_S_BASE           (NRF_POWER_regs[NHW_CLKPWR_APP0])
271 #undef NRF_RESET_S_BASE
272 #define NRF_RESET_S_BASE           (NRF_RESET_regs[NHW_CLKPWR_APP0])
273 #undef NRF_CTRLAP_NS_BASE
274 #define NRF_CTRLAP_NS_BASE          NULL
275 #undef NRF_CTRLAP_S_BASE
276 #define NRF_CTRLAP_S_BASE           NULL
277 #undef NRF_SPIM0_NS_BASE
278 #define NRF_SPIM0_NS_BASE           NULL
279 #undef NRF_SPIS0_NS_BASE
280 #define NRF_SPIS0_NS_BASE           NULL
281 #undef NRF_TWIM0_NS_BASE
282 #define NRF_TWIM0_NS_BASE           NULL
283 #undef NRF_TWIS0_NS_BASE
284 #define NRF_TWIS0_NS_BASE           NULL
285 extern NRF_UARTE_Type NRF_UARTE_regs[];
286 #undef NRF_UARTE0_NS_BASE
287 #define NRF_UARTE0_NS_BASE          (&NRF_UARTE_regs[NHW_UARTE_APP0])
288 #undef NRF_SPIM0_S_BASE
289 #define NRF_SPIM0_S_BASE            NULL
290 #undef NRF_SPIS0_S_BASE
291 #define NRF_SPIS0_S_BASE            NULL
292 #undef NRF_TWIM0_S_BASE
293 #define NRF_TWIM0_S_BASE            NULL
294 #undef NRF_TWIS0_S_BASE
295 #define NRF_TWIS0_S_BASE            NULL
296 #undef NRF_UARTE0_S_BASE
297 #define NRF_UARTE0_S_BASE          (&NRF_UARTE_regs[NHW_UARTE_APP0])
298 #undef NRF_SPIM1_NS_BASE
299 #define NRF_SPIM1_NS_BASE           NULL
300 #undef NRF_SPIS1_NS_BASE
301 #define NRF_SPIS1_NS_BASE           NULL
302 #undef NRF_TWIM1_NS_BASE
303 #define NRF_TWIM1_NS_BASE           NULL
304 #undef NRF_TWIS1_NS_BASE
305 #define NRF_TWIS1_NS_BASE           NULL
306 #undef NRF_UARTE1_NS_BASE
307 #define NRF_UARTE1_NS_BASE          (&NRF_UARTE_regs[NHW_UARTE_APP1])
308 #undef NRF_SPIM1_S_BASE
309 #define NRF_SPIM1_S_BASE            NULL
310 #undef NRF_SPIS1_S_BASE
311 #define NRF_SPIS1_S_BASE            NULL
312 #undef NRF_TWIM1_S_BASE
313 #define NRF_TWIM1_S_BASE            NULL
314 #undef NRF_TWIS1_S_BASE
315 #define NRF_TWIS1_S_BASE            NULL
316 #undef NRF_UARTE1_S_BASE
317 #define NRF_UARTE1_S_BASE           (&NRF_UARTE_regs[NHW_UARTE_APP1])
318 #undef NRF_SPIM4_NS_BASE
319 #define NRF_SPIM4_NS_BASE           NULL
320 #undef NRF_SPIM4_S_BASE
321 #define NRF_SPIM4_S_BASE            NULL
322 #undef NRF_SPIM2_NS_BASE
323 #define NRF_SPIM2_NS_BASE           NULL
324 #undef NRF_SPIS2_NS_BASE
325 #define NRF_SPIS2_NS_BASE           NULL
326 #undef NRF_TWIM2_NS_BASE
327 #define NRF_TWIM2_NS_BASE           NULL
328 #undef NRF_TWIS2_NS_BASE
329 #define NRF_TWIS2_NS_BASE           NULL
330 #undef NRF_UARTE2_NS_BASE
331 #define NRF_UARTE2_NS_BASE          (&NRF_UARTE_regs[NHW_UARTE_APP2])
332 #undef NRF_SPIM2_S_BASE
333 #define NRF_SPIM2_S_BASE            NULL
334 #undef NRF_SPIS2_S_BASE
335 #define NRF_SPIS2_S_BASE            NULL
336 #undef NRF_TWIM2_S_BASE
337 #define NRF_TWIM2_S_BASE            NULL
338 #undef NRF_TWIS2_S_BASE
339 #define NRF_TWIS2_S_BASE            NULL
340 #undef NRF_UARTE2_S_BASE
341 #define NRF_UARTE2_S_BASE           (&NRF_UARTE_regs[NHW_UARTE_APP2])
342 #undef NRF_SPIM3_NS_BASE
343 #define NRF_SPIM3_NS_BASE           NULL
344 #undef NRF_SPIS3_NS_BASE
345 #define NRF_SPIS3_NS_BASE           NULL
346 #undef NRF_TWIM3_NS_BASE
347 #define NRF_TWIM3_NS_BASE           NULL
348 #undef NRF_TWIS3_NS_BASE
349 #define NRF_TWIS3_NS_BASE           NULL
350 #undef NRF_UARTE3_NS_BASE
351 #define NRF_UARTE3_NS_BASE          (&NRF_UARTE_regs[NHW_UARTE_APP3])
352 #undef NRF_SPIM3_S_BASE
353 #define NRF_SPIM3_S_BASE            NULL
354 #undef NRF_SPIS3_S_BASE
355 #define NRF_SPIS3_S_BASE            NULL
356 #undef NRF_TWIM3_S_BASE
357 #define NRF_TWIM3_S_BASE            NULL
358 #undef NRF_TWIS3_S_BASE
359 #define NRF_TWIS3_S_BASE            NULL
360 #undef NRF_UARTE3_S_BASE
361 #define NRF_UARTE3_S_BASE           (&NRF_UARTE_regs[NHW_UARTE_APP3])
362 #undef NRF_GPIOTE0_S_BASE
363 #define NRF_GPIOTE0_S_BASE          NULL
364 #undef NRF_SAADC_NS_BASE
365 #define NRF_SAADC_NS_BASE           NULL
366 #undef NRF_SAADC_S_BASE
367 #define NRF_SAADC_S_BASE            NULL
368 extern NRF_TIMER_Type NRF_TIMER_regs[];
369 #undef NRF_TIMER0_NS_BASE
370 #define NRF_TIMER0_NS_BASE          (&NRF_TIMER_regs[NHW_TIMER_APP0])
371 #undef NRF_TIMER0_S_BASE
372 #define NRF_TIMER0_S_BASE           (&NRF_TIMER_regs[NHW_TIMER_APP0])
373 #undef NRF_TIMER1_NS_BASE
374 #define NRF_TIMER1_NS_BASE          (&NRF_TIMER_regs[NHW_TIMER_APP1])
375 #undef NRF_TIMER1_S_BASE
376 #define NRF_TIMER1_S_BASE           (&NRF_TIMER_regs[NHW_TIMER_APP1])
377 #undef NRF_TIMER2_NS_BASE
378 #define NRF_TIMER2_NS_BASE          (&NRF_TIMER_regs[NHW_TIMER_APP2])
379 #undef NRF_TIMER2_S_BASE
380 #define NRF_TIMER2_S_BASE           (&NRF_TIMER_regs[NHW_TIMER_APP2])
381 extern NRF_RTC_Type NRF_RTC_regs[];
382 #undef NRF_RTC0_NS_BASE
383 #define NRF_RTC0_NS_BASE            (&NRF_RTC_regs[NHW_RTC_APP0])
384 #undef NRF_RTC0_S_BASE
385 #define NRF_RTC0_S_BASE             (&NRF_RTC_regs[NHW_RTC_APP0])
386 #undef NRF_RTC1_NS_BASE
387 #define NRF_RTC1_NS_BASE            (&NRF_RTC_regs[NHW_RTC_APP1])
388 #undef NRF_RTC1_S_BASE
389 #define NRF_RTC1_S_BASE             (&NRF_RTC_regs[NHW_RTC_APP1])
390 extern NRF_DPPIC_Type NRF_DPPIC_regs[];
391 #undef NRF_DPPIC_NS_BASE
392 #define NRF_DPPIC_NS_BASE           (&NRF_DPPIC_regs[NHW_DPPI_APP_0])
393 #undef NRF_DPPIC_S_BASE
394 #define NRF_DPPIC_S_BASE            (&NRF_DPPIC_regs[NHW_DPPI_APP_0])
395 #undef NRF_WDT0_NS_BASE
396 #define NRF_WDT0_NS_BASE            NULL
397 #undef NRF_WDT0_S_BASE
398 #define NRF_WDT0_S_BASE             NULL
399 #undef NRF_WDT1_NS_BASE
400 #define NRF_WDT1_NS_BASE            NULL
401 #undef NRF_WDT1_S_BASE
402 #define NRF_WDT1_S_BASE             NULL
403 #undef NRF_COMP_NS_BASE
404 #define NRF_COMP_NS_BASE            NULL
405 #undef NRF_LPCOMP_NS_BASE
406 #define NRF_LPCOMP_NS_BASE          NULL
407 #undef NRF_COMP_S_BASE
408 #define NRF_COMP_S_BASE             NULL
409 #undef NRF_LPCOMP_S_BASE
410 #define NRF_LPCOMP_S_BASE           NULL
411 extern NRF_EGU_Type NRF_EGU_regs[];
412 #undef NRF_EGU0_NS_BASE
413 #define NRF_EGU0_NS_BASE           (&NRF_EGU_regs[NHW_EGU_APP0])
414 #undef NRF_EGU0_S_BASE
415 #define NRF_EGU0_S_BASE            (&NRF_EGU_regs[NHW_EGU_APP0])
416 #undef NRF_EGU1_NS_BASE
417 #define NRF_EGU1_NS_BASE           (&NRF_EGU_regs[NHW_EGU_APP1])
418 #undef NRF_EGU1_S_BASE
419 #define NRF_EGU1_S_BASE            (&NRF_EGU_regs[NHW_EGU_APP1])
420 #undef NRF_EGU2_NS_BASE
421 #define NRF_EGU2_NS_BASE           (&NRF_EGU_regs[NHW_EGU_APP2])
422 #undef NRF_EGU2_S_BASE
423 #define NRF_EGU2_S_BASE            (&NRF_EGU_regs[NHW_EGU_APP2])
424 #undef NRF_EGU3_NS_BASE
425 #define NRF_EGU3_NS_BASE           (&NRF_EGU_regs[NHW_EGU_APP3])
426 #undef NRF_EGU3_S_BASE
427 #define NRF_EGU3_S_BASE            (&NRF_EGU_regs[NHW_EGU_APP3])
428 #undef NRF_EGU4_NS_BASE
429 #define NRF_EGU4_NS_BASE           (&NRF_EGU_regs[NHW_EGU_APP4])
430 #undef NRF_EGU4_S_BASE
431 #define NRF_EGU4_S_BASE            (&NRF_EGU_regs[NHW_EGU_APP4])
432 #undef NRF_EGU5_NS_BASE
433 #define NRF_EGU5_NS_BASE           (&NRF_EGU_regs[NHW_EGU_APP5])
434 #undef NRF_EGU5_S_BASE
435 #define NRF_EGU5_S_BASE            (&NRF_EGU_regs[NHW_EGU_APP5])
436 #undef NRF_PWM0_NS_BASE
437 #define NRF_PWM0_NS_BASE            NULL
438 #undef NRF_PWM0_S_BASE
439 #define NRF_PWM0_S_BASE             NULL
440 #undef NRF_PWM1_NS_BASE
441 #define NRF_PWM1_NS_BASE            NULL
442 #undef NRF_PWM1_S_BASE
443 #define NRF_PWM1_S_BASE             NULL
444 #undef NRF_PWM2_NS_BASE
445 #define NRF_PWM2_NS_BASE            NULL
446 #undef NRF_PWM2_S_BASE
447 #define NRF_PWM2_S_BASE             NULL
448 #undef NRF_PWM3_NS_BASE
449 #define NRF_PWM3_NS_BASE            NULL
450 #undef NRF_PWM3_S_BASE
451 #define NRF_PWM3_S_BASE             NULL
452 #undef NRF_PDM0_NS_BASE
453 #define NRF_PDM0_NS_BASE            NULL
454 #undef NRF_PDM0_S_BASE
455 #define NRF_PDM0_S_BASE             NULL
456 #undef NRF_I2S0_NS_BASE
457 #define NRF_I2S0_NS_BASE            NULL
458 #undef NRF_I2S0_S_BASE
459 #define NRF_I2S0_S_BASE             NULL
460 extern NRF_IPC_Type NRF_IPC_regs[NHW_IPC_TOTAL_INST];
461 #undef NRF_IPC_NS_BASE
462 #define NRF_IPC_NS_BASE             (&NRF_IPC_regs[NHW_IPC_APP0])
463 #undef NRF_IPC_S_BASE
464 #define NRF_IPC_S_BASE              (&NRF_IPC_regs[NHW_IPC_APP0])
465 #undef NRF_QSPI_NS_BASE
466 #define NRF_QSPI_NS_BASE            NULL
467 #undef NRF_QSPI_S_BASE
468 #define NRF_QSPI_S_BASE             NULL
469 #undef NRF_NFCT_NS_BASE
470 #define NRF_NFCT_NS_BASE            NULL
471 #undef NRF_NFCT_S_BASE
472 #define NRF_NFCT_S_BASE             NULL
473 #undef NRF_GPIOTE1_NS_BASE
474 #define NRF_GPIOTE1_NS_BASE         NULL
475 extern NRF_MUTEX_Type NRF_MUTEX_regs;
476 #undef NRF_MUTEX_NS_BASE
477 #define NRF_MUTEX_NS_BASE           (&NRF_MUTEX_regs)
478 #undef NRF_MUTEX_S_BASE
479 #define NRF_MUTEX_S_BASE            (&NRF_MUTEX_regs)
480 #undef NRF_QDEC0_NS_BASE
481 #define NRF_QDEC0_NS_BASE           NULL
482 #undef NRF_QDEC0_S_BASE
483 #define NRF_QDEC0_S_BASE            NULL
484 #undef NRF_QDEC1_NS_BASE
485 #define NRF_QDEC1_NS_BASE           NULL
486 #undef NRF_QDEC1_S_BASE
487 #define NRF_QDEC1_S_BASE            NULL
488 #undef NRF_USBD_NS_BASE
489 #define NRF_USBD_NS_BASE            NULL
490 #undef NRF_USBD_S_BASE
491 #define NRF_USBD_S_BASE             NULL
492 #undef NRF_USBREGULATOR_NS_BASE
493 #define NRF_USBREGULATOR_NS_BASE    NULL
494 #undef NRF_USBREGULATOR_S_BASE
495 #define NRF_USBREGULATOR_S_BASE     NULL
496 #undef NRF_KMU_NS_BASE
497 #define NRF_KMU_NS_BASE             NULL
498 extern NRF_NVMC_Type *NRF_NVMC_regs_p[];
499 #undef NRF_NVMC_NS_BASE
500 #define NRF_NVMC_NS_BASE            (NRF_NVMC_regs_p[NHW_NVMC_APP0])
501 #undef NRF_KMU_S_BASE
502 #define NRF_KMU_S_BASE              NULL
503 #undef NRF_NVMC_S_BASE
504 #define NRF_NVMC_S_BASE             (NRF_NVMC_regs_p[NHW_NVMC_APP0])
505 #undef NRF_P0_NS_BASE
506 #define NRF_P0_NS_BASE              NULL
507 #undef NRF_P1_NS_BASE
508 #define NRF_P1_NS_BASE              NULL
509 #undef NRF_P0_S_BASE
510 #define NRF_P0_S_BASE               NULL
511 #undef NRF_P1_S_BASE
512 #define NRF_P1_S_BASE               NULL
513 #undef NRF_CRYPTOCELL_S_BASE
514 #define NRF_CRYPTOCELL_S_BASE       NULL
515 #undef NRF_VMC_NS_BASE
516 #define NRF_VMC_NS_BASE             NULL
517 #undef NRF_VMC_S_BASE
518 #define NRF_VMC_S_BASE              NULL
519 
520 /********************************************************************/
521 /********************************************************************/
522 /********************************************************************/
523 #elif defined(NRF54L15_XXAA)
524 
525 extern NRF_FICR_Type NRF_FICR_regs;
526 #undef NRF_FICR_NS_BASE
527 #define NRF_FICR_NS_BASE (&NRF_FICR_regs)
528 extern NRF_UICR_Type *NRF_UICR_regs_p[];
529 #undef NRF_UICR_S_BASE
530 #define NRF_UICR_S_BASE (NRF_UICR_regs_p[0])
531 #undef NRF_SICR_S_BASE
532 #define NRF_SICR_S_BASE NULL
533 #undef NRF_CRACENCORE_S_BASE
534 #define NRF_CRACENCORE_S_BASE NULL
535 #undef NRF_SPU00_S_BASE
536 #define NRF_SPU00_S_BASE NULL
537 #undef NRF_MPC00_S_BASE
538 #define NRF_MPC00_S_BASE NULL
539 extern NRF_DPPIC_Type NRF_DPPIC_regs[];
540 #undef NRF_DPPIC00_NS_BASE
541 #define NRF_DPPIC00_NS_BASE (&NRF_DPPIC_regs[NHW_DPPI_00])
542 #undef NRF_DPPIC00_S_BASE
543 #define NRF_DPPIC00_S_BASE (&NRF_DPPIC_regs[NHW_DPPI_00])
544 extern NRF_PPIB_Type NRF_PPIB_regs[];
545 #undef NRF_PPIB00_NS_BASE
546 #define NRF_PPIB00_NS_BASE (&NRF_PPIB_regs[NHW_PPIB_00])
547 #undef NRF_PPIB00_S_BASE
548 #define NRF_PPIB00_S_BASE (&NRF_PPIB_regs[NHW_PPIB_00])
549 #undef NRF_PPIB01_NS_BASE
550 #define NRF_PPIB01_NS_BASE (&NRF_PPIB_regs[NHW_PPIB_01])
551 #undef NRF_PPIB01_S_BASE
552 #define NRF_PPIB01_S_BASE (&NRF_PPIB_regs[NHW_PPIB_01])
553 #undef NRF_KMU_S_BASE
554 #define NRF_KMU_S_BASE NULL
555 #undef NRF_AAR00_NS_BASE
556 #define NRF_AAR00_NS_BASE NULL
557 #undef NRF_CCM00_NS_BASE
558 #define NRF_CCM00_NS_BASE NULL
559 #undef NRF_AAR00_S_BASE
560 #define NRF_AAR00_S_BASE NULL
561 #undef NRF_CCM00_S_BASE
562 #define NRF_CCM00_S_BASE NULL
563 #undef NRF_ECB00_NS_BASE
564 #define NRF_ECB00_NS_BASE NULL
565 #undef NRF_ECB00_S_BASE
566 #define NRF_ECB00_S_BASE NULL
567 #undef NRF_CRACEN_S_BASE
568 #define NRF_CRACEN_S_BASE NULL
569 #undef NRF_SPIM00_NS_BASE
570 #define NRF_SPIM00_NS_BASE NULL
571 #undef NRF_SPIS00_NS_BASE
572 #define NRF_SPIS00_NS_BASE NULL
573 #undef NRF_UARTE00_NS_BASE
574 #define NRF_UARTE00_NS_BASE NULL
575 #undef NRF_SPIM00_S_BASE
576 #define NRF_SPIM00_S_BASE NULL
577 #undef NRF_SPIS00_S_BASE
578 #define NRF_SPIS00_S_BASE NULL
579 #undef NRF_UARTE00_S_BASE
580 #define NRF_UARTE00_S_BASE NULL
581 #undef NRF_GLITCHDET_S_BASE
582 #define NRF_GLITCHDET_S_BASE NULL
583 extern void* nhw_RRAMC_get_RRAM_base_address(unsigned int inst);
584 #define NRF_RRAM_BASE_ADDR ((uintptr_t)nhw_RRAMC_get_RRAM_base_address(0))
585 extern NRF_RRAMC_Type *NRF_RRAMC_regs_p[];
586 #undef NRF_RRAMC_S_BASE
587 #define NRF_RRAMC_S_BASE (NRF_RRAMC_regs_p[0])
588 #undef NRF_VPR00_NS_BASE
589 #define NRF_VPR00_NS_BASE NULL
590 #undef NRF_VPR00_S_BASE
591 #define NRF_VPR00_S_BASE NULL
592 #undef NRF_P2_NS_BASE
593 #define NRF_P2_NS_BASE NULL
594 #undef NRF_P2_S_BASE
595 #define NRF_P2_S_BASE NULL
596 #undef NRF_CTRLAP_NS_BASE
597 #define NRF_CTRLAP_NS_BASE NULL
598 #undef NRF_CTRLAP_S_BASE
599 #define NRF_CTRLAP_S_BASE NULL
600 #undef NRF_TAD_NS_BASE
601 #define NRF_TAD_NS_BASE NULL
602 #undef NRF_TAD_S_BASE
603 #define NRF_TAD_S_BASE NULL
604 extern NRF_TIMER_Type NRF_TIMER_regs[];
605 #undef NRF_TIMER00_NS_BASE
606 #define NRF_TIMER00_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_00])
607 #undef NRF_TIMER00_S_BASE
608 #define NRF_TIMER00_S_BASE (&NRF_TIMER_regs[NHW_TIMER_00])
609 #undef NRF_SPU10_S_BASE
610 #define NRF_SPU10_S_BASE NULL
611 #undef NRF_DPPIC10_NS_BASE
612 #define NRF_DPPIC10_NS_BASE (&NRF_DPPIC_regs[NHW_DPPI_10])
613 #undef NRF_DPPIC10_S_BASE
614 #define NRF_DPPIC10_S_BASE (&NRF_DPPIC_regs[NHW_DPPI_10])
615 #undef NRF_PPIB10_NS_BASE
616 #define NRF_PPIB10_NS_BASE (&NRF_PPIB_regs[NHW_PPIB_10])
617 #undef NRF_PPIB10_S_BASE
618 #define NRF_PPIB10_S_BASE (&NRF_PPIB_regs[NHW_PPIB_10])
619 #undef NRF_PPIB11_NS_BASE
620 #define NRF_PPIB11_NS_BASE (&NRF_PPIB_regs[NHW_PPIB_11])
621 #undef NRF_PPIB11_S_BASE
622 #define NRF_PPIB11_S_BASE (&NRF_PPIB_regs[NHW_PPIB_11])
623 #undef NRF_TIMER10_NS_BASE
624 #define NRF_TIMER10_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_10])
625 #undef NRF_TIMER10_S_BASE
626 #define NRF_TIMER10_S_BASE (&NRF_TIMER_regs[NHW_TIMER_10])
627 extern NRF_RTC_Type NRF_RTC_regs[];
628 #undef NRF_RTC10_NS_BASE
629 #define NRF_RTC10_NS_BASE (&NRF_RTC_regs[NHW_RTC_10])
630 #undef NRF_RTC10_S_BASE
631 #define NRF_RTC10_S_BASE (&NRF_RTC_regs[NHW_RTC_10])
632 extern NRF_EGU_Type NRF_EGU_regs[];
633 #undef NRF_EGU10_NS_BASE
634 #define NRF_EGU10_NS_BASE (&NRF_EGU_regs[NHW_EGU_10])
635 #undef NRF_EGU10_S_BASE
636 #define NRF_EGU10_S_BASE (&NRF_EGU_regs[NHW_EGU_10])
637 extern NRF_RADIO_Type NRF_RADIO_regs;
638 #undef NRF_RADIO_NS_BASE
639 #define NRF_RADIO_NS_BASE (&NRF_RADIO_regs)
640 #undef NRF_RADIO_S_BASE
641 #define NRF_RADIO_S_BASE (&NRF_RADIO_regs)
642 #undef NRF_SPU20_S_BASE
643 #define NRF_SPU20_S_BASE NULL
644 #undef NRF_DPPIC20_NS_BASE
645 #define NRF_DPPIC20_NS_BASE (&NRF_DPPIC_regs[NHW_DPPI_20])
646 #undef NRF_DPPIC20_S_BASE
647 #define NRF_DPPIC20_S_BASE (&NRF_DPPIC_regs[NHW_DPPI_20])
648 #undef NRF_PPIB20_NS_BASE
649 #define NRF_PPIB20_NS_BASE (&NRF_PPIB_regs[NHW_PPIB_20])
650 #undef NRF_PPIB20_S_BASE
651 #define NRF_PPIB20_S_BASE (&NRF_PPIB_regs[NHW_PPIB_20])
652 #undef NRF_PPIB21_NS_BASE
653 #define NRF_PPIB21_NS_BASE (&NRF_PPIB_regs[NHW_PPIB_21])
654 #undef NRF_PPIB21_S_BASE
655 #define NRF_PPIB21_S_BASE (&NRF_PPIB_regs[NHW_PPIB_21])
656 #undef NRF_PPIB22_NS_BASE
657 #define NRF_PPIB22_NS_BASE (&NRF_PPIB_regs[NHW_PPIB_22])
658 #undef NRF_PPIB22_S_BASE
659 #define NRF_PPIB22_S_BASE (&NRF_PPIB_regs[NHW_PPIB_22])
660 #undef NRF_SPIM20_NS_BASE
661 #define NRF_SPIM20_NS_BASE NULL
662 #undef NRF_SPIS20_NS_BASE
663 #define NRF_SPIS20_NS_BASE NULL
664 #undef NRF_TWIM20_NS_BASE
665 #define NRF_TWIM20_NS_BASE NULL
666 #undef NRF_TWIS20_NS_BASE
667 #define NRF_TWIS20_NS_BASE NULL
668 #undef NRF_UARTE20_NS_BASE
669 #define NRF_UARTE20_NS_BASE NULL
670 #undef NRF_SPIM20_S_BASE
671 #define NRF_SPIM20_S_BASE NULL
672 #undef NRF_SPIS20_S_BASE
673 #define NRF_SPIS20_S_BASE NULL
674 #undef NRF_TWIM20_S_BASE
675 #define NRF_TWIM20_S_BASE NULL
676 #undef NRF_TWIS20_S_BASE
677 #define NRF_TWIS20_S_BASE NULL
678 #undef NRF_UARTE20_S_BASE
679 #define NRF_UARTE20_S_BASE NULL
680 #undef NRF_SPIM21_NS_BASE
681 #define NRF_SPIM21_NS_BASE NULL
682 #undef NRF_SPIS21_NS_BASE
683 #define NRF_SPIS21_NS_BASE NULL
684 #undef NRF_TWIM21_NS_BASE
685 #define NRF_TWIM21_NS_BASE NULL
686 #undef NRF_TWIS21_NS_BASE
687 #define NRF_TWIS21_NS_BASE NULL
688 #undef NRF_UARTE21_NS_BASE
689 #define NRF_UARTE21_NS_BASE NULL
690 #undef NRF_SPIM21_S_BASE
691 #define NRF_SPIM21_S_BASE NULL
692 #undef NRF_SPIS21_S_BASE
693 #define NRF_SPIS21_S_BASE NULL
694 #undef NRF_TWIM21_S_BASE
695 #define NRF_TWIM21_S_BASE NULL
696 #undef NRF_TWIS21_S_BASE
697 #define NRF_TWIS21_S_BASE NULL
698 #undef NRF_UARTE21_S_BASE
699 #define NRF_UARTE21_S_BASE NULL
700 #undef NRF_SPIM22_NS_BASE
701 #define NRF_SPIM22_NS_BASE NULL
702 #undef NRF_SPIS22_NS_BASE
703 #define NRF_SPIS22_NS_BASE NULL
704 #undef NRF_TWIM22_NS_BASE
705 #define NRF_TWIM22_NS_BASE NULL
706 #undef NRF_TWIS22_NS_BASE
707 #define NRF_TWIS22_NS_BASE NULL
708 #undef NRF_UARTE22_NS_BASE
709 #define NRF_UARTE22_NS_BASE NULL
710 #undef NRF_SPIM22_S_BASE
711 #define NRF_SPIM22_S_BASE NULL
712 #undef NRF_SPIS22_S_BASE
713 #define NRF_SPIS22_S_BASE NULL
714 #undef NRF_TWIM22_S_BASE
715 #define NRF_TWIM22_S_BASE NULL
716 #undef NRF_TWIS22_S_BASE
717 #define NRF_TWIS22_S_BASE NULL
718 #undef NRF_UARTE22_S_BASE
719 #define NRF_UARTE22_S_BASE NULL
720 #undef NRF_EGU20_NS_BASE
721 #define NRF_EGU20_NS_BASE (&NRF_EGU_regs[NHW_EGU_20])
722 #undef NRF_EGU20_S_BASE
723 #define NRF_EGU20_S_BASE (&NRF_EGU_regs[NHW_EGU_20])
724 #undef NRF_TIMER20_NS_BASE
725 #define NRF_TIMER20_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_20])
726 #undef NRF_TIMER20_S_BASE
727 #define NRF_TIMER20_S_BASE (&NRF_TIMER_regs[NHW_TIMER_20])
728 #undef NRF_TIMER21_NS_BASE
729 #define NRF_TIMER21_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_21])
730 #undef NRF_TIMER21_S_BASE
731 #define NRF_TIMER21_S_BASE (&NRF_TIMER_regs[NHW_TIMER_21])
732 #undef NRF_TIMER22_NS_BASE
733 #define NRF_TIMER22_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_22])
734 #undef NRF_TIMER22_S_BASE
735 #define NRF_TIMER22_S_BASE (&NRF_TIMER_regs[NHW_TIMER_22])
736 #undef NRF_TIMER23_NS_BASE
737 #define NRF_TIMER23_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_23])
738 #undef NRF_TIMER23_S_BASE
739 #define NRF_TIMER23_S_BASE (&NRF_TIMER_regs[NHW_TIMER_23])
740 #undef NRF_TIMER24_NS_BASE
741 #define NRF_TIMER24_NS_BASE (&NRF_TIMER_regs[NHW_TIMER_24])
742 #undef NRF_TIMER24_S_BASE
743 #define NRF_TIMER24_S_BASE (&NRF_TIMER_regs[NHW_TIMER_24])
744 #undef NRF_MEMCONF_NS_BASE
745 #define NRF_MEMCONF_NS_BASE NULL
746 #undef NRF_MEMCONF_S_BASE
747 #define NRF_MEMCONF_S_BASE NULL
748 #undef NRF_PDM20_NS_BASE
749 #define NRF_PDM20_NS_BASE NULL
750 #undef NRF_PDM20_S_BASE
751 #define NRF_PDM20_S_BASE NULL
752 #undef NRF_PDM21_NS_BASE
753 #define NRF_PDM21_NS_BASE NULL
754 #undef NRF_PDM21_S_BASE
755 #define NRF_PDM21_S_BASE NULL
756 #undef NRF_PWM20_NS_BASE
757 #define NRF_PWM20_NS_BASE NULL
758 #undef NRF_PWM20_S_BASE
759 #define NRF_PWM20_S_BASE NULL
760 #undef NRF_PWM21_NS_BASE
761 #define NRF_PWM21_NS_BASE NULL
762 #undef NRF_PWM21_S_BASE
763 #define NRF_PWM21_S_BASE NULL
764 #undef NRF_PWM22_NS_BASE
765 #define NRF_PWM22_NS_BASE NULL
766 #undef NRF_PWM22_S_BASE
767 #define NRF_PWM22_S_BASE NULL
768 #undef NRF_SAADC_NS_BASE
769 #define NRF_SAADC_NS_BASE NULL
770 #undef NRF_SAADC_S_BASE
771 #define NRF_SAADC_S_BASE NULL
772 #undef NRF_NFCT_NS_BASE
773 #define NRF_NFCT_NS_BASE NULL
774 #undef NRF_NFCT_S_BASE
775 #define NRF_NFCT_S_BASE NULL
776 #undef NRF_TEMP_NS_BASE
777 #define NRF_TEMP_NS_BASE NULL
778 #undef NRF_TEMP_S_BASE
779 #define NRF_TEMP_S_BASE NULL
780 #undef NRF_P1_NS_BASE
781 #define NRF_P1_NS_BASE NULL
782 #undef NRF_P1_S_BASE
783 #define NRF_P1_S_BASE NULL
784 #undef NRF_GPIOTE20_NS_BASE
785 #define NRF_GPIOTE20_NS_BASE NULL
786 #undef NRF_GPIOTE20_S_BASE
787 #define NRF_GPIOTE20_S_BASE NULL
788 #undef NRF_TAMPC_S_BASE
789 #define NRF_TAMPC_S_BASE NULL
790 #undef NRF_I2S20_NS_BASE
791 #define NRF_I2S20_NS_BASE NULL
792 #undef NRF_I2S20_S_BASE
793 #define NRF_I2S20_S_BASE NULL
794 #undef NRF_QDEC20_NS_BASE
795 #define NRF_QDEC20_NS_BASE NULL
796 #undef NRF_QDEC20_S_BASE
797 #define NRF_QDEC20_S_BASE NULL
798 #undef NRF_QDEC21_NS_BASE
799 #define NRF_QDEC21_NS_BASE NULL
800 #undef NRF_QDEC21_S_BASE
801 #define NRF_QDEC21_S_BASE NULL
802 extern NRF_GRTC_Type NRF_GRTC_regs;
803 #undef NRF_GRTC_NS_BASE
804 #define NRF_GRTC_NS_BASE (&NRF_GRTC_regs)
805 #undef NRF_GRTC_S_BASE
806 #define NRF_GRTC_S_BASE (&NRF_GRTC_regs)
807 #undef NRF_SPU30_S_BASE
808 #define NRF_SPU30_S_BASE NULL
809 #undef NRF_DPPIC30_NS_BASE
810 #define NRF_DPPIC30_NS_BASE (&NRF_DPPIC_regs[NHW_DPPI_30])
811 #undef NRF_DPPIC30_S_BASE
812 #define NRF_DPPIC30_S_BASE (&NRF_DPPIC_regs[NHW_DPPI_30])
813 #undef NRF_PPIB30_NS_BASE
814 #define NRF_PPIB30_NS_BASE (&NRF_PPIB_regs[NHW_PPIB_30])
815 #undef NRF_PPIB30_S_BASE
816 #define NRF_PPIB30_S_BASE (&NRF_PPIB_regs[NHW_PPIB_30])
817 #undef NRF_SPIM30_NS_BASE
818 #define NRF_SPIM30_NS_BASE NULL
819 #undef NRF_SPIS30_NS_BASE
820 #define NRF_SPIS30_NS_BASE NULL
821 #undef NRF_TWIM30_NS_BASE
822 #define NRF_TWIM30_NS_BASE NULL
823 #undef NRF_TWIS30_NS_BASE
824 #define NRF_TWIS30_NS_BASE NULL
825 #undef NRF_UARTE30_NS_BASE
826 #define NRF_UARTE30_NS_BASE NULL
827 #undef NRF_SPIM30_S_BASE
828 #define NRF_SPIM30_S_BASE NULL
829 #undef NRF_SPIS30_S_BASE
830 #define NRF_SPIS30_S_BASE NULL
831 #undef NRF_TWIM30_S_BASE
832 #define NRF_TWIM30_S_BASE NULL
833 #undef NRF_TWIS30_S_BASE
834 #define NRF_TWIS30_S_BASE NULL
835 #undef NRF_UARTE30_S_BASE
836 #define NRF_UARTE30_S_BASE NULL
837 #undef NRF_RTC30_NS_BASE
838 #define NRF_RTC30_NS_BASE (&NRF_RTC_regs[NHW_RTC_30])
839 #undef NRF_RTC30_S_BASE
840 #define NRF_RTC30_S_BASE (&NRF_RTC_regs[NHW_RTC_30])
841 #undef NRF_COMP_NS_BASE
842 #define NRF_COMP_NS_BASE NULL
843 #undef NRF_LPCOMP_NS_BASE
844 #define NRF_LPCOMP_NS_BASE NULL
845 #undef NRF_COMP_S_BASE
846 #define NRF_COMP_S_BASE NULL
847 #undef NRF_LPCOMP_S_BASE
848 #define NRF_LPCOMP_S_BASE NULL
849 #undef NRF_WDT30_S_BASE
850 #define NRF_WDT30_S_BASE NULL
851 #undef NRF_WDT31_NS_BASE
852 #define NRF_WDT31_NS_BASE NULL
853 #undef NRF_WDT31_S_BASE
854 #define NRF_WDT31_S_BASE NULL
855 #undef NRF_P0_NS_BASE
856 #define NRF_P0_NS_BASE NULL
857 #undef NRF_P0_S_BASE
858 #define NRF_P0_S_BASE NULL
859 #undef NRF_GPIOTE30_NS_BASE
860 #define NRF_GPIOTE30_NS_BASE NULL
861 #undef NRF_GPIOTE30_S_BASE
862 #define NRF_GPIOTE30_S_BASE NULL
863 extern NRF_CLOCK_Type *NRF_CLOCK_regs[];
864 #undef NRF_CLOCK_NS_BASE
865 #define NRF_CLOCK_NS_BASE (NRF_CLOCK_regs[NHW_CLKPWR_0])
866 extern NRF_POWER_Type *NRF_POWER_regs[];
867 #undef NRF_POWER_NS_BASE
868 #define NRF_POWER_NS_BASE (NRF_POWER_regs[NHW_CLKPWR_0])
869 extern NRF_RESET_Type *NRF_RESET_regs[];
870 #undef NRF_RESET_NS_BASE
871 #define NRF_RESET_NS_BASE (NRF_RESET_regs[NHW_CLKPWR_0])
872 #undef NRF_CLOCK_S_BASE
873 #define NRF_CLOCK_S_BASE (NRF_CLOCK_regs[NHW_CLKPWR_0])
874 #undef NRF_POWER_S_BASE
875 #define NRF_POWER_S_BASE (NRF_POWER_regs[NHW_CLKPWR_0])
876 #undef NRF_RESET_S_BASE
877 #define NRF_RESET_S_BASE (NRF_RESET_regs[NHW_CLKPWR_0])
878 #undef NRF_OSCILLATORS_NS_BASE
879 #define NRF_OSCILLATORS_NS_BASE NULL
880 #undef NRF_REGULATORS_NS_BASE
881 #define NRF_REGULATORS_NS_BASE NULL
882 #undef NRF_OSCILLATORS_S_BASE
883 #define NRF_OSCILLATORS_S_BASE NULL
884 #undef NRF_REGULATORS_S_BASE
885 #define NRF_REGULATORS_S_BASE NULL
886 
887 #else
888 #error "Platform not supported"
889 # endif
890 
891 #ifdef __cplusplus
892 }
893 #endif
894 
895 #endif /* NRF_BSIM_REDEF_H */
896