1 /*
2  * Copyright (c) 2020 Nordic Semiconductor ASA
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * Mocks the CMSIS dependency of the nRF MDK headers.
9  */
10 
11 #ifndef CORE_CM4__
12 #define CORE_CM4__
13 
14 #define __I
15 #define __IO
16 #define __O
17 
18 /**
19  * The model of the CPU & IRQ controller driver must provide
20  * these functions below. These HW models do not provide them
21  */
22 extern void __WFE(void);
23 extern void __SEV(void);
24 extern void NVIC_SetPendingIRQ(IRQn_Type IRQn);
25 extern void NVIC_ClearPendingIRQ(IRQn_Type IRQn);
26 
27 /* Implement the following ARM intrinsics as no-op:
28  * - ARM Data Synchronization Barrier
29  * - ARM Data Memory Synchronization Barrier
30  * - ARM Instruction Synchronization Barrier
31  * - ARM No Operation
32  */
33 #ifndef __DMB
34 #define __DMB()
35 #endif
36 
37 #ifndef __DSB
38 #define __DSB()
39 #endif
40 
41 #ifndef __ISB
42 #define __ISB()
43 #endif
44 
45 #ifndef __NOP
46 #define __NOP()
47 #endif
48 
49 #endif
50