1 /*
2 * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <stdio.h>
8 #include <string.h>
9
10 #include <bootutil/bootutil_log.h>
11
12 #include <esp_rom_uart.h>
13 #include <esp_rom_gpio.h>
14 #include <esp_rom_sys.h>
15 #include <esp_rom_caps.h>
16 #include <soc/uart_periph.h>
17 #include <soc/gpio_struct.h>
18 #include <soc/io_mux_reg.h>
19 #include <soc/rtc.h>
20 #include <hal/gpio_types.h>
21 #include <hal/gpio_ll.h>
22 #include <hal/uart_ll.h>
23 #include <hal/clk_gate_ll.h>
24 #include <hal/gpio_hal.h>
25
26 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT
27 #define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT
28 #else
29 #define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_5
30 #endif
31
32 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL
33 #define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL
34 #else
35 #define SERIAL_BOOT_GPIO_DETECT_VAL 1
36 #endif
37
38 #ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S
39 #define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S
40 #else
41 #define SERIAL_BOOT_DETECT_DELAY_S 5
42 #endif
43
44 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE
45 #define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE
46 #else
47 // pull-down
48 #define SERIAL_BOOT_GPIO_INPUT_TYPE 0
49 #endif
50
51 #ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM
52 #define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM
53 #else
54 #define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1
55 #endif
56
57 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX
58 #define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX
59 #else
60 #define SERIAL_BOOT_GPIO_RX GPIO_NUM_18
61 #endif
62
63 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX
64 #define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX
65 #else
66 #define SERIAL_BOOT_GPIO_TX GPIO_NUM_17
67 #endif
68
69 static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ?
70 &UART0 :
71 &UART1;
72
console_write(const char * str,int cnt)73 void console_write(const char *str, int cnt)
74 {
75 uint32_t tx_len;
76 uint32_t write_len;
77
78 do {
79 tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev);
80 if (tx_len > 0) {
81 write_len = tx_len < cnt ? tx_len : cnt;
82 uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, write_len);
83 cnt -= write_len;
84 }
85 MCUBOOT_WATCHDOG_FEED();
86 esp_rom_delay_us(1000);
87 } while (cnt > 0);
88 }
89
console_read(char * str,int cnt,int * newline)90 int console_read(char *str, int cnt, int *newline)
91 {
92 uint32_t len = 0;
93 uint32_t read_len = 0;
94 bool stop = false;
95
96 do {
97 len = uart_ll_get_rxfifo_len(serial_boot_uart_dev);
98
99 if (len > 0) {
100 for (uint32_t i = 0; i < len; i++) {
101 /* Read the character from the RX FIFO */
102 uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1);
103 read_len++;
104 if (read_len == cnt - 1|| str[read_len - 1] == '\n') {
105 stop = true;
106 break;
107 }
108 }
109 }
110 MCUBOOT_WATCHDOG_FEED();
111 esp_rom_delay_us(1000);
112 } while (!stop);
113 *newline = (str[read_len - 1] == '\n') ? 1 : 0;
114 return read_len;
115 }
116
boot_console_init(void)117 int boot_console_init(void)
118 {
119 BOOT_LOG_INF("Initializing serial boot pins");
120
121 /* Enable GPIO for UART RX */
122 esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX);
123 esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX,
124 UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX),
125 0);
126 gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX);
127 esp_rom_gpio_pad_pullup_only(SERIAL_BOOT_GPIO_RX);
128
129 /* Enable GPIO for UART TX */
130 esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX);
131 esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX,
132 UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX),
133 0, 0);
134 gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX);
135
136 uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_APB);
137 uart_ll_set_mode_normal(serial_boot_uart_dev);
138 uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_APB);
139 uart_ll_set_stop_bits(serial_boot_uart_dev, 1u);
140 uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE);
141 uart_ll_set_rx_tout(serial_boot_uart_dev, 16);
142 uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS);
143 uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0);
144 uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100);
145 periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM);
146
147 uart_ll_txfifo_rst(serial_boot_uart_dev);
148 uart_ll_rxfifo_rst(serial_boot_uart_dev);
149 esp_rom_delay_us(50000);
150
151 return 0;
152 }
153
boot_serial_detect_pin(void)154 bool boot_serial_detect_pin(void)
155 {
156 bool detected = false;
157 int pin_value = 0;
158
159 esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT);
160 gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT);
161 switch (SERIAL_BOOT_GPIO_INPUT_TYPE) {
162 // Pull-down
163 case 0:
164 gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT);
165 break;
166 // Pull-up
167 case 1:
168 gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT);
169 break;
170 }
171 esp_rom_delay_us(50000);
172
173 pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT);
174 detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL);
175 esp_rom_delay_us(50000);
176
177 if (detected) {
178 if (SERIAL_BOOT_DETECT_DELAY_S > 0) {
179 /* The delay time is an approximation */
180 for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) {
181 esp_rom_delay_us(10000);
182 pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT);
183 detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL);
184 if (!detected) {
185 break;
186 }
187 }
188 }
189 }
190 return detected;
191 }
192
