1 /*
2 * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <bootutil/bootutil_log.h>
8
9 #include <esp_rom_uart.h>
10 #include <esp_rom_gpio.h>
11 #include <esp_rom_sys.h>
12 #include <esp_rom_caps.h>
13 #include <soc/uart_periph.h>
14 #include <soc/gpio_struct.h>
15 #include <soc/io_mux_reg.h>
16 #include <soc/rtc.h>
17 #include <hal/gpio_types.h>
18 #include <hal/gpio_ll.h>
19 #include <hal/uart_ll.h>
20 #include <hal/clk_gate_ll.h>
21 #include <hal/gpio_hal.h>
22
23 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT
24 #define SERIAL_BOOT_GPIO_DETECT CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT
25 #else
26 #define SERIAL_BOOT_GPIO_DETECT GPIO_NUM_18
27 #endif
28
29 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL
30 #define SERIAL_BOOT_GPIO_DETECT_VAL CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL
31 #else
32 #define SERIAL_BOOT_GPIO_DETECT_VAL 1
33 #endif
34
35 #ifdef CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S
36 #define SERIAL_BOOT_DETECT_DELAY_S CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S
37 #else
38 #define SERIAL_BOOT_DETECT_DELAY_S 5
39 #endif
40
41 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE
42 #define SERIAL_BOOT_GPIO_INPUT_TYPE CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE
43 #else
44 // pull-down
45 #define SERIAL_BOOT_GPIO_INPUT_TYPE 0
46 #endif
47
48 #ifdef CONFIG_ESP_SERIAL_BOOT_UART_NUM
49 #define SERIAL_BOOT_UART_NUM CONFIG_ESP_SERIAL_BOOT_UART_NUM
50 #else
51 #define SERIAL_BOOT_UART_NUM ESP_ROM_UART_1
52 #endif
53
54 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_RX
55 #define SERIAL_BOOT_GPIO_RX CONFIG_ESP_SERIAL_BOOT_GPIO_RX
56 #else
57 #define SERIAL_BOOT_GPIO_RX GPIO_NUM_2
58 #endif
59
60 #ifdef CONFIG_ESP_SERIAL_BOOT_GPIO_TX
61 #define SERIAL_BOOT_GPIO_TX CONFIG_ESP_SERIAL_BOOT_GPIO_TX
62 #else
63 #define SERIAL_BOOT_GPIO_TX GPIO_NUM_3
64 #endif
65
66 static uart_dev_t *serial_boot_uart_dev = (SERIAL_BOOT_UART_NUM == 0) ?
67 &UART0 :
68 &UART1;
69
console_write(const char * str,int cnt)70 void console_write(const char *str, int cnt)
71 {
72 uint32_t tx_len;
73 uint32_t write_len;
74
75 do {
76 tx_len = uart_ll_get_txfifo_len(serial_boot_uart_dev);
77 if (tx_len > 0) {
78 write_len = tx_len < cnt ? tx_len : cnt;
79 uart_ll_write_txfifo(serial_boot_uart_dev, (const uint8_t *)str, write_len);
80 cnt -= write_len;
81 }
82 MCUBOOT_WATCHDOG_FEED();
83 esp_rom_delay_us(1000);
84 } while (cnt > 0);
85 }
86
console_read(char * str,int cnt,int * newline)87 int console_read(char *str, int cnt, int *newline)
88 {
89 uint32_t len = 0;
90 uint32_t read_len = 0;
91 bool stop = false;
92
93 do {
94 len = uart_ll_get_rxfifo_len(serial_boot_uart_dev);
95
96 if (len > 0) {
97 for (uint32_t i = 0; i < len; i++) {
98 /* Read the character from the RX FIFO */
99 uart_ll_read_rxfifo(serial_boot_uart_dev, (uint8_t *)&str[read_len], 1);
100 read_len++;
101 if (read_len == cnt - 1|| str[read_len - 1] == '\n') {
102 stop = true;
103 break;
104 }
105 }
106 }
107 MCUBOOT_WATCHDOG_FEED();
108 esp_rom_delay_us(1000);
109 } while (!stop);
110
111 *newline = (str[read_len - 1] == '\n') ? 1 : 0;
112 return read_len;
113 }
114
boot_console_init(void)115 int boot_console_init(void)
116 {
117 BOOT_LOG_INF("Initializing serial boot pins");
118
119 /* Enable GPIO for UART RX */
120 esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_RX);
121 esp_rom_gpio_connect_in_signal(SERIAL_BOOT_GPIO_RX,
122 UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_RX_PIN_IDX),
123 0);
124 gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_RX);
125 esp_rom_gpio_pad_pullup_only(SERIAL_BOOT_GPIO_RX);
126
127
128 /* Enable GPIO for UART TX */
129 esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_TX);
130 esp_rom_gpio_connect_out_signal(SERIAL_BOOT_GPIO_TX,
131 UART_PERIPH_SIGNAL(SERIAL_BOOT_UART_NUM, SOC_UART_TX_PIN_IDX),
132 0, 0);
133 gpio_ll_output_enable(&GPIO, SERIAL_BOOT_GPIO_TX);
134
135 uart_ll_set_sclk(serial_boot_uart_dev, UART_SCLK_DEFAULT);
136 uart_ll_set_mode_normal(serial_boot_uart_dev);
137 uart_ll_set_baudrate(serial_boot_uart_dev, 115200, UART_SCLK_DEFAULT);
138 uart_ll_set_stop_bits(serial_boot_uart_dev, 1u);
139 uart_ll_set_parity(serial_boot_uart_dev, UART_PARITY_DISABLE);
140 uart_ll_set_rx_tout(serial_boot_uart_dev, 16);
141 uart_ll_set_data_bit_num(serial_boot_uart_dev, UART_DATA_8_BITS);
142 uart_ll_set_tx_idle_num(serial_boot_uart_dev, 0);
143 uart_ll_set_hw_flow_ctrl(serial_boot_uart_dev, UART_HW_FLOWCTRL_DISABLE, 100);
144 periph_ll_enable_clk_clear_rst(PERIPH_UART0_MODULE + SERIAL_BOOT_UART_NUM);
145
146 uart_ll_txfifo_rst(serial_boot_uart_dev);
147 uart_ll_rxfifo_rst(serial_boot_uart_dev);
148 esp_rom_delay_us(50000);
149
150 return 0;
151 }
152
boot_serial_detect_pin(void)153 bool boot_serial_detect_pin(void)
154 {
155 bool detected = false;
156 int pin_value = 0;
157
158 esp_rom_gpio_pad_select_gpio(SERIAL_BOOT_GPIO_DETECT);
159 gpio_ll_input_enable(&GPIO, SERIAL_BOOT_GPIO_DETECT);
160 switch (SERIAL_BOOT_GPIO_INPUT_TYPE) {
161 // Pull-down
162 case 0:
163 gpio_ll_pulldown_en(&GPIO, SERIAL_BOOT_GPIO_DETECT);
164 break;
165 // Pull-up
166 case 1:
167 gpio_ll_pullup_en(&GPIO, SERIAL_BOOT_GPIO_DETECT);
168 break;
169 }
170 esp_rom_delay_us(50000);
171
172 pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT);
173 detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL);
174 esp_rom_delay_us(50000);
175
176 if (detected) {
177 if (SERIAL_BOOT_DETECT_DELAY_S > 0) {
178 /* The delay time is an approximation */
179 for (int i = 0; i < (SERIAL_BOOT_DETECT_DELAY_S * 100); i++) {
180 esp_rom_delay_us(10000);
181 pin_value = gpio_ll_get_level(&GPIO, SERIAL_BOOT_GPIO_DETECT);
182 detected = (pin_value == SERIAL_BOOT_GPIO_DETECT_VAL);
183 if (!detected) {
184 break;
185 }
186 }
187 }
188 }
189 return detected;
190 }
191
