1# SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
2#
3# SPDX-License-Identifier: Apache-2.0
4
5CONFIG_ESP_FLASH_SIZE=4MB
6CONFIG_ESP_BOOTLOADER_SIZE=0xF000
7CONFIG_ESP_BOOTLOADER_OFFSET=0x1000
8CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000
9CONFIG_ESP_APPLICATION_SIZE=0x100000
10CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x110000
11CONFIG_ESP_MCUBOOT_WDT_ENABLE=y
12CONFIG_ESP_SCRATCH_OFFSET=0x210000
13CONFIG_ESP_SCRATCH_SIZE=0x40000
14
15# When enabled, prevents updating image to an older version
16# CONFIG_ESP_DOWNGRADE_PREVENTION=y
17# This option makes downgrade prevention rely also on security
18# counter (defined using imgtool) instead of only image version
19# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y
20
21# Enables the MCUboot Serial Recovery, that allows the use of
22# MCUMGR to upload a firmware through the serial port
23# CONFIG_ESP_MCUBOOT_SERIAL=y
24# Use sector erasing instead of entire image size erasing
25# when uploading through Serial Recovery
26# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y
27# GPIO used to boot on Serial Recovery
28# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=32
29# GPIO input type (0 for Pull-down, 1 for Pull-up)
30# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0
31# GPIO signal value
32# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
33# Delay time for identify the GPIO signal
34# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5
35# UART port used for serial communication
36# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
37# GPIO for Serial RX signal
38# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=25
39# GPIO for Serial TX signal
40# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=26
41
42CONFIG_ESP_CONSOLE_UART=y
43CONFIG_ESP_CONSOLE_UART_NUM=0
44# Configures alternative UART port for console printing
45# CONFIG_ESP_CONSOLE_UART_CUSTOM=y
46# CONFIG_ESP_CONSOLE_UART_TX_GPIO=26
47# CONFIG_ESP_CONSOLE_UART_RX_GPIO=25
48
49# Enables multi image, if it is not defined, it is assumed
50# only one updatable image
51# CONFIG_ESP_IMAGE_NUMBER=2
52
53# Enables multi image boot on independent processors
54# (main host OS is not responsible for booting the second image)
55# Use only with CONFIG_ESP_IMAGE_NUMBER=2
56# CONFIG_ESP_MULTI_PROCESSOR_BOOT=y
57
58# Example of values to be used when multi image is enabled
59# Notice that the OS layer and update agent must be aware
60# of these regions
61# CONFIG_ESP_APPLICATION_SIZE=0x80000
62# CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x10000
63# CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x90000
64# CONFIG_ESP_IMAGE1_PRIMARY_START_ADDRESS=0x110000
65# CONFIG_ESP_IMAGE1_SECONDARY_START_ADDRESS=0x190000
66# CONFIG_ESP_SCRATCH_OFFSET=0x210000
67# CONFIG_ESP_SCRATCH_SIZE=0x40000
68
69# CONFIG_ESP_SIGN_EC256=y
70# CONFIG_ESP_SIGN_ED25519=n
71# CONFIG_ESP_SIGN_RSA=n
72# CONFIG_ESP_SIGN_RSA_LEN=2048
73
74# Use Tinycrypt lib for EC256 or ED25519 signing
75# CONFIG_ESP_USE_TINYCRYPT=y
76# Use Mbed TLS lib for RSA image signing
77# CONFIG_ESP_USE_MBEDTLS=n
78
79# It is strongly recommended to generate a new signing key
80# using imgtool instead of use the existent sample
81# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem
82
83# Hardware Secure Boot related options
84# CONFIG_SECURE_SIGNED_ON_BOOT=1
85# CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
86# CONFIG_SECURE_BOOT=1
87# CONFIG_SECURE_BOOT_V2_ENABLED=1
88# CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
89
90# Hardware Flash Encryption related options
91# CONFIG_SECURE_FLASH_ENC_ENABLED=1
92# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
93# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1
94# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1
95# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1
96# CONFIG_SECURE_BOOT_ALLOW_JTAG=1
97# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1
98
99# Options for enabling eFuse emulation in Flash
100# CONFIG_EFUSE_VIRTUAL=1
101# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1
102