1 /*
2  * Copyright (c) 2020 Nordic Semiconductor ASA
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <zephyr/toolchain.h>
8 
9 #include <cmsis_core.h>
10 #if CONFIG_CPU_HAS_NXP_MPU
11 #include <fsl_sysmpu.h>
12 #endif
13 
cleanup_arm_nvic(void)14 void cleanup_arm_nvic(void) {
15 	/* Allow any pending interrupts to be recognized */
16 	__ISB();
17 	__disable_irq();
18 
19 	/* Disable NVIC interrupts */
20 	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {
21 		NVIC->ICER[i] = 0xFFFFFFFF;
22 	}
23 	/* Clear pending NVIC interrupts */
24 	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICPR); i++) {
25 		NVIC->ICPR[i] = 0xFFFFFFFF;
26 	}
27 }
28 
29 #if CONFIG_CPU_HAS_ARM_MPU
z_arm_clear_arm_mpu_config(void)30 __weak void z_arm_clear_arm_mpu_config(void)
31 {
32 	int i;
33 
34 	int num_regions =
35 		((MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos);
36 
37 	for (i = 0; i < num_regions; i++) {
38 		ARM_MPU_ClrRegion(i);
39 	}
40 }
41 #elif CONFIG_CPU_HAS_NXP_MPU
z_arm_clear_arm_mpu_config(void)42 __weak void z_arm_clear_arm_mpu_config(void)
43 {
44 	int i;
45 
46 	int num_regions = FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT;
47 
48 	SYSMPU_Enable(SYSMPU, false);
49 
50 	/* NXP MPU region 0 is reserved for the debugger */
51 	for (i = 1; i < num_regions; i++) {
52 		SYSMPU_RegionEnable(SYSMPU, i, false);
53 	}
54 }
55 #endif
56