1 /*
2 * Copyright (c) 2012-2014 Wind River Systems, Inc.
3 * Copyright (c) 2020 Arm Limited
4 * Copyright (c) 2021-2023 Nordic Semiconductor ASA
5 *
6 * Licensed under the Apache License, Version 2.0 (the "License");
7 * you may not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * http://www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an "AS IS" BASIS,
14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19 #include <assert.h>
20 #include <zephyr/kernel.h>
21 #include <zephyr/devicetree.h>
22 #include <zephyr/drivers/gpio.h>
23 #include <zephyr/sys/__assert.h>
24 #include <zephyr/drivers/flash.h>
25 #include <zephyr/drivers/timer/system_timer.h>
26 #include <zephyr/usb/usb_device.h>
27 #include <soc.h>
28 #include <zephyr/linker/linker-defs.h>
29
30 #if defined(CONFIG_CPU_AARCH32_CORTEX_A) || defined(CONFIG_CPU_AARCH32_CORTEX_R)
31 #include <zephyr/arch/arm/aarch32/cortex_a_r/cmsis.h>
32 #elif defined(CONFIG_CPU_CORTEX_M)
33 #include <zephyr/arch/arm/aarch32/cortex_m/cmsis.h>
34 #endif
35
36 #include "target.h"
37
38 #include "bootutil/bootutil_log.h"
39 #include "bootutil/image.h"
40 #include "bootutil/bootutil.h"
41 #include "bootutil/fault_injection_hardening.h"
42 #include "bootutil/mcuboot_status.h"
43 #include "flash_map_backend/flash_map_backend.h"
44
45 /* Check if Espressif target is supported */
46 #ifdef CONFIG_SOC_FAMILY_ESP32
47
48 #include <bootloader_init.h>
49 #include <esp_loader.h>
50
51 #define IMAGE_INDEX_0 0
52 #define IMAGE_INDEX_1 1
53
54 #define PRIMARY_SLOT 0
55 #define SECONDARY_SLOT 1
56
57 #define IMAGE0_PRIMARY_START_ADDRESS \
58 DT_PROP_BY_IDX(DT_NODE_BY_FIXED_PARTITION_LABEL(image_0), reg, 0)
59 #define IMAGE0_PRIMARY_SIZE \
60 DT_PROP_BY_IDX(DT_NODE_BY_FIXED_PARTITION_LABEL(image_0), reg, 1)
61
62 #define IMAGE1_PRIMARY_START_ADDRESS \
63 DT_PROP_BY_IDX(DT_NODE_BY_FIXED_PARTITION_LABEL(image_1), reg, 0)
64 #define IMAGE1_PRIMARY_SIZE \
65 DT_PROP_BY_IDX(DT_NODE_BY_FIXED_PARTITION_LABEL(image_1), reg, 1)
66
67 #endif /* CONFIG_SOC_FAMILY_ESP32 */
68
69 #ifdef CONFIG_MCUBOOT_SERIAL
70 #include "boot_serial/boot_serial.h"
71 #include "serial_adapter/serial_adapter.h"
72
73 const struct boot_uart_funcs boot_funcs = {
74 .read = console_read,
75 .write = console_write
76 };
77 #endif
78
79 #ifdef CONFIG_BOOT_SERIAL_BOOT_MODE
80 #include <zephyr/retention/bootmode.h>
81 #endif
82
83 #if defined(CONFIG_BOOT_USB_DFU_WAIT) || defined(CONFIG_BOOT_USB_DFU_GPIO)
84 #include <zephyr/usb/class/usb_dfu.h>
85 #endif
86
87 #if CONFIG_MCUBOOT_CLEANUP_ARM_CORE
88 #include <arm_cleanup.h>
89 #endif
90
91 #ifdef CONFIG_BOOT_SERIAL_PIN_RESET
92 #include <zephyr/drivers/hwinfo.h>
93 #endif
94
95 /* CONFIG_LOG_MINIMAL is the legacy Kconfig property,
96 * replaced by CONFIG_LOG_MODE_MINIMAL.
97 */
98 #if (defined(CONFIG_LOG_MODE_MINIMAL) || defined(CONFIG_LOG_MINIMAL))
99 #define ZEPHYR_LOG_MODE_MINIMAL 1
100 #endif
101
102 /* CONFIG_LOG_IMMEDIATE is the legacy Kconfig property,
103 * replaced by CONFIG_LOG_MODE_IMMEDIATE.
104 */
105 #if (defined(CONFIG_LOG_MODE_IMMEDIATE) || defined(CONFIG_LOG_IMMEDIATE))
106 #define ZEPHYR_LOG_MODE_IMMEDIATE 1
107 #endif
108
109 #if defined(CONFIG_LOG) && !defined(ZEPHYR_LOG_MODE_IMMEDIATE) && \
110 !defined(ZEPHYR_LOG_MODE_MINIMAL)
111 #ifdef CONFIG_LOG_PROCESS_THREAD
112 #warning "The log internal thread for log processing can't transfer the log"\
113 "well for MCUBoot."
114 #else
115 #include <zephyr/logging/log_ctrl.h>
116
117 #define BOOT_LOG_PROCESSING_INTERVAL K_MSEC(30) /* [ms] */
118
119 /* log are processing in custom routine */
120 K_THREAD_STACK_DEFINE(boot_log_stack, CONFIG_MCUBOOT_LOG_THREAD_STACK_SIZE);
121 struct k_thread boot_log_thread;
122 volatile bool boot_log_stop = false;
123 K_SEM_DEFINE(boot_log_sem, 1, 1);
124
125 /* log processing need to be initalized by the application */
126 #define ZEPHYR_BOOT_LOG_START() zephyr_boot_log_start()
127 #define ZEPHYR_BOOT_LOG_STOP() zephyr_boot_log_stop()
128 #endif /* CONFIG_LOG_PROCESS_THREAD */
129 #else
130 /* synchronous log mode doesn't need to be initalized by the application */
131 #define ZEPHYR_BOOT_LOG_START() do { } while (false)
132 #define ZEPHYR_BOOT_LOG_STOP() do { } while (false)
133 #endif /* defined(CONFIG_LOG) && !defined(ZEPHYR_LOG_MODE_IMMEDIATE) && \
134 * !defined(ZEPHYR_LOG_MODE_MINIMAL)
135 */
136
137 #ifdef CONFIG_SOC_FAMILY_NRF
138 #include <helpers/nrfx_reset_reason.h>
139
boot_skip_serial_recovery()140 static inline bool boot_skip_serial_recovery()
141 {
142 uint32_t rr = nrfx_reset_reason_get();
143
144 return !(rr == 0 || (rr & NRFX_RESET_REASON_RESETPIN_MASK));
145 }
146 #else
boot_skip_serial_recovery()147 static inline bool boot_skip_serial_recovery()
148 {
149 return false;
150 }
151 #endif
152
153 BOOT_LOG_MODULE_REGISTER(mcuboot);
154
155 /* Validate serial recovery configuration */
156 #ifdef CONFIG_MCUBOOT_SERIAL
157 #if !defined(CONFIG_BOOT_SERIAL_ENTRANCE_GPIO) && \
158 !defined(CONFIG_BOOT_SERIAL_WAIT_FOR_DFU) && \
159 !defined(CONFIG_BOOT_SERIAL_BOOT_MODE) && \
160 !defined(CONFIG_BOOT_SERIAL_NO_APPLICATION) && \
161 !defined(CONFIG_BOOT_SERIAL_PIN_RESET)
162 #error "Serial recovery selected without an entrance mode set"
163 #endif
164 #endif
165
166 #ifdef CONFIG_MCUBOOT_INDICATION_LED
167
168 /*
169 * The led0 devicetree alias is optional. If present, we'll use it
170 * to turn on the LED whenever the button is pressed.
171 */
172 #if DT_NODE_EXISTS(DT_ALIAS(mcuboot_led0))
173 #define LED0_NODE DT_ALIAS(mcuboot_led0)
174 #elif DT_NODE_EXISTS(DT_ALIAS(bootloader_led0))
175 #warning "bootloader-led0 alias is deprecated; use mcuboot-led0 instead"
176 #define LED0_NODE DT_ALIAS(bootloader_led0)
177 #endif
178
179 #if DT_NODE_HAS_STATUS(LED0_NODE, okay) && DT_NODE_HAS_PROP(LED0_NODE, gpios)
180 static const struct gpio_dt_spec led0 = GPIO_DT_SPEC_GET(LED0_NODE, gpios);
181 #else
182 /* A build error here means your board isn't set up to drive an LED. */
183 #error "Unsupported board: led0 devicetree alias is not defined"
184 #endif
185
led_init(void)186 void led_init(void)
187 {
188 if (!device_is_ready(led0.port)) {
189 BOOT_LOG_ERR("Didn't find LED device referred by the LED0_NODE\n");
190 return;
191 }
192
193 gpio_pin_configure_dt(&led0, GPIO_OUTPUT);
194 gpio_pin_set_dt(&led0, 0);
195 }
196 #endif /* CONFIG_MCUBOOT_INDICATION_LED */
197
198 void os_heap_init(void);
199
200 #if defined(CONFIG_ARM)
201
202 #ifdef CONFIG_SW_VECTOR_RELAY
203 extern void *_vector_table_pointer;
204 #endif
205
206 struct arm_vector_table {
207 uint32_t msp;
208 uint32_t reset;
209 };
210
do_boot(struct boot_rsp * rsp)211 static void do_boot(struct boot_rsp *rsp)
212 {
213 struct arm_vector_table *vt;
214
215 /* The beginning of the image is the ARM vector table, containing
216 * the initial stack pointer address and the reset vector
217 * consecutively. Manually set the stack pointer and jump into the
218 * reset vector
219 */
220 #ifdef CONFIG_BOOT_RAM_LOAD
221 /* Get ram address for image */
222 vt = (struct arm_vector_table *)(rsp->br_hdr->ih_load_addr + rsp->br_hdr->ih_hdr_size);
223 #else
224 uintptr_t flash_base;
225 int rc;
226
227 /* Jump to flash image */
228 rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
229 assert(rc == 0);
230
231 vt = (struct arm_vector_table *)(flash_base +
232 rsp->br_image_off +
233 rsp->br_hdr->ih_hdr_size);
234 #endif
235
236 if (IS_ENABLED(CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT)) {
237 sys_clock_disable();
238 }
239
240 #ifdef CONFIG_USB_DEVICE_STACK
241 /* Disable the USB to prevent it from firing interrupts */
242 usb_disable();
243 #endif
244 #if CONFIG_MCUBOOT_CLEANUP_ARM_CORE
245 cleanup_arm_nvic(); /* cleanup NVIC registers */
246
247 #ifdef CONFIG_CPU_CORTEX_M_HAS_CACHE
248 /* Disable instruction cache and data cache before chain-load the application */
249 SCB_DisableDCache();
250 SCB_DisableICache();
251 #endif
252
253 #if CONFIG_CPU_HAS_ARM_MPU || CONFIG_CPU_HAS_NXP_MPU
254 z_arm_clear_arm_mpu_config();
255 #endif
256
257 #if defined(CONFIG_BUILTIN_STACK_GUARD) && \
258 defined(CONFIG_CPU_CORTEX_M_HAS_SPLIM)
259 /* Reset limit registers to avoid inflicting stack overflow on image
260 * being booted.
261 */
262 __set_PSPLIM(0);
263 __set_MSPLIM(0);
264 #endif
265
266 #else
267 irq_lock();
268 #endif /* CONFIG_MCUBOOT_CLEANUP_ARM_CORE */
269
270 #ifdef CONFIG_BOOT_INTR_VEC_RELOC
271 #if defined(CONFIG_SW_VECTOR_RELAY)
272 _vector_table_pointer = vt;
273 #ifdef CONFIG_CPU_CORTEX_M_HAS_VTOR
274 SCB->VTOR = (uint32_t)__vector_relay_table;
275 #endif
276 #elif defined(CONFIG_CPU_CORTEX_M_HAS_VTOR)
277 SCB->VTOR = (uint32_t)vt;
278 #endif /* CONFIG_SW_VECTOR_RELAY */
279 #else /* CONFIG_BOOT_INTR_VEC_RELOC */
280 #if defined(CONFIG_CPU_CORTEX_M_HAS_VTOR) && defined(CONFIG_SW_VECTOR_RELAY)
281 _vector_table_pointer = _vector_start;
282 SCB->VTOR = (uint32_t)__vector_relay_table;
283 #endif
284 #endif /* CONFIG_BOOT_INTR_VEC_RELOC */
285
286 __set_MSP(vt->msp);
287 #if CONFIG_MCUBOOT_CLEANUP_ARM_CORE
288 __set_CONTROL(0x00); /* application will configures core on its own */
289 __ISB();
290 #endif
291 ((void (*)(void))vt->reset)();
292 }
293
294 #elif defined(CONFIG_XTENSA) || defined(CONFIG_RISCV)
295
296 #ifndef CONFIG_SOC_FAMILY_ESP32
297
298 #define SRAM_BASE_ADDRESS 0xBE030000
299
copy_img_to_SRAM(int slot,unsigned int hdr_offset)300 static void copy_img_to_SRAM(int slot, unsigned int hdr_offset)
301 {
302 const struct flash_area *fap;
303 int area_id;
304 int rc;
305 unsigned char *dst = (unsigned char *)(SRAM_BASE_ADDRESS + hdr_offset);
306
307 BOOT_LOG_INF("Copying image to SRAM");
308
309 area_id = flash_area_id_from_image_slot(slot);
310 rc = flash_area_open(area_id, &fap);
311 if (rc != 0) {
312 BOOT_LOG_ERR("flash_area_open failed with %d\n", rc);
313 goto done;
314 }
315
316 rc = flash_area_read(fap, hdr_offset, dst, fap->fa_size - hdr_offset);
317 if (rc != 0) {
318 BOOT_LOG_ERR("flash_area_read failed with %d\n", rc);
319 goto done;
320 }
321
322 done:
323 flash_area_close(fap);
324 }
325 #endif /* !CONFIG_SOC_FAMILY_ESP32 */
326
327 /* Entry point (.ResetVector) is at the very beginning of the image.
328 * Simply copy the image to a suitable location and jump there.
329 */
do_boot(struct boot_rsp * rsp)330 static void do_boot(struct boot_rsp *rsp)
331 {
332 void *start;
333
334 BOOT_LOG_INF("br_image_off = 0x%x\n", rsp->br_image_off);
335 BOOT_LOG_INF("ih_hdr_size = 0x%x\n", rsp->br_hdr->ih_hdr_size);
336
337 #ifdef CONFIG_SOC_FAMILY_ESP32
338 int slot = (rsp->br_image_off == IMAGE0_PRIMARY_START_ADDRESS) ?
339 PRIMARY_SLOT : SECONDARY_SLOT;
340 /* Load memory segments and start from entry point */
341 start_cpu0_image(IMAGE_INDEX_0, slot, rsp->br_hdr->ih_hdr_size);
342 #else
343 /* Copy from the flash to HP SRAM */
344 copy_img_to_SRAM(0, rsp->br_hdr->ih_hdr_size);
345
346 /* Jump to entry point */
347 start = (void *)(SRAM_BASE_ADDRESS + rsp->br_hdr->ih_hdr_size);
348 ((void (*)(void))start)();
349 #endif /* CONFIG_SOC_FAMILY_ESP32 */
350 }
351
352 #else
353 /* Default: Assume entry point is at the very beginning of the image. Simply
354 * lock interrupts and jump there. This is the right thing to do for X86 and
355 * possibly other platforms.
356 */
do_boot(struct boot_rsp * rsp)357 static void do_boot(struct boot_rsp *rsp)
358 {
359 void *start;
360
361 #if defined(MCUBOOT_RAM_LOAD)
362 start = (void *)(rsp->br_hdr->ih_load_addr + rsp->br_hdr->ih_hdr_size);
363 #else
364 uintptr_t flash_base;
365 int rc;
366
367 rc = flash_device_base(rsp->br_flash_dev_id, &flash_base);
368 assert(rc == 0);
369
370 start = (void *)(flash_base + rsp->br_image_off +
371 rsp->br_hdr->ih_hdr_size);
372 #endif
373
374 /* Lock interrupts and dive into the entry point */
375 irq_lock();
376 ((void (*)(void))start)();
377 }
378 #endif
379
380 #if defined(CONFIG_LOG) && !defined(ZEPHYR_LOG_MODE_IMMEDIATE) && \
381 !defined(CONFIG_LOG_PROCESS_THREAD) && !defined(ZEPHYR_LOG_MODE_MINIMAL)
382 /* The log internal thread for log processing can't transfer log well as has too
383 * low priority.
384 * Dedicated thread for log processing below uses highest application
385 * priority. This allows to transmit all logs without adding k_sleep/k_yield
386 * anywhere else int the code.
387 */
388
389 /* most simple log processing theread */
boot_log_thread_func(void * dummy1,void * dummy2,void * dummy3)390 void boot_log_thread_func(void *dummy1, void *dummy2, void *dummy3)
391 {
392 (void)dummy1;
393 (void)dummy2;
394 (void)dummy3;
395
396 log_init();
397
398 while (1) {
399 #if defined(CONFIG_LOG1) || defined(CONFIG_LOG2)
400 /* support Zephyr legacy logging implementation before commit c5f2cde */
401 if (log_process(false) == false) {
402 #else
403 if (log_process() == false) {
404 #endif
405 if (boot_log_stop) {
406 break;
407 }
408 k_sleep(BOOT_LOG_PROCESSING_INTERVAL);
409 }
410 }
411
412 k_sem_give(&boot_log_sem);
413 }
414
415 void zephyr_boot_log_start(void)
416 {
417 /* start logging thread */
418 k_thread_create(&boot_log_thread, boot_log_stack,
419 K_THREAD_STACK_SIZEOF(boot_log_stack),
420 boot_log_thread_func, NULL, NULL, NULL,
421 K_HIGHEST_APPLICATION_THREAD_PRIO, 0,
422 BOOT_LOG_PROCESSING_INTERVAL);
423
424 k_thread_name_set(&boot_log_thread, "logging");
425 }
426
427 void zephyr_boot_log_stop(void)
428 {
429 boot_log_stop = true;
430
431 /* wait until log procesing thread expired
432 * This can be reworked using a thread_join() API once a such will be
433 * available in zephyr.
434 * see https://github.com/zephyrproject-rtos/zephyr/issues/21500
435 */
436 (void)k_sem_take(&boot_log_sem, K_FOREVER);
437 }
438 #endif /* defined(CONFIG_LOG) && !defined(ZEPHYR_LOG_MODE_IMMEDIATE) && \
439 * !defined(CONFIG_LOG_PROCESS_THREAD) && !defined(ZEPHYR_LOG_MODE_MINIMAL)
440 */
441
442 #if defined(CONFIG_BOOT_SERIAL_ENTRANCE_GPIO) || defined(CONFIG_BOOT_USB_DFU_GPIO)
443
444 #ifdef CONFIG_MCUBOOT_SERIAL
445 #define BUTTON_0_DETECT_DELAY CONFIG_BOOT_SERIAL_DETECT_DELAY
446 #else
447 #define BUTTON_0_DETECT_DELAY CONFIG_BOOT_USB_DFU_DETECT_DELAY
448 #endif
449
450 #define BUTTON_0_NODE DT_ALIAS(mcuboot_button0)
451
452 #if DT_NODE_EXISTS(BUTTON_0_NODE) && DT_NODE_HAS_PROP(BUTTON_0_NODE, gpios)
453 static const struct gpio_dt_spec button0 = GPIO_DT_SPEC_GET(BUTTON_0_NODE, gpios);
454 #else
455 #error "Serial recovery/USB DFU button must be declared in device tree as 'mcuboot_button0'"
456 #endif
457
458 static bool detect_pin(void)
459 {
460 int rc;
461 int pin_active;
462
463 if (!device_is_ready(button0.port)) {
464 __ASSERT(false, "GPIO device is not ready.\n");
465 return false;
466 }
467
468 rc = gpio_pin_configure_dt(&button0, GPIO_INPUT);
469 __ASSERT(rc == 0, "Failed to initialize boot detect pin.\n");
470
471 rc = gpio_pin_get_dt(&button0);
472 pin_active = rc;
473
474 __ASSERT(rc >= 0, "Failed to read boot detect pin.\n");
475
476 if (pin_active) {
477 if (BUTTON_0_DETECT_DELAY > 0) {
478 #ifdef CONFIG_MULTITHREADING
479 k_sleep(K_MSEC(50));
480 #else
481 k_busy_wait(50000);
482 #endif
483
484 /* Get the uptime for debounce purposes. */
485 int64_t timestamp = k_uptime_get();
486
487 for(;;) {
488 rc = gpio_pin_get_dt(&button0);
489 pin_active = rc;
490 __ASSERT(rc >= 0, "Failed to read boot detect pin.\n");
491
492 /* Get delta from when this started */
493 uint32_t delta = k_uptime_get() - timestamp;
494
495 /* If not pressed OR if pressed > debounce period, stop. */
496 if (delta >= BUTTON_0_DETECT_DELAY || !pin_active) {
497 break;
498 }
499
500 /* Delay 1 ms */
501 #ifdef CONFIG_MULTITHREADING
502 k_sleep(K_MSEC(1));
503 #else
504 k_busy_wait(1000);
505 #endif
506 }
507 }
508 }
509
510 return (bool)pin_active;
511 }
512 #endif
513
514 #ifdef CONFIG_MCUBOOT_SERIAL
515 static void boot_serial_enter()
516 {
517 int rc;
518
519 #ifdef CONFIG_MCUBOOT_INDICATION_LED
520 gpio_pin_set_dt(&led0, 1);
521 #endif
522
523 mcuboot_status_change(MCUBOOT_STATUS_SERIAL_DFU_ENTERED);
524
525 BOOT_LOG_INF("Enter the serial recovery mode");
526 rc = boot_console_init();
527 __ASSERT(rc == 0, "Error initializing boot console.\n");
528 boot_serial_start(&boot_funcs);
529 __ASSERT(0, "Bootloader serial process was terminated unexpectedly.\n");
530 }
531 #endif
532
533 int main(void)
534 {
535 struct boot_rsp rsp;
536 int rc;
537 FIH_DECLARE(fih_rc, FIH_FAILURE);
538
539 #ifdef CONFIG_BOOT_SERIAL_BOOT_MODE
540 int32_t boot_mode;
541 #endif
542
543 #ifdef CONFIG_BOOT_SERIAL_PIN_RESET
544 uint32_t reset_cause;
545 #endif
546
547 MCUBOOT_WATCHDOG_SETUP();
548 MCUBOOT_WATCHDOG_FEED();
549
550 #if !defined(MCUBOOT_DIRECT_XIP)
551 BOOT_LOG_INF("Starting bootloader");
552 #else
553 BOOT_LOG_INF("Starting Direct-XIP bootloader");
554 #endif
555
556 #ifdef CONFIG_MCUBOOT_INDICATION_LED
557 /* LED init */
558 led_init();
559 #endif
560
561 os_heap_init();
562
563 ZEPHYR_BOOT_LOG_START();
564
565 (void)rc;
566
567 mcuboot_status_change(MCUBOOT_STATUS_STARTUP);
568
569 #ifdef CONFIG_BOOT_SERIAL_ENTRANCE_GPIO
570 if (detect_pin() &&
571 !boot_skip_serial_recovery()) {
572 boot_serial_enter();
573 }
574 #endif
575
576 #ifdef CONFIG_BOOT_SERIAL_PIN_RESET
577 rc = hwinfo_get_reset_cause(&reset_cause);
578
579 if (rc == 0 && reset_cause == RESET_PIN) {
580 (void)hwinfo_clear_reset_cause();
581 boot_serial_enter();
582 }
583 #endif
584
585 #if defined(CONFIG_BOOT_USB_DFU_GPIO)
586 if (detect_pin()) {
587 #ifdef CONFIG_MCUBOOT_INDICATION_LED
588 gpio_pin_set_dt(&led0, 1);
589 #endif
590
591 mcuboot_status_change(MCUBOOT_STATUS_USB_DFU_ENTERED);
592
593 rc = usb_enable(NULL);
594 if (rc) {
595 BOOT_LOG_ERR("Cannot enable USB");
596 } else {
597 BOOT_LOG_INF("Waiting for USB DFU");
598 wait_for_usb_dfu(K_FOREVER);
599 BOOT_LOG_INF("USB DFU wait time elapsed");
600 }
601 }
602 #elif defined(CONFIG_BOOT_USB_DFU_WAIT)
603 rc = usb_enable(NULL);
604 if (rc) {
605 BOOT_LOG_ERR("Cannot enable USB");
606 } else {
607 BOOT_LOG_INF("Waiting for USB DFU");
608
609 mcuboot_status_change(MCUBOOT_STATUS_USB_DFU_WAITING);
610
611 wait_for_usb_dfu(K_MSEC(CONFIG_BOOT_USB_DFU_WAIT_DELAY_MS));
612 BOOT_LOG_INF("USB DFU wait time elapsed");
613
614 mcuboot_status_change(MCUBOOT_STATUS_USB_DFU_TIMED_OUT);
615 }
616 #endif
617
618 #ifdef CONFIG_BOOT_SERIAL_WAIT_FOR_DFU
619 /* Initialize the boot console, so we can already fill up our buffers while
620 * waiting for the boot image check to finish. This image check, can take
621 * some time, so it's better to reuse thistime to already receive the
622 * initial mcumgr command(s) into our buffers
623 */
624 rc = boot_console_init();
625 int timeout_in_ms = CONFIG_BOOT_SERIAL_WAIT_FOR_DFU_TIMEOUT;
626 uint32_t start = k_uptime_get_32();
627 #endif
628
629 FIH_CALL(boot_go, fih_rc, &rsp);
630
631 #ifdef CONFIG_BOOT_SERIAL_BOOT_MODE
632 boot_mode = bootmode_check(BOOT_MODE_TYPE_BOOTLOADER);
633
634 if (boot_mode == 1) {
635 /* Boot mode to stay in bootloader, clear status and enter serial
636 * recovery mode
637 */
638 bootmode_clear();
639 boot_serial_enter();
640 }
641 #endif
642
643 #ifdef CONFIG_BOOT_SERIAL_WAIT_FOR_DFU
644 timeout_in_ms -= (k_uptime_get_32() - start);
645 if( timeout_in_ms <= 0 ) {
646 /* at least one check if time was expired */
647 timeout_in_ms = 1;
648 }
649 boot_serial_check_start(&boot_funcs,timeout_in_ms);
650 #endif
651
652 if (FIH_NOT_EQ(fih_rc, FIH_SUCCESS)) {
653 BOOT_LOG_ERR("Unable to find bootable image");
654
655 mcuboot_status_change(MCUBOOT_STATUS_NO_BOOTABLE_IMAGE_FOUND);
656
657 #ifdef CONFIG_BOOT_SERIAL_NO_APPLICATION
658 /* No bootable image and configuration set to remain in serial
659 * recovery mode
660 */
661 boot_serial_enter();
662 #endif
663
664 FIH_PANIC;
665 }
666
667 BOOT_LOG_INF("Bootloader chainload address offset: 0x%x",
668 rsp.br_image_off);
669
670 #if defined(MCUBOOT_DIRECT_XIP)
671 BOOT_LOG_INF("Jumping to the image slot");
672 #else
673 BOOT_LOG_INF("Jumping to the first image slot");
674 #endif
675
676 mcuboot_status_change(MCUBOOT_STATUS_BOOTABLE_IMAGE_FOUND);
677
678 ZEPHYR_BOOT_LOG_STOP();
679 do_boot(&rsp);
680
681 mcuboot_status_change(MCUBOOT_STATUS_BOOT_FAILED);
682
683 BOOT_LOG_ERR("Never should get here");
684 while (1)
685 ;
686 }
687
