1 /*!
2  * \file      sysIrqHandlers.c
3  *
4  * \brief     Default IRQ handlers
5  *
6  * \copyright Revised BSD License, see section \ref LICENSE.
7  *
8  * \code
9  *                ______                              _
10  *               / _____)             _              | |
11  *              ( (____  _____ ____ _| |_ _____  ____| |__
12  *               \____ \| ___ |    (_   _) ___ |/ ___)  _ \
13  *               _____) ) ____| | | || |_| ____( (___| | | |
14  *              (______/|_____)_|_|_| \__)_____)\____)_| |_|
15  *              (C)2013-2017 Semtech
16  *
17  * \endcode
18  *
19  * \author    Miguel Luis ( Semtech )
20  *
21  * \author    Gregory Cristian ( Semtech )
22  */
23 
24 /*!
25  * \brief  This function handles NMI exception.
26  * \param  None
27  * \retval None
28  */
NMI_Handler(void)29 void NMI_Handler( void )
30 {
31 }
32 
33 /*!
34  * \brief  This function handles Hard Fault exception.
35  * \param  None
36  * \retval None
37  */
38 #if defined( HARD_FAULT_HANDLER_ENABLED )
HardFault_Handler_C(unsigned int * args)39 void HardFault_Handler_C( unsigned int *args )
40 {
41     volatile unsigned int stacked_r0;
42     volatile unsigned int stacked_r1;
43     volatile unsigned int stacked_r2;
44     volatile unsigned int stacked_r3;
45     volatile unsigned int stacked_r12;
46     volatile unsigned int stacked_lr;
47     volatile unsigned int stacked_pc;
48     volatile unsigned int stacked_psr;
49 
50     stacked_r0 = ( ( unsigned long) args[0] );
51     stacked_r1 = ( ( unsigned long) args[1] );
52     stacked_r2 = ( ( unsigned long) args[2] );
53     stacked_r3 = ( ( unsigned long) args[3] );
54 
55     stacked_r12 = ( ( unsigned long) args[4] );
56     stacked_lr = ( ( unsigned long) args[5] );
57     stacked_pc = ( ( unsigned long) args[6] );
58     stacked_psr = ( ( unsigned long) args[7] );
59 
60     ( void )stacked_r0;
61     ( void )stacked_r1;
62     ( void )stacked_r2;
63     ( void )stacked_r3;
64 
65     ( void )stacked_r12;
66     ( void )stacked_lr ;
67     ( void )stacked_pc ;
68     ( void )stacked_psr;
69 
70     while( 1 );
71 }
72 
73 #if defined(__CC_ARM)
74 #warning "HardFault_Handler: ARMCC does not allow some of the required instructions to be inlined under C code."
75 // To mimic the behavior provided for IAR and GCC one needs to create a hard_fault_handler.s file and add it to the Keil project.
76 // Something similar to the below code should be added to hard_fault_handler.s
77 // Refer to https://www.segger.com/downloads/application-notes/AN00016
78 // @code
79 //    AREA OSKERNEL, CODE, READONLY, ALIGN=2
80 //    PRESERVE8
81 //
82 //    EXPORT HardFault_Handler
83 //    IMPORT HardFault_Handler_C
84 //
85 //    THUMB
86 //
87 //    HardFault_Handler PROC
88 //        MOVS R0, #4
89 //        MOV R1, LR
90 //        TST R0, R1 // Check EXC_RETURN in Link register bit 2.
91 //        BNE Uses_PSP
92 //        MRS R0, MSP // Stacking was using MSP.
93 //        B Pass_StackPtr
94 //        Uses_PSP:
95 //        MRS R0, PSP // Stacking was using PSP
96 //        Pass_StackPtr:
97 //        ALIGN
98 //        LDR R2,=HardFault_Handler_C
99 //        BX  R2
100 //        ENDP
101 //    END
102 // @code
103 #elif defined(__ICCARM__)
HardFault_Handler(void)104 void HardFault_Handler(void)
105 {
106     // Refer to https://www.segger.com/downloads/application-notes/AN00016
107     __asm("MOVS R0, #4");
108     __asm("MOV R1, LR");
109     __asm("TST R0, R1"); // Check EXC_RETURN in Link register bit 2.
110     __asm("BNE Uses_PSP");
111     __asm("MRS R0, MSP"); // Stacking was using MSP.
112     __asm("B Pass_StackPtr");
113     __asm("Uses_PSP:");
114     __asm("MRS R0, PSP"); // Stacking was using PSP
115     __asm("Pass_StackPtr:");
116     __asm("LDR R2,=HardFault_Handler_C");
117     __asm("BX  R2");
118 }
119 #elif defined(__GNUC__)
HardFault_Handler(void)120 void HardFault_Handler(void)
121 {
122     // Refer to https://www.segger.com/downloads/application-notes/AN00016
123     __asm volatile("MOVS R0, #4");
124     __asm volatile("MOV R1, LR");
125     __asm volatile("TST R0, R1"); // Check EXC_RETURN in Link register bit 2.
126     __asm volatile("BNE Uses_PSP");
127     __asm volatile("MRS R0, MSP");// Stacking was using MSP.
128     __asm volatile("B Pass_StackPtr");
129     __asm volatile("Uses_PSP:");
130     __asm volatile("MRS R0, PSP"); // Stacking was using PSP
131     __asm volatile("Pass_StackPtr:");
132     __asm volatile("LDR R2,=HardFault_Handler_C");
133     __asm volatile("BX  R2");
134 }
135 #else
136     #warning Not supported compiler type
137 #endif
138 
139 #endif
140 
141 /*!
142  * \brief  This function handles Memory Manage exception.
143  * \param  None
144  * \retval None
145  */
MemManage_Handler(void)146 void MemManage_Handler( void )
147 {
148     /* Go to infinite loop when Memory Manage exception occurs */
149     while ( 1 )
150     {
151     }
152 }
153 
154 /*!
155  * \brief  This function handles Bus Fault exception.
156  * \param  None
157  * \retval None
158  */
BusFault_Handler(void)159 void BusFault_Handler( void )
160 {
161     /* Go to infinite loop when Bus Fault exception occurs */
162     while ( 1 )
163     {
164     }
165 }
166 
167 /*!
168  * \brief  This function handles Usage Fault exception.
169  * \param  None
170  * \retval None
171  */
UsageFault_Handler(void)172 void UsageFault_Handler( void )
173 {
174     /* Go to infinite loop when Usage Fault exception occurs */
175     while ( 1 )
176     {
177     }
178 }
179 
180 /*!
181  * \brief  This function handles Debug Monitor exception.
182  * \param  None
183  * \retval None
184  */
DebugMon_Handler(void)185 void DebugMon_Handler( void )
186 {
187 }
188