1;******************** (C) COPYRIGHT 2016 STMicroelectronics ********************
2;* File Name          : startup_stm32l072xx.s
3;* Author             : MCD Application Team
4;* Version            : V1.7.1
5;* Date               : 25-November-2016
6;* Description        : STM32l072xx Devices vector table for MDK-ARM toolchain.
7;*                      This module performs:
8;*                      - Set the initial SP
9;*                      - Set the initial PC == Reset_Handler
10;*                      - Set the vector table entries with the exceptions ISR address
11;*                      - Branches to __main in the C lbrary (which eventually
12;*                        calls main()).
13;*                      After Reset the Cortex-M0+ processor is in Thread mode,
14;*                      priority is Privileged, and the Stack is set to Main.
15;*******************************************************************************
16;*
17;* Redistribution and use in source and binary forms, with or without modification,
18;* are permitted provided that the following conditions are met:
19;*   1. Redistributions of source code must retain the above copyright notice,
20;*      this list of conditions and the following disclaimer.
21;*   2. Redistributions in binary form must reproduce the above copyright notice,
22;*      this list of conditions and the following disclaimer in the documentation
23;*      and/or other materials provided with the distribution.
24;*   3. Neither the name of STMicroelectronics nor the names of its contributors
25;*      may be used to endorse or promote products derived from this software
26;*      without specific prior written permission.
27;*
28;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
29;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
31;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
32;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
34;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
36;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
37;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38;*
39;*******************************************************************************
40;
41; Amount of memory (in bytes) allocated for Stack
42; Tailor this value to your application needs
43; <h> Stack Configuration
44;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
45; </h>
46
47Stack_Size      EQU     0x00000400
48
49                AREA    STACK, NOINIT, READWRITE, ALIGN=3
50Stack_Mem       SPACE   Stack_Size
51__initial_sp
52
53
54; <h> Heap Configuration
55;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
56; </h>
57
58Heap_Size       EQU     0x00000200
59
60                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
61__heap_base
62Heap_Mem        SPACE   Heap_Size
63__heap_limit
64
65                PRESERVE8
66                THUMB
67
68
69; Vector Table Mapped to Address 0 at Reset
70                AREA    RESET, DATA, READONLY
71                EXPORT  __Vectors
72                EXPORT  __Vectors_End
73                EXPORT  __Vectors_Size
74
75__Vectors       DCD     __initial_sp              ; Top of Stack
76                DCD     Reset_Handler             ; Reset Handler
77                DCD     NMI_Handler               ; NMI Handler
78                DCD     HardFault_Handler         ; Hard Fault Handler
79                DCD     0                         ; Reserved
80                DCD     0                         ; Reserved
81                DCD     0                         ; Reserved
82                DCD     0                         ; Reserved
83                DCD     0                         ; Reserved
84                DCD     0                         ; Reserved
85                DCD     0                         ; Reserved
86                DCD     SVC_Handler               ; SVCall Handler
87                DCD     0                         ; Reserved
88                DCD     0                         ; Reserved
89                DCD     PendSV_Handler            ; PendSV Handler
90                DCD     SysTick_Handler           ; SysTick Handler
91
92                ; External Interrupts
93                DCD     WWDG_IRQHandler                ; Window Watchdog
94                DCD     PVD_IRQHandler                 ; PVD through EXTI Line detect
95                DCD     RTC_IRQHandler                 ; RTC through EXTI Line
96                DCD     FLASH_IRQHandler               ; FLASH
97                DCD     RCC_CRS_IRQHandler             ; RCC and CRS
98                DCD     EXTI0_1_IRQHandler             ; EXTI Line 0 and 1
99                DCD     EXTI2_3_IRQHandler             ; EXTI Line 2 and 3
100                DCD     EXTI4_15_IRQHandler            ; EXTI Line 4 to 15
101                DCD     TSC_IRQHandler                 ; TSC
102                DCD     DMA1_Channel1_IRQHandler       ; DMA1 Channel 1
103                DCD     DMA1_Channel2_3_IRQHandler     ; DMA1 Channel 2 and Channel 3
104                DCD     DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7
105                DCD     ADC1_COMP_IRQHandler           ; ADC1, COMP1 and COMP2
106                DCD     LPTIM1_IRQHandler              ; LPTIM1
107                DCD     USART4_5_IRQHandler            ; USART4 and USART5
108                DCD     TIM2_IRQHandler                ; TIM2
109                DCD     TIM3_IRQHandler                ; TIM3
110                DCD     TIM6_DAC_IRQHandler            ; TIM6 and DAC
111                DCD     TIM7_IRQHandler                ; TIM7
112                DCD     0                              ; Reserved
113                DCD     TIM21_IRQHandler               ; TIM21
114                DCD     I2C3_IRQHandler                ; I2C3
115                DCD     TIM22_IRQHandler               ; TIM22
116                DCD     I2C1_IRQHandler                ; I2C1
117                DCD     I2C2_IRQHandler                ; I2C2
118                DCD     SPI1_IRQHandler                ; SPI1
119                DCD     SPI2_IRQHandler                ; SPI2
120                DCD     USART1_IRQHandler              ; USART1
121                DCD     USART2_IRQHandler              ; USART2
122                DCD     RNG_LPUART1_IRQHandler         ; RNG and LPUART1
123                DCD     0                              ; Reserved
124                DCD     USB_IRQHandler                 ; USB
125
126__Vectors_End
127
128__Vectors_Size  EQU  __Vectors_End - __Vectors
129
130                AREA    |.text|, CODE, READONLY
131
132; Reset handler routine
133Reset_Handler    PROC
134                 EXPORT  Reset_Handler                 [WEAK]
135        IMPORT  __main
136        IMPORT  SystemInit
137                 LDR     R0, =SystemInit
138                 BLX     R0
139                 LDR     R0, =__main
140                 BX      R0
141                 ENDP
142
143; Dummy Exception Handlers (infinite loops which can be modified)
144
145NMI_Handler     PROC
146                EXPORT  NMI_Handler                    [WEAK]
147                B       .
148                ENDP
149HardFault_Handler\
150                PROC
151                EXPORT  HardFault_Handler              [WEAK]
152                B       .
153                ENDP
154SVC_Handler     PROC
155                EXPORT  SVC_Handler                    [WEAK]
156                B       .
157                ENDP
158PendSV_Handler  PROC
159                EXPORT  PendSV_Handler                 [WEAK]
160                B       .
161                ENDP
162SysTick_Handler PROC
163                EXPORT  SysTick_Handler                [WEAK]
164                B       .
165                ENDP
166
167Default_Handler PROC
168
169                EXPORT  WWDG_IRQHandler                [WEAK]
170                EXPORT  PVD_IRQHandler                 [WEAK]
171                EXPORT  RTC_IRQHandler                 [WEAK]
172                EXPORT  FLASH_IRQHandler               [WEAK]
173                EXPORT  RCC_CRS_IRQHandler             [WEAK]
174                EXPORT  EXTI0_1_IRQHandler             [WEAK]
175                EXPORT  EXTI2_3_IRQHandler             [WEAK]
176                EXPORT  EXTI4_15_IRQHandler            [WEAK]
177                EXPORT  TSC_IRQHandler                  [WEAK]
178                EXPORT  DMA1_Channel1_IRQHandler       [WEAK]
179                EXPORT  DMA1_Channel2_3_IRQHandler     [WEAK]
180                EXPORT  DMA1_Channel4_5_6_7_IRQHandler [WEAK]
181                EXPORT  ADC1_COMP_IRQHandler           [WEAK]
182                EXPORT  LPTIM1_IRQHandler              [WEAK]
183                EXPORT  USART4_5_IRQHandler            [WEAK]
184                EXPORT  TIM2_IRQHandler                [WEAK]
185                EXPORT  TIM3_IRQHandler                [WEAK]
186                EXPORT  TIM6_DAC_IRQHandler            [WEAK]
187                EXPORT  TIM7_IRQHandler                [WEAK]
188                EXPORT  TIM21_IRQHandler               [WEAK]
189                EXPORT  TIM22_IRQHandler               [WEAK]
190                EXPORT  I2C1_IRQHandler                [WEAK]
191                EXPORT  I2C2_IRQHandler                [WEAK]
192                EXPORT  I2C3_IRQHandler                [WEAK]
193                EXPORT  SPI1_IRQHandler                [WEAK]
194                EXPORT  SPI2_IRQHandler                [WEAK]
195                EXPORT  USART1_IRQHandler              [WEAK]
196                EXPORT  USART2_IRQHandler              [WEAK]
197                EXPORT  RNG_LPUART1_IRQHandler         [WEAK]
198                EXPORT  USB_IRQHandler                 [WEAK]
199
200
201WWDG_IRQHandler
202PVD_IRQHandler
203RTC_IRQHandler
204FLASH_IRQHandler
205RCC_CRS_IRQHandler
206EXTI0_1_IRQHandler
207EXTI2_3_IRQHandler
208EXTI4_15_IRQHandler
209TSC_IRQHandler
210DMA1_Channel1_IRQHandler
211DMA1_Channel2_3_IRQHandler
212DMA1_Channel4_5_6_7_IRQHandler
213ADC1_COMP_IRQHandler
214LPTIM1_IRQHandler
215USART4_5_IRQHandler
216TIM2_IRQHandler
217TIM3_IRQHandler
218TIM6_DAC_IRQHandler
219TIM7_IRQHandler
220TIM21_IRQHandler
221TIM22_IRQHandler
222I2C1_IRQHandler
223I2C2_IRQHandler
224I2C3_IRQHandler
225SPI1_IRQHandler
226SPI2_IRQHandler
227USART1_IRQHandler
228USART2_IRQHandler
229RNG_LPUART1_IRQHandler
230USB_IRQHandler
231
232                B       .
233
234                ENDP
235
236                ALIGN
237
238;*******************************************************************************
239; User Stack and Heap initialization
240;*******************************************************************************
241                 IF      :DEF:__MICROLIB
242
243                 EXPORT  __initial_sp
244                 EXPORT  __heap_base
245                 EXPORT  __heap_limit
246
247                 ELSE
248
249                 IMPORT  __use_two_region_memory
250                 EXPORT  __user_initial_stackheap
251
252__user_initial_stackheap
253
254                 LDR     R0, =  Heap_Mem
255                 LDR     R1, =(Stack_Mem + Stack_Size)
256                 LDR     R2, = (Heap_Mem +  Heap_Size)
257                 LDR     R3, = Stack_Mem
258                 BX      LR
259
260                 ALIGN
261
262                 ENDIF
263
264                 END
265
266;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
267