1 /*!
2 * \file sx1276.c
3 *
4 * \brief SX1276 driver implementation
5 *
6 * \copyright Revised BSD License, see section \ref LICENSE.
7 *
8 * \code
9 * ______ _
10 * / _____) _ | |
11 * ( (____ _____ ____ _| |_ _____ ____| |__
12 * \____ \| ___ | (_ _) ___ |/ ___) _ \
13 * _____) ) ____| | | || |_| ____( (___| | | |
14 * (______/|_____)_|_|_| \__)_____)\____)_| |_|
15 * (C)2013-2017 Semtech
16 *
17 * \endcode
18 *
19 * \author Miguel Luis ( Semtech )
20 *
21 * \author Gregory Cristian ( Semtech )
22 *
23 * \author Wael Guibene ( Semtech )
24 */
25 #include <math.h>
26 #include <string.h>
27 #include "utilities.h"
28 #include "timer.h"
29 #include "radio.h"
30 #include "delay.h"
31 #include "sx1276.h"
32 #include "sx1276-board.h"
33
34 /*!
35 * \brief Internal frequency of the radio
36 */
37 #define SX1276_XTAL_FREQ 32000000UL
38
39 /*!
40 * \brief Scaling factor used to perform fixed-point operations
41 */
42 #define SX1276_PLL_STEP_SHIFT_AMOUNT ( 8 )
43
44 /*!
45 * \brief PLL step - scaled with SX1276_PLL_STEP_SHIFT_AMOUNT
46 */
47 #define SX1276_PLL_STEP_SCALED ( SX1276_XTAL_FREQ >> ( 19 - SX1276_PLL_STEP_SHIFT_AMOUNT ) )
48
49 /*!
50 * \brief Radio buffer size
51 */
52 #define RX_TX_BUFFER_SIZE 256
53
54 /*
55 * Local types definition
56 */
57
58 /*!
59 * Radio registers definition
60 */
61 typedef struct
62 {
63 RadioModems_t Modem;
64 uint8_t Addr;
65 uint8_t Value;
66 }RadioRegisters_t;
67
68 /*!
69 * FSK bandwidth definition
70 */
71 typedef struct
72 {
73 uint32_t bandwidth;
74 uint8_t RegValue;
75 }FskBandwidth_t;
76
77
78 /*
79 * Private functions prototypes
80 */
81
82 /*!
83 * Performs the Rx chain calibration for LF and HF bands
84 * \remark Must be called just after the reset so all registers are at their
85 * default values
86 */
87 static void RxChainCalibration( void );
88
89 /*!
90 * \brief Sets the SX1276 in transmission mode for the given time
91 * \param [IN] timeout Transmission timeout [ms] [0: continuous, others timeout]
92 */
93 static void SX1276SetTx( uint32_t timeout );
94
95 /*!
96 * \brief Writes the buffer contents to the SX1276 FIFO
97 *
98 * \param [IN] buffer Buffer containing data to be put on the FIFO.
99 * \param [IN] size Number of bytes to be written to the FIFO
100 */
101 static void SX1276WriteFifo( uint8_t *buffer, uint8_t size );
102
103 /*!
104 * \brief Reads the contents of the SX1276 FIFO
105 *
106 * \param [OUT] buffer Buffer where to copy the FIFO read data.
107 * \param [IN] size Number of bytes to be read from the FIFO
108 */
109 static void SX1276ReadFifo( uint8_t *buffer, uint8_t size );
110
111 /*!
112 * \brief Sets the SX1276 operating mode
113 *
114 * \param [IN] opMode New operating mode
115 */
116 static void SX1276SetOpMode( uint8_t opMode );
117
118 /*!
119 * \brief Get frequency in Hertz for a given number of PLL steps
120 *
121 * \param [in] pllSteps Number of PLL steps
122 *
123 * \returns Frequency in Hertz
124 */
125 static uint32_t SX1276ConvertPllStepToFreqInHz( uint32_t pllSteps );
126
127 /*!
128 * \brief Get the number of PLL steps for a given frequency in Hertz
129 *
130 * \param [in] freqInHz Frequency in Hertz
131 *
132 * \returns Number of PLL steps
133 */
134 static uint32_t SX1276ConvertFreqInHzToPllStep( uint32_t freqInHz );
135
136 /*!
137 * \brief Get the parameter corresponding to a FSK Rx bandwith immediately above the minimum requested one.
138 *
139 * \param [in] bw Minimum required bandwith in Hz
140 *
141 * \returns parameter
142 */
143 static uint8_t GetFskBandwidthRegValue( uint32_t bw );
144
145 /*!
146 * \brief Get the actual value in Hertz of a given LoRa bandwidth
147 *
148 * \param [in] bw LoRa bandwidth parameter
149 *
150 * \returns Actual LoRa bandwidth in Hertz
151 */
152 static uint32_t SX1276GetLoRaBandwidthInHz( uint32_t bw );
153
154 /*!
155 * Compute the numerator for GFSK time-on-air computation.
156 *
157 * \remark To get the actual time-on-air in second, this value has to be divided by the GFSK bitrate in bits per
158 * second.
159 *
160 * \param [in] preambleLen
161 * \param [in] fixLen
162 * \param [in] payloadLen
163 * \param [in] crcOn
164 *
165 * \returns GFSK time-on-air numerator
166 */
167 static uint32_t SX1276GetGfskTimeOnAirNumerator( uint16_t preambleLen, bool fixLen,
168 uint8_t payloadLen, bool crcOn );
169
170 /*!
171 * Compute the numerator for LoRa time-on-air computation.
172 *
173 * \remark To get the actual time-on-air in second, this value has to be divided by the LoRa bandwidth in Hertz.
174 *
175 * \param [in] bandwidth
176 * \param [in] datarate
177 * \param [in] coderate
178 * \param [in] preambleLen
179 * \param [in] fixLen
180 * \param [in] payloadLen
181 * \param [in] crcOn
182 *
183 * \returns LoRa time-on-air numerator
184 */
185 static uint32_t SX1276GetLoRaTimeOnAirNumerator( uint32_t bandwidth,
186 uint32_t datarate, uint8_t coderate,
187 uint16_t preambleLen, bool fixLen, uint8_t payloadLen,
188 bool crcOn );
189
190 /*
191 * SX1276 DIO IRQ callback functions prototype
192 */
193
194 /*!
195 * \brief DIO 0 IRQ callback
196 */
197 static void SX1276OnDio0Irq( void* context );
198
199 /*!
200 * \brief DIO 1 IRQ callback
201 */
202 static void SX1276OnDio1Irq( void* context );
203
204 /*!
205 * \brief DIO 2 IRQ callback
206 */
207 static void SX1276OnDio2Irq( void* context );
208
209 /*!
210 * \brief DIO 3 IRQ callback
211 */
212 static void SX1276OnDio3Irq( void* context );
213
214 /*!
215 * \brief DIO 4 IRQ callback
216 */
217 static void SX1276OnDio4Irq( void* context );
218
219 /*!
220 * \brief Tx & Rx timeout timer callback
221 */
222 static void SX1276OnTimeoutIrq( void* context );
223
224 /*
225 * Private global constants
226 */
227
228 /*!
229 * Radio hardware registers initialization
230 *
231 * \remark RADIO_INIT_REGISTERS_VALUE is defined in sx1276-board.h file
232 */
233 const RadioRegisters_t RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
234
235 /*!
236 * Constant values need to compute the RSSI value
237 */
238 #define RSSI_OFFSET_LF -164
239 #define RSSI_OFFSET_HF -157
240
241 /*!
242 * Precomputed FSK bandwidth registers values
243 */
244 const FskBandwidth_t FskBandwidths[] =
245 {
246 { 2600 , 0x17 },
247 { 3100 , 0x0F },
248 { 3900 , 0x07 },
249 { 5200 , 0x16 },
250 { 6300 , 0x0E },
251 { 7800 , 0x06 },
252 { 10400 , 0x15 },
253 { 12500 , 0x0D },
254 { 15600 , 0x05 },
255 { 20800 , 0x14 },
256 { 25000 , 0x0C },
257 { 31300 , 0x04 },
258 { 41700 , 0x13 },
259 { 50000 , 0x0B },
260 { 62500 , 0x03 },
261 { 83333 , 0x12 },
262 { 100000, 0x0A },
263 { 125000, 0x02 },
264 { 166700, 0x11 },
265 { 200000, 0x09 },
266 { 250000, 0x01 },
267 { 300000, 0x00 }, // Invalid Bandwidth
268 };
269
270 /*
271 * Private global variables
272 */
273
274 /*!
275 * Radio callbacks variable
276 */
277 static RadioEvents_t *RadioEvents;
278
279 /*!
280 * Reception buffer
281 */
282 static uint8_t RxTxBuffer[RX_TX_BUFFER_SIZE];
283
284 /*
285 * Public global variables
286 */
287
288 /*!
289 * Radio hardware and global parameters
290 */
291 SX1276_t SX1276;
292
293 /*!
294 * Hardware DIO IRQ callback initialization
295 */
296 DioIrqHandler *DioIrq[] = { SX1276OnDio0Irq, SX1276OnDio1Irq,
297 SX1276OnDio2Irq, SX1276OnDio3Irq,
298 SX1276OnDio4Irq, NULL };
299
300 /*!
301 * Tx and Rx timers
302 */
303 TimerEvent_t TxTimeoutTimer;
304 TimerEvent_t RxTimeoutTimer;
305 TimerEvent_t RxTimeoutSyncWord;
306
307 /*
308 * Radio driver functions implementation
309 */
310
SX1276Init(RadioEvents_t * events)311 void SX1276Init( RadioEvents_t *events )
312 {
313 uint8_t i;
314
315 RadioEvents = events;
316
317 // Initialize driver timeout timers
318 TimerInit( &TxTimeoutTimer, SX1276OnTimeoutIrq );
319 TimerInit( &RxTimeoutTimer, SX1276OnTimeoutIrq );
320 TimerInit( &RxTimeoutSyncWord, SX1276OnTimeoutIrq );
321
322 SX1276Reset( );
323
324 RxChainCalibration( );
325
326 SX1276SetOpMode( RF_OPMODE_SLEEP );
327
328 SX1276IoIrqInit( DioIrq );
329
330 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
331 {
332 SX1276SetModem( RadioRegsInit[i].Modem );
333 SX1276Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
334 }
335
336 SX1276SetModem( MODEM_FSK );
337
338 SX1276.Settings.State = RF_IDLE;
339 }
340
SX1276GetStatus(void)341 RadioState_t SX1276GetStatus( void )
342 {
343 return SX1276.Settings.State;
344 }
345
SX1276SetChannel(uint32_t freq)346 void SX1276SetChannel( uint32_t freq )
347 {
348 uint32_t freqInPllSteps = SX1276ConvertFreqInHzToPllStep( freq );
349
350 SX1276.Settings.Channel = freq;
351
352 SX1276Write( REG_FRFMSB, ( uint8_t )( ( freqInPllSteps >> 16 ) & 0xFF ) );
353 SX1276Write( REG_FRFMID, ( uint8_t )( ( freqInPllSteps >> 8 ) & 0xFF ) );
354 SX1276Write( REG_FRFLSB, ( uint8_t )( freqInPllSteps & 0xFF ) );
355 }
356
SX1276IsChannelFree(uint32_t freq,uint32_t rxBandwidth,int16_t rssiThresh,uint32_t maxCarrierSenseTime)357 bool SX1276IsChannelFree( uint32_t freq, uint32_t rxBandwidth, int16_t rssiThresh, uint32_t maxCarrierSenseTime )
358 {
359 bool status = true;
360 int16_t rssi = 0;
361 uint32_t carrierSenseTime = 0;
362
363 SX1276SetSleep( );
364
365 SX1276SetModem( MODEM_FSK );
366
367 SX1276SetChannel( freq );
368
369 SX1276Write( REG_RXBW, GetFskBandwidthRegValue( rxBandwidth ) );
370 SX1276Write( REG_AFCBW, GetFskBandwidthRegValue( rxBandwidth ) );
371
372 SX1276SetOpMode( RF_OPMODE_RECEIVER );
373
374 DelayMs( 1 );
375
376 carrierSenseTime = TimerGetCurrentTime( );
377
378 // Perform carrier sense for maxCarrierSenseTime
379 while( TimerGetElapsedTime( carrierSenseTime ) < maxCarrierSenseTime )
380 {
381 rssi = SX1276ReadRssi( MODEM_FSK );
382
383 if( rssi > rssiThresh )
384 {
385 status = false;
386 break;
387 }
388 }
389 SX1276SetSleep( );
390 return status;
391 }
392
SX1276Random(void)393 uint32_t SX1276Random( void )
394 {
395 uint8_t i;
396 uint32_t rnd = 0;
397
398 /*
399 * Radio setup for random number generation
400 */
401 // Set LoRa modem ON
402 SX1276SetModem( MODEM_LORA );
403
404 // Disable LoRa modem interrupts
405 SX1276Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
406 RFLR_IRQFLAGS_RXDONE |
407 RFLR_IRQFLAGS_PAYLOADCRCERROR |
408 RFLR_IRQFLAGS_VALIDHEADER |
409 RFLR_IRQFLAGS_TXDONE |
410 RFLR_IRQFLAGS_CADDONE |
411 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
412 RFLR_IRQFLAGS_CADDETECTED );
413
414 // Set radio in continuous reception
415 SX1276SetOpMode( RF_OPMODE_RECEIVER );
416
417 for( i = 0; i < 32; i++ )
418 {
419 DelayMs( 1 );
420 // Unfiltered RSSI value reading. Only takes the LSB value
421 rnd |= ( ( uint32_t )SX1276Read( REG_LR_RSSIWIDEBAND ) & 0x01 ) << i;
422 }
423
424 SX1276SetSleep( );
425
426 return rnd;
427 }
428
429 /*!
430 * Performs the Rx chain calibration for LF and HF bands
431 * \remark Must be called just after the reset so all registers are at their
432 * default values
433 */
RxChainCalibration(void)434 static void RxChainCalibration( void )
435 {
436 uint8_t regPaConfigInitVal;
437 uint32_t initialFreq;
438
439 // Save context
440 regPaConfigInitVal = SX1276Read( REG_PACONFIG );
441
442 initialFreq = SX1276ConvertPllStepToFreqInHz( ( ( ( uint32_t )SX1276Read( REG_FRFMSB ) << 16 ) |
443 ( ( uint32_t )SX1276Read( REG_FRFMID ) << 8 ) |
444 ( ( uint32_t )SX1276Read( REG_FRFLSB ) ) ) );
445
446 // Cut the PA just in case, RFO output, power = -1 dBm
447 SX1276Write( REG_PACONFIG, 0x00 );
448
449 // Launch Rx chain calibration for LF band
450 SX1276Write( REG_IMAGECAL, ( SX1276Read( REG_IMAGECAL ) & RF_IMAGECAL_IMAGECAL_MASK ) | RF_IMAGECAL_IMAGECAL_START );
451 while( ( SX1276Read( REG_IMAGECAL ) & RF_IMAGECAL_IMAGECAL_RUNNING ) == RF_IMAGECAL_IMAGECAL_RUNNING )
452 {
453 }
454
455 // Sets a Frequency in HF band
456 SX1276SetChannel( 868000000 );
457
458 // Launch Rx chain calibration for HF band
459 SX1276Write( REG_IMAGECAL, ( SX1276Read( REG_IMAGECAL ) & RF_IMAGECAL_IMAGECAL_MASK ) | RF_IMAGECAL_IMAGECAL_START );
460 while( ( SX1276Read( REG_IMAGECAL ) & RF_IMAGECAL_IMAGECAL_RUNNING ) == RF_IMAGECAL_IMAGECAL_RUNNING )
461 {
462 }
463
464 // Restore context
465 SX1276Write( REG_PACONFIG, regPaConfigInitVal );
466 SX1276SetChannel( initialFreq );
467 }
468
SX1276SetRxConfig(RadioModems_t modem,uint32_t bandwidth,uint32_t datarate,uint8_t coderate,uint32_t bandwidthAfc,uint16_t preambleLen,uint16_t symbTimeout,bool fixLen,uint8_t payloadLen,bool crcOn,bool freqHopOn,uint8_t hopPeriod,bool iqInverted,bool rxContinuous)469 void SX1276SetRxConfig( RadioModems_t modem, uint32_t bandwidth,
470 uint32_t datarate, uint8_t coderate,
471 uint32_t bandwidthAfc, uint16_t preambleLen,
472 uint16_t symbTimeout, bool fixLen,
473 uint8_t payloadLen,
474 bool crcOn, bool freqHopOn, uint8_t hopPeriod,
475 bool iqInverted, bool rxContinuous )
476 {
477 SX1276SetModem( modem );
478
479 SX1276SetStby( );
480
481 switch( modem )
482 {
483 case MODEM_FSK:
484 {
485 SX1276.Settings.Fsk.Bandwidth = bandwidth;
486 SX1276.Settings.Fsk.Datarate = datarate;
487 SX1276.Settings.Fsk.BandwidthAfc = bandwidthAfc;
488 SX1276.Settings.Fsk.FixLen = fixLen;
489 SX1276.Settings.Fsk.PayloadLen = payloadLen;
490 SX1276.Settings.Fsk.CrcOn = crcOn;
491 SX1276.Settings.Fsk.IqInverted = iqInverted;
492 SX1276.Settings.Fsk.RxContinuous = rxContinuous;
493 SX1276.Settings.Fsk.PreambleLen = preambleLen;
494 SX1276.Settings.Fsk.RxSingleTimeout = ( uint32_t )symbTimeout * 8000UL / datarate;
495
496 uint32_t bitRate = ( uint32_t )( SX1276_XTAL_FREQ / datarate );
497 SX1276Write( REG_BITRATEMSB, ( uint8_t )( bitRate >> 8 ) );
498 SX1276Write( REG_BITRATELSB, ( uint8_t )( bitRate & 0xFF ) );
499
500 SX1276Write( REG_RXBW, GetFskBandwidthRegValue( bandwidth ) );
501 SX1276Write( REG_AFCBW, GetFskBandwidthRegValue( bandwidthAfc ) );
502
503 SX1276Write( REG_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
504 SX1276Write( REG_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
505
506 if( fixLen == 1 )
507 {
508 SX1276Write( REG_PAYLOADLENGTH, payloadLen );
509 }
510 else
511 {
512 SX1276Write( REG_PAYLOADLENGTH, 0xFF ); // Set payload length to the maximum
513 }
514
515 SX1276Write( REG_PACKETCONFIG1,
516 ( SX1276Read( REG_PACKETCONFIG1 ) &
517 RF_PACKETCONFIG1_CRC_MASK &
518 RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
519 ( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
520 ( crcOn << 4 ) );
521 SX1276Write( REG_PACKETCONFIG2, ( SX1276Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
522 }
523 break;
524 case MODEM_LORA:
525 {
526 if( bandwidth > 2 )
527 {
528 // Fatal error: When using LoRa modem only bandwidths 125, 250 and 500 kHz are supported
529 while( 1 );
530 }
531 bandwidth += 7;
532 SX1276.Settings.LoRa.Bandwidth = bandwidth;
533 SX1276.Settings.LoRa.Datarate = datarate;
534 SX1276.Settings.LoRa.Coderate = coderate;
535 SX1276.Settings.LoRa.PreambleLen = preambleLen;
536 SX1276.Settings.LoRa.FixLen = fixLen;
537 SX1276.Settings.LoRa.PayloadLen = payloadLen;
538 SX1276.Settings.LoRa.CrcOn = crcOn;
539 SX1276.Settings.LoRa.FreqHopOn = freqHopOn;
540 SX1276.Settings.LoRa.HopPeriod = hopPeriod;
541 SX1276.Settings.LoRa.IqInverted = iqInverted;
542 SX1276.Settings.LoRa.RxContinuous = rxContinuous;
543
544 if( datarate > 12 )
545 {
546 datarate = 12;
547 }
548 else if( datarate < 6 )
549 {
550 datarate = 6;
551 }
552
553 if( ( ( bandwidth == 7 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
554 ( ( bandwidth == 8 ) && ( datarate == 12 ) ) )
555 {
556 SX1276.Settings.LoRa.LowDatarateOptimize = 0x01;
557 }
558 else
559 {
560 SX1276.Settings.LoRa.LowDatarateOptimize = 0x00;
561 }
562
563 SX1276Write( REG_LR_MODEMCONFIG1,
564 ( SX1276Read( REG_LR_MODEMCONFIG1 ) &
565 RFLR_MODEMCONFIG1_BW_MASK &
566 RFLR_MODEMCONFIG1_CODINGRATE_MASK &
567 RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK ) |
568 ( bandwidth << 4 ) | ( coderate << 1 ) |
569 fixLen );
570
571 SX1276Write( REG_LR_MODEMCONFIG2,
572 ( SX1276Read( REG_LR_MODEMCONFIG2 ) &
573 RFLR_MODEMCONFIG2_SF_MASK &
574 RFLR_MODEMCONFIG2_RXPAYLOADCRC_MASK &
575 RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) |
576 ( datarate << 4 ) | ( crcOn << 2 ) |
577 ( ( symbTimeout >> 8 ) & ~RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) );
578
579 SX1276Write( REG_LR_MODEMCONFIG3,
580 ( SX1276Read( REG_LR_MODEMCONFIG3 ) &
581 RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_MASK ) |
582 ( SX1276.Settings.LoRa.LowDatarateOptimize << 3 ) );
583
584 SX1276Write( REG_LR_SYMBTIMEOUTLSB, ( uint8_t )( symbTimeout & 0xFF ) );
585
586 SX1276Write( REG_LR_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
587 SX1276Write( REG_LR_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
588
589 if( fixLen == 1 )
590 {
591 SX1276Write( REG_LR_PAYLOADLENGTH, payloadLen );
592 }
593
594 if( SX1276.Settings.LoRa.FreqHopOn == true )
595 {
596 SX1276Write( REG_LR_PLLHOP, ( SX1276Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLHOP_FASTHOP_ON );
597 SX1276Write( REG_LR_HOPPERIOD, SX1276.Settings.LoRa.HopPeriod );
598 }
599
600 if( ( bandwidth == 9 ) && ( SX1276.Settings.Channel > RF_MID_BAND_THRESH ) )
601 {
602 // ERRATA 2.1 - Sensitivity Optimization with a 500 kHz Bandwidth
603 SX1276Write( REG_LR_HIGHBWOPTIMIZE1, 0x02 );
604 SX1276Write( REG_LR_HIGHBWOPTIMIZE2, 0x64 );
605 }
606 else if( bandwidth == 9 )
607 {
608 // ERRATA 2.1 - Sensitivity Optimization with a 500 kHz Bandwidth
609 SX1276Write( REG_LR_HIGHBWOPTIMIZE1, 0x02 );
610 SX1276Write( REG_LR_HIGHBWOPTIMIZE2, 0x7F );
611 }
612 else
613 {
614 // ERRATA 2.1 - Sensitivity Optimization with a 500 kHz Bandwidth
615 SX1276Write( REG_LR_HIGHBWOPTIMIZE1, 0x03 );
616 }
617
618 if( datarate == 6 )
619 {
620 SX1276Write( REG_LR_DETECTOPTIMIZE,
621 ( SX1276Read( REG_LR_DETECTOPTIMIZE ) &
622 RFLR_DETECTIONOPTIMIZE_MASK ) |
623 RFLR_DETECTIONOPTIMIZE_SF6 );
624 SX1276Write( REG_LR_DETECTIONTHRESHOLD,
625 RFLR_DETECTIONTHRESH_SF6 );
626 }
627 else
628 {
629 SX1276Write( REG_LR_DETECTOPTIMIZE,
630 ( SX1276Read( REG_LR_DETECTOPTIMIZE ) &
631 RFLR_DETECTIONOPTIMIZE_MASK ) |
632 RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
633 SX1276Write( REG_LR_DETECTIONTHRESHOLD,
634 RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
635 }
636 }
637 break;
638 }
639 }
640
SX1276SetTxConfig(RadioModems_t modem,int8_t power,uint32_t fdev,uint32_t bandwidth,uint32_t datarate,uint8_t coderate,uint16_t preambleLen,bool fixLen,bool crcOn,bool freqHopOn,uint8_t hopPeriod,bool iqInverted,uint32_t timeout)641 void SX1276SetTxConfig( RadioModems_t modem, int8_t power, uint32_t fdev,
642 uint32_t bandwidth, uint32_t datarate,
643 uint8_t coderate, uint16_t preambleLen,
644 bool fixLen, bool crcOn, bool freqHopOn,
645 uint8_t hopPeriod, bool iqInverted, uint32_t timeout )
646 {
647 SX1276SetModem( modem );
648
649 SX1276SetStby( );
650
651 SX1276SetRfTxPower( power );
652
653 switch( modem )
654 {
655 case MODEM_FSK:
656 {
657 SX1276.Settings.Fsk.Power = power;
658 SX1276.Settings.Fsk.Fdev = fdev;
659 SX1276.Settings.Fsk.Bandwidth = bandwidth;
660 SX1276.Settings.Fsk.Datarate = datarate;
661 SX1276.Settings.Fsk.PreambleLen = preambleLen;
662 SX1276.Settings.Fsk.FixLen = fixLen;
663 SX1276.Settings.Fsk.CrcOn = crcOn;
664 SX1276.Settings.Fsk.IqInverted = iqInverted;
665 SX1276.Settings.Fsk.TxTimeout = timeout;
666
667 uint32_t fdevInPllSteps = SX1276ConvertFreqInHzToPllStep( fdev );
668 SX1276Write( REG_FDEVMSB, ( uint8_t )( fdevInPllSteps >> 8 ) );
669 SX1276Write( REG_FDEVLSB, ( uint8_t )( fdevInPllSteps & 0xFF ) );
670
671 uint32_t bitRate = ( uint32_t )( SX1276_XTAL_FREQ / datarate );
672 SX1276Write( REG_BITRATEMSB, ( uint8_t )( bitRate >> 8 ) );
673 SX1276Write( REG_BITRATELSB, ( uint8_t )( bitRate & 0xFF ) );
674
675 SX1276Write( REG_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
676 SX1276Write( REG_PREAMBLELSB, preambleLen & 0xFF );
677
678 SX1276Write( REG_PACKETCONFIG1,
679 ( SX1276Read( REG_PACKETCONFIG1 ) &
680 RF_PACKETCONFIG1_CRC_MASK &
681 RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
682 ( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
683 ( crcOn << 4 ) );
684 SX1276Write( REG_PACKETCONFIG2, ( SX1276Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
685 }
686 break;
687 case MODEM_LORA:
688 {
689 SX1276.Settings.LoRa.Power = power;
690 if( bandwidth > 2 )
691 {
692 // Fatal error: When using LoRa modem only bandwidths 125, 250 and 500 kHz are supported
693 while( 1 );
694 }
695 bandwidth += 7;
696 SX1276.Settings.LoRa.Bandwidth = bandwidth;
697 SX1276.Settings.LoRa.Datarate = datarate;
698 SX1276.Settings.LoRa.Coderate = coderate;
699 SX1276.Settings.LoRa.PreambleLen = preambleLen;
700 SX1276.Settings.LoRa.FixLen = fixLen;
701 SX1276.Settings.LoRa.FreqHopOn = freqHopOn;
702 SX1276.Settings.LoRa.HopPeriod = hopPeriod;
703 SX1276.Settings.LoRa.CrcOn = crcOn;
704 SX1276.Settings.LoRa.IqInverted = iqInverted;
705 SX1276.Settings.LoRa.TxTimeout = timeout;
706
707 if( datarate > 12 )
708 {
709 datarate = 12;
710 }
711 else if( datarate < 6 )
712 {
713 datarate = 6;
714 }
715 if( ( ( bandwidth == 7 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
716 ( ( bandwidth == 8 ) && ( datarate == 12 ) ) )
717 {
718 SX1276.Settings.LoRa.LowDatarateOptimize = 0x01;
719 }
720 else
721 {
722 SX1276.Settings.LoRa.LowDatarateOptimize = 0x00;
723 }
724
725 if( SX1276.Settings.LoRa.FreqHopOn == true )
726 {
727 SX1276Write( REG_LR_PLLHOP, ( SX1276Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLHOP_FASTHOP_ON );
728 SX1276Write( REG_LR_HOPPERIOD, SX1276.Settings.LoRa.HopPeriod );
729 }
730
731 SX1276Write( REG_LR_MODEMCONFIG1,
732 ( SX1276Read( REG_LR_MODEMCONFIG1 ) &
733 RFLR_MODEMCONFIG1_BW_MASK &
734 RFLR_MODEMCONFIG1_CODINGRATE_MASK &
735 RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK ) |
736 ( bandwidth << 4 ) | ( coderate << 1 ) |
737 fixLen );
738
739 SX1276Write( REG_LR_MODEMCONFIG2,
740 ( SX1276Read( REG_LR_MODEMCONFIG2 ) &
741 RFLR_MODEMCONFIG2_SF_MASK &
742 RFLR_MODEMCONFIG2_RXPAYLOADCRC_MASK ) |
743 ( datarate << 4 ) | ( crcOn << 2 ) );
744
745 SX1276Write( REG_LR_MODEMCONFIG3,
746 ( SX1276Read( REG_LR_MODEMCONFIG3 ) &
747 RFLR_MODEMCONFIG3_LOWDATARATEOPTIMIZE_MASK ) |
748 ( SX1276.Settings.LoRa.LowDatarateOptimize << 3 ) );
749
750 SX1276Write( REG_LR_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
751 SX1276Write( REG_LR_PREAMBLELSB, preambleLen & 0xFF );
752
753 if( datarate == 6 )
754 {
755 SX1276Write( REG_LR_DETECTOPTIMIZE,
756 ( SX1276Read( REG_LR_DETECTOPTIMIZE ) &
757 RFLR_DETECTIONOPTIMIZE_MASK ) |
758 RFLR_DETECTIONOPTIMIZE_SF6 );
759 SX1276Write( REG_LR_DETECTIONTHRESHOLD,
760 RFLR_DETECTIONTHRESH_SF6 );
761 }
762 else
763 {
764 SX1276Write( REG_LR_DETECTOPTIMIZE,
765 ( SX1276Read( REG_LR_DETECTOPTIMIZE ) &
766 RFLR_DETECTIONOPTIMIZE_MASK ) |
767 RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
768 SX1276Write( REG_LR_DETECTIONTHRESHOLD,
769 RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
770 }
771 }
772 break;
773 }
774 }
775
SX1276GetTimeOnAir(RadioModems_t modem,uint32_t bandwidth,uint32_t datarate,uint8_t coderate,uint16_t preambleLen,bool fixLen,uint8_t payloadLen,bool crcOn)776 uint32_t SX1276GetTimeOnAir( RadioModems_t modem, uint32_t bandwidth,
777 uint32_t datarate, uint8_t coderate,
778 uint16_t preambleLen, bool fixLen, uint8_t payloadLen,
779 bool crcOn )
780 {
781 uint32_t numerator = 0;
782 uint32_t denominator = 1;
783
784 switch( modem )
785 {
786 case MODEM_FSK:
787 {
788 numerator = 1000U * SX1276GetGfskTimeOnAirNumerator( preambleLen, fixLen, payloadLen, crcOn );
789 denominator = datarate;
790 }
791 break;
792 case MODEM_LORA:
793 {
794 numerator = 1000U * SX1276GetLoRaTimeOnAirNumerator( bandwidth, datarate, coderate, preambleLen, fixLen,
795 payloadLen, crcOn );
796 denominator = SX1276GetLoRaBandwidthInHz( bandwidth );
797 }
798 break;
799 }
800 // Perform integral ceil()
801 return ( numerator + denominator - 1 ) / denominator;
802 }
803
SX1276Send(uint8_t * buffer,uint8_t size)804 void SX1276Send( uint8_t *buffer, uint8_t size )
805 {
806 uint32_t txTimeout = 0;
807
808 switch( SX1276.Settings.Modem )
809 {
810 case MODEM_FSK:
811 {
812 SX1276.Settings.FskPacketHandler.NbBytes = 0;
813 SX1276.Settings.FskPacketHandler.Size = size;
814
815 if( SX1276.Settings.Fsk.FixLen == false )
816 {
817 SX1276WriteFifo( ( uint8_t* )&size, 1 );
818 }
819 else
820 {
821 SX1276Write( REG_PAYLOADLENGTH, size );
822 }
823
824 if( ( size > 0 ) && ( size <= 64 ) )
825 {
826 SX1276.Settings.FskPacketHandler.ChunkSize = size;
827 }
828 else
829 {
830 memcpy1( RxTxBuffer, buffer, size );
831 SX1276.Settings.FskPacketHandler.ChunkSize = 32;
832 }
833
834 // Write payload buffer
835 SX1276WriteFifo( buffer, SX1276.Settings.FskPacketHandler.ChunkSize );
836 SX1276.Settings.FskPacketHandler.NbBytes += SX1276.Settings.FskPacketHandler.ChunkSize;
837 txTimeout = SX1276.Settings.Fsk.TxTimeout;
838 }
839 break;
840 case MODEM_LORA:
841 {
842 if( SX1276.Settings.LoRa.IqInverted == true )
843 {
844 SX1276Write( REG_LR_INVERTIQ, ( ( SX1276Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_ON ) );
845 SX1276Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_ON );
846 }
847 else
848 {
849 SX1276Write( REG_LR_INVERTIQ, ( ( SX1276Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
850 SX1276Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
851 }
852
853 SX1276.Settings.LoRaPacketHandler.Size = size;
854
855 // Initializes the payload size
856 SX1276Write( REG_LR_PAYLOADLENGTH, size );
857
858 // Full buffer used for Tx
859 SX1276Write( REG_LR_FIFOTXBASEADDR, 0 );
860 SX1276Write( REG_LR_FIFOADDRPTR, 0 );
861
862 // FIFO operations can not take place in Sleep mode
863 if( ( SX1276Read( REG_OPMODE ) & ~RF_OPMODE_MASK ) == RF_OPMODE_SLEEP )
864 {
865 SX1276SetStby( );
866 DelayMs( 1 );
867 }
868 // Write payload buffer
869 SX1276WriteFifo( buffer, size );
870 txTimeout = SX1276.Settings.LoRa.TxTimeout;
871 }
872 break;
873 }
874
875 SX1276SetTx( txTimeout );
876 }
877
SX1276SetSleep(void)878 void SX1276SetSleep( void )
879 {
880 TimerStop( &RxTimeoutTimer );
881 TimerStop( &TxTimeoutTimer );
882 TimerStop( &RxTimeoutSyncWord );
883
884 SX1276SetOpMode( RF_OPMODE_SLEEP );
885
886 // Disable TCXO radio is in SLEEP mode
887 SX1276SetBoardTcxo( false );
888
889 SX1276.Settings.State = RF_IDLE;
890 }
891
SX1276SetStby(void)892 void SX1276SetStby( void )
893 {
894 TimerStop( &RxTimeoutTimer );
895 TimerStop( &TxTimeoutTimer );
896 TimerStop( &RxTimeoutSyncWord );
897
898 SX1276SetOpMode( RF_OPMODE_STANDBY );
899 SX1276.Settings.State = RF_IDLE;
900 }
901
SX1276SetRx(uint32_t timeout)902 void SX1276SetRx( uint32_t timeout )
903 {
904 bool rxContinuous = false;
905 TimerStop( &TxTimeoutTimer );
906
907 switch( SX1276.Settings.Modem )
908 {
909 case MODEM_FSK:
910 {
911 rxContinuous = SX1276.Settings.Fsk.RxContinuous;
912
913 // DIO0=PayloadReady
914 // DIO1=FifoLevel
915 // DIO2=SyncAddr
916 // DIO3=FifoEmpty
917 // DIO4=Preamble
918 // DIO5=ModeReady
919 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
920 RF_DIOMAPPING1_DIO1_MASK &
921 RF_DIOMAPPING1_DIO2_MASK ) |
922 RF_DIOMAPPING1_DIO0_00 |
923 RF_DIOMAPPING1_DIO1_00 |
924 RF_DIOMAPPING1_DIO2_11 );
925
926 SX1276Write( REG_DIOMAPPING2, ( SX1276Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
927 RF_DIOMAPPING2_MAP_MASK ) |
928 RF_DIOMAPPING2_DIO4_11 |
929 RF_DIOMAPPING2_MAP_PREAMBLEDETECT );
930
931 SX1276.Settings.FskPacketHandler.FifoThresh = SX1276Read( REG_FIFOTHRESH ) & 0x3F;
932
933 SX1276Write( REG_RXCONFIG, RF_RXCONFIG_AFCAUTO_ON | RF_RXCONFIG_AGCAUTO_ON | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT );
934
935 SX1276.Settings.FskPacketHandler.PreambleDetected = false;
936 SX1276.Settings.FskPacketHandler.SyncWordDetected = false;
937 SX1276.Settings.FskPacketHandler.NbBytes = 0;
938 SX1276.Settings.FskPacketHandler.Size = 0;
939 }
940 break;
941 case MODEM_LORA:
942 {
943 if( SX1276.Settings.LoRa.IqInverted == true )
944 {
945 SX1276Write( REG_LR_INVERTIQ, ( ( SX1276Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_ON | RFLR_INVERTIQ_TX_OFF ) );
946 SX1276Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_ON );
947 }
948 else
949 {
950 SX1276Write( REG_LR_INVERTIQ, ( ( SX1276Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
951 SX1276Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
952 }
953
954 // ERRATA 2.3 - Receiver Spurious Reception of a LoRa Signal
955 if( SX1276.Settings.LoRa.Bandwidth < 9 )
956 {
957 SX1276Write( REG_LR_DETECTOPTIMIZE, SX1276Read( REG_LR_DETECTOPTIMIZE ) & 0x7F );
958 SX1276Write( REG_LR_IFFREQ2, 0x00 );
959 switch( SX1276.Settings.LoRa.Bandwidth )
960 {
961 case 0: // 7.8 kHz
962 SX1276Write( REG_LR_IFFREQ1, 0x48 );
963 SX1276SetChannel(SX1276.Settings.Channel + 7810 );
964 break;
965 case 1: // 10.4 kHz
966 SX1276Write( REG_LR_IFFREQ1, 0x44 );
967 SX1276SetChannel(SX1276.Settings.Channel + 10420 );
968 break;
969 case 2: // 15.6 kHz
970 SX1276Write( REG_LR_IFFREQ1, 0x44 );
971 SX1276SetChannel(SX1276.Settings.Channel + 15620 );
972 break;
973 case 3: // 20.8 kHz
974 SX1276Write( REG_LR_IFFREQ1, 0x44 );
975 SX1276SetChannel(SX1276.Settings.Channel + 20830 );
976 break;
977 case 4: // 31.2 kHz
978 SX1276Write( REG_LR_IFFREQ1, 0x44 );
979 SX1276SetChannel(SX1276.Settings.Channel + 31250 );
980 break;
981 case 5: // 41.4 kHz
982 SX1276Write( REG_LR_IFFREQ1, 0x44 );
983 SX1276SetChannel(SX1276.Settings.Channel + 41670 );
984 break;
985 case 6: // 62.5 kHz
986 SX1276Write( REG_LR_IFFREQ1, 0x40 );
987 break;
988 case 7: // 125 kHz
989 SX1276Write( REG_LR_IFFREQ1, 0x40 );
990 break;
991 case 8: // 250 kHz
992 SX1276Write( REG_LR_IFFREQ1, 0x40 );
993 break;
994 }
995 }
996 else
997 {
998 SX1276Write( REG_LR_DETECTOPTIMIZE, SX1276Read( REG_LR_DETECTOPTIMIZE ) | 0x80 );
999 }
1000
1001 rxContinuous = SX1276.Settings.LoRa.RxContinuous;
1002
1003 if( SX1276.Settings.LoRa.FreqHopOn == true )
1004 {
1005 SX1276Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
1006 //RFLR_IRQFLAGS_RXDONE |
1007 //RFLR_IRQFLAGS_PAYLOADCRCERROR |
1008 RFLR_IRQFLAGS_VALIDHEADER |
1009 RFLR_IRQFLAGS_TXDONE |
1010 RFLR_IRQFLAGS_CADDONE |
1011 //RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
1012 RFLR_IRQFLAGS_CADDETECTED );
1013
1014 // DIO0=RxDone, DIO2=FhssChangeChannel
1015 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_00 | RFLR_DIOMAPPING1_DIO2_00 );
1016 }
1017 else
1018 {
1019 SX1276Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
1020 //RFLR_IRQFLAGS_RXDONE |
1021 //RFLR_IRQFLAGS_PAYLOADCRCERROR |
1022 RFLR_IRQFLAGS_VALIDHEADER |
1023 RFLR_IRQFLAGS_TXDONE |
1024 RFLR_IRQFLAGS_CADDONE |
1025 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
1026 RFLR_IRQFLAGS_CADDETECTED );
1027
1028 // DIO0=RxDone
1029 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_00 );
1030 }
1031 SX1276Write( REG_LR_FIFORXBASEADDR, 0 );
1032 SX1276Write( REG_LR_FIFOADDRPTR, 0 );
1033 }
1034 break;
1035 }
1036
1037 SX1276.Settings.State = RF_RX_RUNNING;
1038 if( timeout != 0 )
1039 {
1040 TimerSetValue( &RxTimeoutTimer, timeout );
1041 TimerStart( &RxTimeoutTimer );
1042 }
1043
1044 if( SX1276.Settings.Modem == MODEM_FSK )
1045 {
1046 SX1276SetOpMode( RF_OPMODE_RECEIVER );
1047
1048 if( rxContinuous == false )
1049 {
1050 TimerSetValue( &RxTimeoutSyncWord, SX1276.Settings.Fsk.RxSingleTimeout );
1051 TimerStart( &RxTimeoutSyncWord );
1052 }
1053 }
1054 else
1055 {
1056 if( rxContinuous == true )
1057 {
1058 SX1276SetOpMode( RFLR_OPMODE_RECEIVER );
1059 }
1060 else
1061 {
1062 SX1276SetOpMode( RFLR_OPMODE_RECEIVER_SINGLE );
1063 }
1064 }
1065 }
1066
SX1276SetTx(uint32_t timeout)1067 static void SX1276SetTx( uint32_t timeout )
1068 {
1069 TimerStop( &RxTimeoutTimer );
1070
1071 TimerSetValue( &TxTimeoutTimer, timeout );
1072
1073 switch( SX1276.Settings.Modem )
1074 {
1075 case MODEM_FSK:
1076 {
1077 // DIO0=PacketSent
1078 // DIO1=FifoLevel
1079 // DIO2=FifoFull
1080 // DIO3=FifoEmpty
1081 // DIO4=LowBat
1082 // DIO5=ModeReady
1083 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
1084 RF_DIOMAPPING1_DIO1_MASK &
1085 RF_DIOMAPPING1_DIO2_MASK ) );
1086
1087 SX1276Write( REG_DIOMAPPING2, ( SX1276Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
1088 RF_DIOMAPPING2_MAP_MASK ) );
1089 SX1276.Settings.FskPacketHandler.FifoThresh = SX1276Read( REG_FIFOTHRESH ) & 0x3F;
1090 }
1091 break;
1092 case MODEM_LORA:
1093 {
1094 if( SX1276.Settings.LoRa.FreqHopOn == true )
1095 {
1096 SX1276Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
1097 RFLR_IRQFLAGS_RXDONE |
1098 RFLR_IRQFLAGS_PAYLOADCRCERROR |
1099 RFLR_IRQFLAGS_VALIDHEADER |
1100 //RFLR_IRQFLAGS_TXDONE |
1101 RFLR_IRQFLAGS_CADDONE |
1102 //RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
1103 RFLR_IRQFLAGS_CADDETECTED );
1104
1105 // DIO0=TxDone, DIO2=FhssChangeChannel
1106 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_01 | RFLR_DIOMAPPING1_DIO2_00 );
1107 }
1108 else
1109 {
1110 SX1276Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
1111 RFLR_IRQFLAGS_RXDONE |
1112 RFLR_IRQFLAGS_PAYLOADCRCERROR |
1113 RFLR_IRQFLAGS_VALIDHEADER |
1114 //RFLR_IRQFLAGS_TXDONE |
1115 RFLR_IRQFLAGS_CADDONE |
1116 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
1117 RFLR_IRQFLAGS_CADDETECTED );
1118
1119 // DIO0=TxDone
1120 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_01 );
1121 }
1122 }
1123 break;
1124 }
1125
1126 SX1276.Settings.State = RF_TX_RUNNING;
1127 TimerStart( &TxTimeoutTimer );
1128 SX1276SetOpMode( RF_OPMODE_TRANSMITTER );
1129 }
1130
SX1276StartCad(void)1131 void SX1276StartCad( void )
1132 {
1133 switch( SX1276.Settings.Modem )
1134 {
1135 case MODEM_FSK:
1136 {
1137
1138 }
1139 break;
1140 case MODEM_LORA:
1141 {
1142 SX1276Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
1143 RFLR_IRQFLAGS_RXDONE |
1144 RFLR_IRQFLAGS_PAYLOADCRCERROR |
1145 RFLR_IRQFLAGS_VALIDHEADER |
1146 RFLR_IRQFLAGS_TXDONE |
1147 //RFLR_IRQFLAGS_CADDONE |
1148 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL // |
1149 //RFLR_IRQFLAGS_CADDETECTED
1150 );
1151
1152 // DIO3=CADDone
1153 SX1276Write( REG_DIOMAPPING1, ( SX1276Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO3_MASK ) | RFLR_DIOMAPPING1_DIO3_00 );
1154
1155 SX1276.Settings.State = RF_CAD;
1156 SX1276SetOpMode( RFLR_OPMODE_CAD );
1157 }
1158 break;
1159 default:
1160 break;
1161 }
1162 }
1163
SX1276SetTxContinuousWave(uint32_t freq,int8_t power,uint16_t time)1164 void SX1276SetTxContinuousWave( uint32_t freq, int8_t power, uint16_t time )
1165 {
1166 uint32_t timeout = ( uint32_t )time * 1000;
1167
1168 SX1276SetChannel( freq );
1169
1170 SX1276SetTxConfig( MODEM_FSK, power, 0, 0, 4800, 0, 5, false, false, 0, 0, 0, timeout );
1171
1172 SX1276Write( REG_PACKETCONFIG2, ( SX1276Read( REG_PACKETCONFIG2 ) & RF_PACKETCONFIG2_DATAMODE_MASK ) );
1173 // Disable radio interrupts
1174 SX1276Write( REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_11 | RF_DIOMAPPING1_DIO1_11 );
1175 SX1276Write( REG_DIOMAPPING2, RF_DIOMAPPING2_DIO4_10 | RF_DIOMAPPING2_DIO5_10 );
1176
1177 TimerSetValue( &TxTimeoutTimer, timeout );
1178
1179 SX1276.Settings.State = RF_TX_RUNNING;
1180 TimerStart( &TxTimeoutTimer );
1181 SX1276SetOpMode( RF_OPMODE_TRANSMITTER );
1182 }
1183
SX1276ReadRssi(RadioModems_t modem)1184 int16_t SX1276ReadRssi( RadioModems_t modem )
1185 {
1186 int16_t rssi = 0;
1187
1188 switch( modem )
1189 {
1190 case MODEM_FSK:
1191 rssi = -( SX1276Read( REG_RSSIVALUE ) >> 1 );
1192 break;
1193 case MODEM_LORA:
1194 if( SX1276.Settings.Channel > RF_MID_BAND_THRESH )
1195 {
1196 rssi = RSSI_OFFSET_HF + SX1276Read( REG_LR_RSSIVALUE );
1197 }
1198 else
1199 {
1200 rssi = RSSI_OFFSET_LF + SX1276Read( REG_LR_RSSIVALUE );
1201 }
1202 break;
1203 default:
1204 rssi = -1;
1205 break;
1206 }
1207 return rssi;
1208 }
1209
SX1276SetOpMode(uint8_t opMode)1210 static void SX1276SetOpMode( uint8_t opMode )
1211 {
1212 #if defined( USE_RADIO_DEBUG )
1213 switch( opMode )
1214 {
1215 case RF_OPMODE_TRANSMITTER:
1216 SX1276DbgPinTxWrite( 1 );
1217 SX1276DbgPinRxWrite( 0 );
1218 break;
1219 case RF_OPMODE_RECEIVER:
1220 case RFLR_OPMODE_RECEIVER_SINGLE:
1221 SX1276DbgPinTxWrite( 0 );
1222 SX1276DbgPinRxWrite( 1 );
1223 break;
1224 default:
1225 SX1276DbgPinTxWrite( 0 );
1226 SX1276DbgPinRxWrite( 0 );
1227 break;
1228 }
1229 #endif
1230 if( opMode == RF_OPMODE_SLEEP )
1231 {
1232 SX1276SetAntSwLowPower( true );
1233 }
1234 else
1235 {
1236 // Enable TCXO if operating mode different from SLEEP.
1237 SX1276SetBoardTcxo( true );
1238 SX1276SetAntSwLowPower( false );
1239 SX1276SetAntSw( opMode );
1240 }
1241 SX1276Write( REG_OPMODE, ( SX1276Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode );
1242 }
1243
SX1276SetModem(RadioModems_t modem)1244 void SX1276SetModem( RadioModems_t modem )
1245 {
1246 if( ( SX1276Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_ON ) != 0 )
1247 {
1248 SX1276.Settings.Modem = MODEM_LORA;
1249 }
1250 else
1251 {
1252 SX1276.Settings.Modem = MODEM_FSK;
1253 }
1254
1255 if( SX1276.Settings.Modem == modem )
1256 {
1257 return;
1258 }
1259
1260 SX1276.Settings.Modem = modem;
1261 switch( SX1276.Settings.Modem )
1262 {
1263 default:
1264 case MODEM_FSK:
1265 SX1276SetOpMode( RF_OPMODE_SLEEP );
1266 SX1276Write( REG_OPMODE, ( SX1276Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_OFF );
1267
1268 SX1276Write( REG_DIOMAPPING1, 0x00 );
1269 SX1276Write( REG_DIOMAPPING2, 0x30 ); // DIO5=ModeReady
1270 break;
1271 case MODEM_LORA:
1272 SX1276SetOpMode( RF_OPMODE_SLEEP );
1273 SX1276Write( REG_OPMODE, ( SX1276Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_ON );
1274
1275 SX1276Write( REG_DIOMAPPING1, 0x00 );
1276 SX1276Write( REG_DIOMAPPING2, 0x00 );
1277 break;
1278 }
1279 }
1280
SX1276Write(uint32_t addr,uint8_t data)1281 void SX1276Write( uint32_t addr, uint8_t data )
1282 {
1283 SX1276WriteBuffer( addr, &data, 1 );
1284 }
1285
SX1276Read(uint32_t addr)1286 uint8_t SX1276Read( uint32_t addr )
1287 {
1288 uint8_t data;
1289 SX1276ReadBuffer( addr, &data, 1 );
1290 return data;
1291 }
1292
1293 #ifndef __ZEPHYR__
SX1276WriteBuffer(uint32_t addr,uint8_t * buffer,uint8_t size)1294 void SX1276WriteBuffer( uint32_t addr, uint8_t *buffer, uint8_t size )
1295 {
1296 uint8_t i;
1297
1298 //NSS = 0;
1299 GpioWrite( &SX1276.Spi.Nss, 0 );
1300
1301 SpiInOut( &SX1276.Spi, addr | 0x80 );
1302 for( i = 0; i < size; i++ )
1303 {
1304 SpiInOut( &SX1276.Spi, buffer[i] );
1305 }
1306
1307 //NSS = 1;
1308 GpioWrite( &SX1276.Spi.Nss, 1 );
1309 }
1310
SX1276ReadBuffer(uint32_t addr,uint8_t * buffer,uint8_t size)1311 void SX1276ReadBuffer( uint32_t addr, uint8_t *buffer, uint8_t size )
1312 {
1313 uint8_t i;
1314
1315 //NSS = 0;
1316 GpioWrite( &SX1276.Spi.Nss, 0 );
1317
1318 SpiInOut( &SX1276.Spi, addr & 0x7F );
1319
1320 for( i = 0; i < size; i++ )
1321 {
1322 buffer[i] = SpiInOut( &SX1276.Spi, 0 );
1323 }
1324
1325 //NSS = 1;
1326 GpioWrite( &SX1276.Spi.Nss, 1 );
1327 }
1328 #endif
1329
SX1276WriteFifo(uint8_t * buffer,uint8_t size)1330 static void SX1276WriteFifo( uint8_t *buffer, uint8_t size )
1331 {
1332 SX1276WriteBuffer( 0, buffer, size );
1333 }
1334
SX1276ReadFifo(uint8_t * buffer,uint8_t size)1335 static void SX1276ReadFifo( uint8_t *buffer, uint8_t size )
1336 {
1337 SX1276ReadBuffer( 0, buffer, size );
1338 }
1339
SX1276SetMaxPayloadLength(RadioModems_t modem,uint8_t max)1340 void SX1276SetMaxPayloadLength( RadioModems_t modem, uint8_t max )
1341 {
1342 SX1276SetModem( modem );
1343
1344 switch( modem )
1345 {
1346 case MODEM_FSK:
1347 if( SX1276.Settings.Fsk.FixLen == false )
1348 {
1349 SX1276Write( REG_PAYLOADLENGTH, max );
1350 }
1351 break;
1352 case MODEM_LORA:
1353 SX1276Write( REG_LR_PAYLOADMAXLENGTH, max );
1354 break;
1355 }
1356 }
1357
SX1276SetPublicNetwork(bool enable)1358 void SX1276SetPublicNetwork( bool enable )
1359 {
1360 SX1276SetModem( MODEM_LORA );
1361 SX1276.Settings.LoRa.PublicNetwork = enable;
1362 if( enable == true )
1363 {
1364 // Change LoRa modem SyncWord
1365 SX1276Write( REG_LR_SYNCWORD, LORA_MAC_PUBLIC_SYNCWORD );
1366 }
1367 else
1368 {
1369 // Change LoRa modem SyncWord
1370 SX1276Write( REG_LR_SYNCWORD, LORA_MAC_PRIVATE_SYNCWORD );
1371 }
1372 }
1373
SX1276GetWakeupTime(void)1374 uint32_t SX1276GetWakeupTime( void )
1375 {
1376 return SX1276GetBoardTcxoWakeupTime( ) + RADIO_WAKEUP_TIME;
1377 }
1378
SX1276ConvertPllStepToFreqInHz(uint32_t pllSteps)1379 static uint32_t SX1276ConvertPllStepToFreqInHz( uint32_t pllSteps )
1380 {
1381 uint32_t freqInHzInt;
1382 uint32_t freqInHzFrac;
1383
1384 // freqInHz = pllSteps * ( SX1276_XTAL_FREQ / 2^19 )
1385 // Get integer and fractional parts of the frequency computed with a PLL step scaled value
1386 freqInHzInt = pllSteps >> SX1276_PLL_STEP_SHIFT_AMOUNT;
1387 freqInHzFrac = pllSteps - ( freqInHzInt << SX1276_PLL_STEP_SHIFT_AMOUNT );
1388
1389 // Apply the scaling factor to retrieve a frequency in Hz (+ ceiling)
1390 return freqInHzInt * SX1276_PLL_STEP_SCALED +
1391 ( ( freqInHzFrac * SX1276_PLL_STEP_SCALED + ( 128 ) ) >> SX1276_PLL_STEP_SHIFT_AMOUNT );
1392 }
1393
SX1276ConvertFreqInHzToPllStep(uint32_t freqInHz)1394 static uint32_t SX1276ConvertFreqInHzToPllStep( uint32_t freqInHz )
1395 {
1396 uint32_t stepsInt;
1397 uint32_t stepsFrac;
1398
1399 // pllSteps = freqInHz / (SX1276_XTAL_FREQ / 2^19 )
1400 // Get integer and fractional parts of the frequency computed with a PLL step scaled value
1401 stepsInt = freqInHz / SX1276_PLL_STEP_SCALED;
1402 stepsFrac = freqInHz - ( stepsInt * SX1276_PLL_STEP_SCALED );
1403
1404 // Apply the scaling factor to retrieve a frequency in Hz (+ ceiling)
1405 return ( stepsInt << SX1276_PLL_STEP_SHIFT_AMOUNT ) +
1406 ( ( ( stepsFrac << SX1276_PLL_STEP_SHIFT_AMOUNT ) + ( SX1276_PLL_STEP_SCALED >> 1 ) ) /
1407 SX1276_PLL_STEP_SCALED );
1408 }
1409
GetFskBandwidthRegValue(uint32_t bw)1410 static uint8_t GetFskBandwidthRegValue( uint32_t bw )
1411 {
1412 uint8_t i;
1413
1414 for( i = 0; i < ( sizeof( FskBandwidths ) / sizeof( FskBandwidth_t ) ) - 1; i++ )
1415 {
1416 if( ( bw >= FskBandwidths[i].bandwidth ) && ( bw < FskBandwidths[i + 1].bandwidth ) )
1417 {
1418 return FskBandwidths[i].RegValue;
1419 }
1420 }
1421 // ERROR: Value not found
1422 while( 1 );
1423 }
1424
SX1276GetLoRaBandwidthInHz(uint32_t bw)1425 static uint32_t SX1276GetLoRaBandwidthInHz( uint32_t bw )
1426 {
1427 uint32_t bandwidthInHz = 0;
1428
1429 switch( bw )
1430 {
1431 case 0: // 125 kHz
1432 bandwidthInHz = 125000UL;
1433 break;
1434 case 1: // 250 kHz
1435 bandwidthInHz = 250000UL;
1436 break;
1437 case 2: // 500 kHz
1438 bandwidthInHz = 500000UL;
1439 break;
1440 }
1441
1442 return bandwidthInHz;
1443 }
1444
SX1276GetGfskTimeOnAirNumerator(uint16_t preambleLen,bool fixLen,uint8_t payloadLen,bool crcOn)1445 static uint32_t SX1276GetGfskTimeOnAirNumerator( uint16_t preambleLen, bool fixLen,
1446 uint8_t payloadLen, bool crcOn )
1447 {
1448 const uint8_t syncWordLength = 3;
1449
1450 return ( preambleLen << 3 ) +
1451 ( ( fixLen == false ) ? 8 : 0 ) +
1452 ( syncWordLength << 3 ) +
1453 ( ( payloadLen +
1454 ( 0 ) + // Address filter size
1455 ( ( crcOn == true ) ? 2 : 0 )
1456 ) << 3
1457 );
1458 }
1459
SX1276GetLoRaTimeOnAirNumerator(uint32_t bandwidth,uint32_t datarate,uint8_t coderate,uint16_t preambleLen,bool fixLen,uint8_t payloadLen,bool crcOn)1460 static uint32_t SX1276GetLoRaTimeOnAirNumerator( uint32_t bandwidth,
1461 uint32_t datarate, uint8_t coderate,
1462 uint16_t preambleLen, bool fixLen, uint8_t payloadLen,
1463 bool crcOn )
1464 {
1465 int32_t crDenom = coderate + 4;
1466 bool lowDatareOptimize = false;
1467
1468 // Ensure that the preamble length is at least 12 symbols when using SF5 or
1469 // SF6
1470 if( ( datarate == 5 ) || ( datarate == 6 ) )
1471 {
1472 if( preambleLen < 12 )
1473 {
1474 preambleLen = 12;
1475 }
1476 }
1477
1478 if( ( ( bandwidth == 0 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
1479 ( ( bandwidth == 1 ) && ( datarate == 12 ) ) )
1480 {
1481 lowDatareOptimize = true;
1482 }
1483
1484 int32_t ceilDenominator;
1485 int32_t ceilNumerator = ( payloadLen << 3 ) +
1486 ( crcOn ? 16 : 0 ) -
1487 ( 4 * datarate ) +
1488 ( fixLen ? 0 : 20 );
1489
1490 if( datarate <= 6 )
1491 {
1492 ceilDenominator = 4 * datarate;
1493 }
1494 else
1495 {
1496 ceilNumerator += 8;
1497
1498 if( lowDatareOptimize == true )
1499 {
1500 ceilDenominator = 4 * ( datarate - 2 );
1501 }
1502 else
1503 {
1504 ceilDenominator = 4 * datarate;
1505 }
1506 }
1507
1508 if( ceilNumerator < 0 )
1509 {
1510 ceilNumerator = 0;
1511 }
1512
1513 // Perform integral ceil()
1514 int32_t intermediate =
1515 ( ( ceilNumerator + ceilDenominator - 1 ) / ceilDenominator ) * crDenom + preambleLen + 12;
1516
1517 if( datarate <= 6 )
1518 {
1519 intermediate += 2;
1520 }
1521
1522 return ( uint32_t )( ( 4 * intermediate + 1 ) * ( 1 << ( datarate - 2 ) ) );
1523 }
1524
SX1276OnTimeoutIrq(void * context)1525 static void SX1276OnTimeoutIrq( void* context )
1526 {
1527 switch( SX1276.Settings.State )
1528 {
1529 case RF_RX_RUNNING:
1530 if( SX1276.Settings.Modem == MODEM_FSK )
1531 {
1532 SX1276.Settings.FskPacketHandler.PreambleDetected = false;
1533 SX1276.Settings.FskPacketHandler.SyncWordDetected = false;
1534 SX1276.Settings.FskPacketHandler.NbBytes = 0;
1535 SX1276.Settings.FskPacketHandler.Size = 0;
1536
1537 // Clear Irqs
1538 SX1276Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
1539 RF_IRQFLAGS1_PREAMBLEDETECT |
1540 RF_IRQFLAGS1_SYNCADDRESSMATCH );
1541 SX1276Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
1542
1543 if( SX1276.Settings.Fsk.RxContinuous == true )
1544 {
1545 // Continuous mode restart Rx chain
1546 SX1276Write( REG_RXCONFIG, SX1276Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
1547 }
1548 else
1549 {
1550 SX1276.Settings.State = RF_IDLE;
1551 TimerStop( &RxTimeoutSyncWord );
1552 }
1553 }
1554 if( ( RadioEvents != NULL ) && ( RadioEvents->RxTimeout != NULL ) )
1555 {
1556 RadioEvents->RxTimeout( );
1557 }
1558 break;
1559 case RF_TX_RUNNING:
1560 // Tx timeout shouldn't happen.
1561 // Reported issue of SPI data corruption resulting in TX TIMEOUT
1562 // is NOT related to a bug in radio transceiver.
1563 // It is mainly caused by improper PCB routing of SPI lines and/or
1564 // violation of SPI specifications.
1565 // To mitigate redesign, Semtech offers a workaround which resets
1566 // the radio transceiver and putting it into a known state.
1567
1568 // BEGIN WORKAROUND
1569
1570 // Reset the radio
1571 SX1276Reset( );
1572
1573 // Calibrate Rx chain
1574 RxChainCalibration( );
1575
1576 // Initialize radio default values
1577 SX1276SetOpMode( RF_OPMODE_SLEEP );
1578
1579 for( uint8_t i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
1580 {
1581 SX1276SetModem( RadioRegsInit[i].Modem );
1582 SX1276Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
1583 }
1584 SX1276SetModem( MODEM_FSK );
1585
1586 // Restore previous network type setting.
1587 SX1276SetPublicNetwork( SX1276.Settings.LoRa.PublicNetwork );
1588 // END WORKAROUND
1589
1590 SX1276.Settings.State = RF_IDLE;
1591 if( ( RadioEvents != NULL ) && ( RadioEvents->TxTimeout != NULL ) )
1592 {
1593 RadioEvents->TxTimeout( );
1594 }
1595 break;
1596 default:
1597 break;
1598 }
1599 }
1600
SX1276OnDio0Irq(void * context)1601 static void SX1276OnDio0Irq( void* context )
1602 {
1603 volatile uint8_t irqFlags = 0;
1604
1605 switch( SX1276.Settings.State )
1606 {
1607 case RF_RX_RUNNING:
1608 //TimerStop( &RxTimeoutTimer );
1609 // RxDone interrupt
1610 switch( SX1276.Settings.Modem )
1611 {
1612 case MODEM_FSK:
1613 if( SX1276.Settings.Fsk.CrcOn == true )
1614 {
1615 irqFlags = SX1276Read( REG_IRQFLAGS2 );
1616 if( ( irqFlags & RF_IRQFLAGS2_CRCOK ) != RF_IRQFLAGS2_CRCOK )
1617 {
1618 // Clear Irqs
1619 SX1276Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
1620 RF_IRQFLAGS1_PREAMBLEDETECT |
1621 RF_IRQFLAGS1_SYNCADDRESSMATCH );
1622 SX1276Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
1623
1624 TimerStop( &RxTimeoutTimer );
1625
1626 if( SX1276.Settings.Fsk.RxContinuous == false )
1627 {
1628 TimerStop( &RxTimeoutSyncWord );
1629 SX1276.Settings.State = RF_IDLE;
1630 }
1631 else
1632 {
1633 // Continuous mode restart Rx chain
1634 SX1276Write( REG_RXCONFIG, SX1276Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
1635 }
1636
1637 if( ( RadioEvents != NULL ) && ( RadioEvents->RxError != NULL ) )
1638 {
1639 RadioEvents->RxError( );
1640 }
1641 SX1276.Settings.FskPacketHandler.PreambleDetected = false;
1642 SX1276.Settings.FskPacketHandler.SyncWordDetected = false;
1643 SX1276.Settings.FskPacketHandler.NbBytes = 0;
1644 SX1276.Settings.FskPacketHandler.Size = 0;
1645 break;
1646 }
1647 }
1648
1649 // Read received packet size
1650 if( ( SX1276.Settings.FskPacketHandler.Size == 0 ) && ( SX1276.Settings.FskPacketHandler.NbBytes == 0 ) )
1651 {
1652 if( SX1276.Settings.Fsk.FixLen == false )
1653 {
1654 SX1276ReadFifo( ( uint8_t* )&SX1276.Settings.FskPacketHandler.Size, 1 );
1655 }
1656 else
1657 {
1658 SX1276.Settings.FskPacketHandler.Size = SX1276Read( REG_PAYLOADLENGTH );
1659 }
1660 SX1276ReadFifo( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes, SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1661 SX1276.Settings.FskPacketHandler.NbBytes += ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1662 }
1663 else
1664 {
1665 SX1276ReadFifo( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes, SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1666 SX1276.Settings.FskPacketHandler.NbBytes += ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1667 }
1668
1669 TimerStop( &RxTimeoutTimer );
1670
1671 if( SX1276.Settings.Fsk.RxContinuous == false )
1672 {
1673 SX1276.Settings.State = RF_IDLE;
1674 TimerStop( &RxTimeoutSyncWord );
1675 }
1676 else
1677 {
1678 // Continuous mode restart Rx chain
1679 SX1276Write( REG_RXCONFIG, SX1276Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
1680 }
1681
1682 if( ( RadioEvents != NULL ) && ( RadioEvents->RxDone != NULL ) )
1683 {
1684 RadioEvents->RxDone( RxTxBuffer, SX1276.Settings.FskPacketHandler.Size, SX1276.Settings.FskPacketHandler.RssiValue, 0 );
1685 }
1686 SX1276.Settings.FskPacketHandler.PreambleDetected = false;
1687 SX1276.Settings.FskPacketHandler.SyncWordDetected = false;
1688 SX1276.Settings.FskPacketHandler.NbBytes = 0;
1689 SX1276.Settings.FskPacketHandler.Size = 0;
1690 break;
1691 case MODEM_LORA:
1692 {
1693 // Clear Irq
1694 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXDONE );
1695
1696 irqFlags = SX1276Read( REG_LR_IRQFLAGS );
1697 if( ( irqFlags & RFLR_IRQFLAGS_PAYLOADCRCERROR_MASK ) == RFLR_IRQFLAGS_PAYLOADCRCERROR )
1698 {
1699 // Clear Irq
1700 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_PAYLOADCRCERROR );
1701
1702 if( SX1276.Settings.LoRa.RxContinuous == false )
1703 {
1704 SX1276.Settings.State = RF_IDLE;
1705 }
1706 TimerStop( &RxTimeoutTimer );
1707
1708 if( ( RadioEvents != NULL ) && ( RadioEvents->RxError != NULL ) )
1709 {
1710 RadioEvents->RxError( );
1711 }
1712 break;
1713 }
1714
1715 // Returns SNR value [dB] rounded to the nearest integer value
1716 SX1276.Settings.LoRaPacketHandler.SnrValue = ( ( ( int8_t )SX1276Read( REG_LR_PKTSNRVALUE ) ) + 2 ) >> 2;
1717
1718 int16_t rssi = SX1276Read( REG_LR_PKTRSSIVALUE );
1719 if( SX1276.Settings.LoRaPacketHandler.SnrValue < 0 )
1720 {
1721 if( SX1276.Settings.Channel > RF_MID_BAND_THRESH )
1722 {
1723 SX1276.Settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET_HF + rssi + ( rssi >> 4 ) +
1724 SX1276.Settings.LoRaPacketHandler.SnrValue;
1725 }
1726 else
1727 {
1728 SX1276.Settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET_LF + rssi + ( rssi >> 4 ) +
1729 SX1276.Settings.LoRaPacketHandler.SnrValue;
1730 }
1731 }
1732 else
1733 {
1734 if( SX1276.Settings.Channel > RF_MID_BAND_THRESH )
1735 {
1736 SX1276.Settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET_HF + rssi + ( rssi >> 4 );
1737 }
1738 else
1739 {
1740 SX1276.Settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET_LF + rssi + ( rssi >> 4 );
1741 }
1742 }
1743
1744 SX1276.Settings.LoRaPacketHandler.Size = SX1276Read( REG_LR_RXNBBYTES );
1745 SX1276Write( REG_LR_FIFOADDRPTR, SX1276Read( REG_LR_FIFORXCURRENTADDR ) );
1746 SX1276ReadFifo( RxTxBuffer, SX1276.Settings.LoRaPacketHandler.Size );
1747
1748 if( SX1276.Settings.LoRa.RxContinuous == false )
1749 {
1750 SX1276.Settings.State = RF_IDLE;
1751 }
1752 TimerStop( &RxTimeoutTimer );
1753
1754 if( ( RadioEvents != NULL ) && ( RadioEvents->RxDone != NULL ) )
1755 {
1756 RadioEvents->RxDone( RxTxBuffer, SX1276.Settings.LoRaPacketHandler.Size, SX1276.Settings.LoRaPacketHandler.RssiValue, SX1276.Settings.LoRaPacketHandler.SnrValue );
1757 }
1758 }
1759 break;
1760 default:
1761 break;
1762 }
1763 break;
1764 case RF_TX_RUNNING:
1765 TimerStop( &TxTimeoutTimer );
1766 // TxDone interrupt
1767 switch( SX1276.Settings.Modem )
1768 {
1769 case MODEM_LORA:
1770 // Clear Irq
1771 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_TXDONE );
1772 // Intentional fall through
1773 case MODEM_FSK:
1774 default:
1775 SX1276.Settings.State = RF_IDLE;
1776 if( ( RadioEvents != NULL ) && ( RadioEvents->TxDone != NULL ) )
1777 {
1778 RadioEvents->TxDone( );
1779 }
1780 break;
1781 }
1782 break;
1783 default:
1784 break;
1785 }
1786 }
1787
SX1276OnDio1Irq(void * context)1788 static void SX1276OnDio1Irq( void* context )
1789 {
1790 switch( SX1276.Settings.State )
1791 {
1792 case RF_RX_RUNNING:
1793 switch( SX1276.Settings.Modem )
1794 {
1795 case MODEM_FSK:
1796 // Check FIFO level DIO1 pin state
1797 //
1798 // As DIO1 interrupt is triggered when a rising or a falling edge is detected the IRQ handler must
1799 // verify DIO1 pin state in order to decide if something has to be done.
1800 // When radio is operating in FSK reception mode a rising edge must be detected in order to handle the
1801 // IRQ.
1802 if( SX1276GetDio1PinState( ) == 0 )
1803 {
1804 break;
1805 }
1806 // Stop timer
1807 TimerStop( &RxTimeoutSyncWord );
1808
1809 // FifoLevel interrupt
1810 // Read received packet size
1811 if( ( SX1276.Settings.FskPacketHandler.Size == 0 ) && ( SX1276.Settings.FskPacketHandler.NbBytes == 0 ) )
1812 {
1813 if( SX1276.Settings.Fsk.FixLen == false )
1814 {
1815 SX1276ReadFifo( ( uint8_t* )&SX1276.Settings.FskPacketHandler.Size, 1 );
1816 }
1817 else
1818 {
1819 SX1276.Settings.FskPacketHandler.Size = SX1276Read( REG_PAYLOADLENGTH );
1820 }
1821 }
1822
1823 // ERRATA 3.1 - PayloadReady Set for 31.25ns if FIFO is Empty
1824 //
1825 // When FifoLevel interrupt is used to offload the
1826 // FIFO, the microcontroller should monitor both
1827 // PayloadReady and FifoLevel interrupts, and
1828 // read only (FifoThreshold-1) bytes off the FIFO
1829 // when FifoLevel fires
1830 if( ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes ) >= SX1276.Settings.FskPacketHandler.FifoThresh )
1831 {
1832 SX1276ReadFifo( ( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes ), SX1276.Settings.FskPacketHandler.FifoThresh - 1 );
1833 SX1276.Settings.FskPacketHandler.NbBytes += SX1276.Settings.FskPacketHandler.FifoThresh - 1;
1834 }
1835 else
1836 {
1837 SX1276ReadFifo( ( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes ), SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1838 SX1276.Settings.FskPacketHandler.NbBytes += ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1839 }
1840 break;
1841 case MODEM_LORA:
1842 // Check RxTimeout DIO1 pin state
1843 //
1844 // DIO1 irq is setup to be triggered on rsing and falling edges
1845 // As DIO1 interrupt is triggered when a rising or a falling edge is detected the IRQ handler must
1846 // verify DIO1 pin state in order to decide if something has to be done.
1847 // When radio is operating in LoRa reception mode a rising edge must be detected in order to handle the
1848 // IRQ.
1849 if( SX1276GetDio1PinState( ) == 0 )
1850 {
1851 break;
1852 }
1853 // Sync time out
1854 TimerStop( &RxTimeoutTimer );
1855 // Clear Irq
1856 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXTIMEOUT );
1857
1858 SX1276.Settings.State = RF_IDLE;
1859 if( ( RadioEvents != NULL ) && ( RadioEvents->RxTimeout != NULL ) )
1860 {
1861 RadioEvents->RxTimeout( );
1862 }
1863 break;
1864 default:
1865 break;
1866 }
1867 break;
1868 case RF_TX_RUNNING:
1869 switch( SX1276.Settings.Modem )
1870 {
1871 case MODEM_FSK:
1872 // Check FIFO level DIO1 pin state
1873 //
1874 // As DIO1 interrupt is triggered when a rising or a falling edge is detected the IRQ handler must
1875 // verify DIO1 pin state in order to decide if something has to be done.
1876 // When radio is operating in FSK transmission mode a falling edge must be detected in order to handle
1877 // the IRQ.
1878 if( SX1276GetDio1PinState( ) == 1 )
1879 {
1880 break;
1881 }
1882
1883 // FifoLevel interrupt
1884 if( ( SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes ) > SX1276.Settings.FskPacketHandler.ChunkSize )
1885 {
1886 SX1276WriteFifo( ( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes ), SX1276.Settings.FskPacketHandler.ChunkSize );
1887 SX1276.Settings.FskPacketHandler.NbBytes += SX1276.Settings.FskPacketHandler.ChunkSize;
1888 }
1889 else
1890 {
1891 // Write the last chunk of data
1892 SX1276WriteFifo( RxTxBuffer + SX1276.Settings.FskPacketHandler.NbBytes, SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes );
1893 SX1276.Settings.FskPacketHandler.NbBytes += SX1276.Settings.FskPacketHandler.Size - SX1276.Settings.FskPacketHandler.NbBytes;
1894 }
1895 break;
1896 case MODEM_LORA:
1897 break;
1898 default:
1899 break;
1900 }
1901 break;
1902 default:
1903 break;
1904 }
1905 }
1906
SX1276OnDio2Irq(void * context)1907 static void SX1276OnDio2Irq( void* context )
1908 {
1909 switch( SX1276.Settings.State )
1910 {
1911 case RF_RX_RUNNING:
1912 switch( SX1276.Settings.Modem )
1913 {
1914 case MODEM_FSK:
1915 // Checks if DIO4 is connected. If it is not PreambleDetected is set to true.
1916 if( SX1276.DIO4.port == NULL )
1917 {
1918 SX1276.Settings.FskPacketHandler.PreambleDetected = true;
1919 }
1920
1921 if( ( SX1276.Settings.FskPacketHandler.PreambleDetected != 0 ) && ( SX1276.Settings.FskPacketHandler.SyncWordDetected == 0 ) )
1922 {
1923 TimerStop( &RxTimeoutSyncWord );
1924
1925 SX1276.Settings.FskPacketHandler.SyncWordDetected = true;
1926
1927 SX1276.Settings.FskPacketHandler.RssiValue = -( SX1276Read( REG_RSSIVALUE ) >> 1 );
1928
1929 SX1276.Settings.FskPacketHandler.AfcValue = ( int32_t )SX1276ConvertPllStepToFreqInHz( ( ( uint16_t )SX1276Read( REG_AFCMSB ) << 8 ) |
1930 ( uint16_t )SX1276Read( REG_AFCLSB ) );
1931 SX1276.Settings.FskPacketHandler.RxGain = ( SX1276Read( REG_LNA ) >> 5 ) & 0x07;
1932 }
1933 break;
1934 case MODEM_LORA:
1935 if( SX1276.Settings.LoRa.FreqHopOn == true )
1936 {
1937 // Clear Irq
1938 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
1939
1940 if( ( RadioEvents != NULL ) && ( RadioEvents->FhssChangeChannel != NULL ) )
1941 {
1942 RadioEvents->FhssChangeChannel( ( SX1276Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
1943 }
1944 }
1945 break;
1946 default:
1947 break;
1948 }
1949 break;
1950 case RF_TX_RUNNING:
1951 switch( SX1276.Settings.Modem )
1952 {
1953 case MODEM_FSK:
1954 break;
1955 case MODEM_LORA:
1956 if( SX1276.Settings.LoRa.FreqHopOn == true )
1957 {
1958 // Clear Irq
1959 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
1960
1961 if( ( RadioEvents != NULL ) && ( RadioEvents->FhssChangeChannel != NULL ) )
1962 {
1963 RadioEvents->FhssChangeChannel( ( SX1276Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
1964 }
1965 }
1966 break;
1967 default:
1968 break;
1969 }
1970 break;
1971 default:
1972 break;
1973 }
1974 }
1975
SX1276OnDio3Irq(void * context)1976 static void SX1276OnDio3Irq( void* context )
1977 {
1978 switch( SX1276.Settings.Modem )
1979 {
1980 case MODEM_FSK:
1981 break;
1982 case MODEM_LORA:
1983 if( ( SX1276Read( REG_LR_IRQFLAGS ) & RFLR_IRQFLAGS_CADDETECTED ) == RFLR_IRQFLAGS_CADDETECTED )
1984 {
1985 // Clear Irq
1986 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDETECTED | RFLR_IRQFLAGS_CADDONE );
1987 if( ( RadioEvents != NULL ) && ( RadioEvents->CadDone != NULL ) )
1988 {
1989 RadioEvents->CadDone( true );
1990 }
1991 }
1992 else
1993 {
1994 // Clear Irq
1995 SX1276Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDONE );
1996 if( ( RadioEvents != NULL ) && ( RadioEvents->CadDone != NULL ) )
1997 {
1998 RadioEvents->CadDone( false );
1999 }
2000 }
2001 break;
2002 default:
2003 break;
2004 }
2005 }
2006
SX1276OnDio4Irq(void * context)2007 static void SX1276OnDio4Irq( void* context )
2008 {
2009 switch( SX1276.Settings.Modem )
2010 {
2011 case MODEM_FSK:
2012 {
2013 if( SX1276.Settings.FskPacketHandler.PreambleDetected == false )
2014 {
2015 SX1276.Settings.FskPacketHandler.PreambleDetected = true;
2016 }
2017 }
2018 break;
2019 case MODEM_LORA:
2020 break;
2021 default:
2022 break;
2023 }
2024 }
2025
