1/**
2  ******************************************************************************
3  * @file      startup_stm32l151xba.s
4  * @author    MCD Application Team
5  * @brief     STM32L151XBA Devices vector table for
6  *            Atollic toolchain.
7  *            This module performs:
8  *                - Set the initial SP
9  *                - Set the initial PC == Reset_Handler,
10  *                - Set the vector table entries with the exceptions ISR address
11  *                - Configure the clock system
12  *                - Branches to main in the C library (which eventually
13  *                  calls main()).
14  *            After Reset the Cortex-M3 processor is in Thread mode,
15  *            priority is Privileged, and the Stack is set to Main.
16  ******************************************************************************
17  *
18  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
19  *
20  * Redistribution and use in source and binary forms, with or without modification,
21  * are permitted provided that the following conditions are met:
22  *   1. Redistributions of source code must retain the above copyright notice,
23  *      this list of conditions and the following disclaimer.
24  *   2. Redistributions in binary form must reproduce the above copyright notice,
25  *      this list of conditions and the following disclaimer in the documentation
26  *      and/or other materials provided with the distribution.
27  *   3. Neither the name of STMicroelectronics nor the names of its contributors
28  *      may be used to endorse or promote products derived from this software
29  *      without specific prior written permission.
30  *
31  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
32  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
33  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
34  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
35  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
36  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
37  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
38  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
40  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41  *
42  ******************************************************************************
43  */
44
45  .syntax unified
46  .cpu cortex-m3
47  .fpu softvfp
48  .thumb
49
50.global g_pfnVectors
51.global Default_Handler
52
53/* start address for the initialization values of the .data section.
54defined in linker script */
55.word _sidata
56/* start address for the .data section. defined in linker script */
57.word _sdata
58/* end address for the .data section. defined in linker script */
59.word _edata
60/* start address for the .bss section. defined in linker script */
61.word _sbss
62/* end address for the .bss section. defined in linker script */
63.word _ebss
64
65.equ  BootRAM, 0xF108F85F
66/**
67 * @brief  This is the code that gets called when the processor first
68 *          starts execution following a reset event. Only the absolutely
69 *          necessary set is performed, after which the application
70 *          supplied main() routine is called.
71 * @param  None
72 * @retval : None
73*/
74
75  .section .text.Reset_Handler
76  .weak Reset_Handler
77  .type Reset_Handler, %function
78Reset_Handler:
79
80/* Copy the data segment initializers from flash to SRAM */
81  movs r1, #0
82  b LoopCopyDataInit
83
84CopyDataInit:
85  ldr r3, =_sidata
86  ldr r3, [r3, r1]
87  str r3, [r0, r1]
88  adds r1, r1, #4
89
90LoopCopyDataInit:
91  ldr r0, =_sdata
92  ldr r3, =_edata
93  adds r2, r0, r1
94  cmp r2, r3
95  bcc CopyDataInit
96  ldr r2, =_sbss
97  b LoopFillZerobss
98/* Zero fill the bss segment. */
99FillZerobss:
100  movs r3, #0
101  str r3, [r2], #4
102
103LoopFillZerobss:
104  ldr r3, = _ebss
105  cmp r2, r3
106  bcc FillZerobss
107
108/* Call the clock system intitialization function.*/
109    bl  SystemInit
110/* Call static constructors */
111    bl __libc_init_array
112/* Call the application's entry point.*/
113  bl main
114  bx lr
115.size Reset_Handler, .-Reset_Handler
116
117/**
118 * @brief  This is the code that gets called when the processor receives an
119 *         unexpected interrupt.  This simply enters an infinite loop, preserving
120 *         the system state for examination by a debugger.
121 *
122 * @param  None
123 * @retval : None
124*/
125    .section .text.Default_Handler,"ax",%progbits
126Default_Handler:
127Infinite_Loop:
128  b Infinite_Loop
129  .size Default_Handler, .-Default_Handler
130/******************************************************************************
131*
132* The minimal vector table for a Cortex M3.  Note that the proper constructs
133* must be placed on this to ensure that it ends up at physical address
134* 0x0000.0000.
135*
136******************************************************************************/
137   .section .isr_vector,"a",%progbits
138  .type g_pfnVectors, %object
139  .size g_pfnVectors, .-g_pfnVectors
140
141
142g_pfnVectors:
143  .word _estack
144  .word Reset_Handler
145  .word NMI_Handler
146  .word HardFault_Handler
147  .word MemManage_Handler
148  .word BusFault_Handler
149  .word UsageFault_Handler
150  .word 0
151  .word 0
152  .word 0
153  .word 0
154  .word SVC_Handler
155  .word DebugMon_Handler
156  .word 0
157  .word PendSV_Handler
158  .word SysTick_Handler
159  .word WWDG_IRQHandler
160  .word PVD_IRQHandler
161  .word TAMPER_STAMP_IRQHandler
162  .word RTC_WKUP_IRQHandler
163  .word FLASH_IRQHandler
164  .word RCC_IRQHandler
165  .word EXTI0_IRQHandler
166  .word EXTI1_IRQHandler
167  .word EXTI2_IRQHandler
168  .word EXTI3_IRQHandler
169  .word EXTI4_IRQHandler
170  .word DMA1_Channel1_IRQHandler
171  .word DMA1_Channel2_IRQHandler
172  .word DMA1_Channel3_IRQHandler
173  .word DMA1_Channel4_IRQHandler
174  .word DMA1_Channel5_IRQHandler
175  .word DMA1_Channel6_IRQHandler
176  .word DMA1_Channel7_IRQHandler
177  .word ADC1_IRQHandler
178  .word USB_HP_IRQHandler
179  .word USB_LP_IRQHandler
180  .word DAC_IRQHandler
181  .word COMP_IRQHandler
182  .word EXTI9_5_IRQHandler
183  .word 0
184  .word TIM9_IRQHandler
185  .word TIM10_IRQHandler
186  .word TIM11_IRQHandler
187  .word TIM2_IRQHandler
188  .word TIM3_IRQHandler
189  .word TIM4_IRQHandler
190  .word I2C1_EV_IRQHandler
191  .word I2C1_ER_IRQHandler
192  .word I2C2_EV_IRQHandler
193  .word I2C2_ER_IRQHandler
194  .word SPI1_IRQHandler
195  .word SPI2_IRQHandler
196  .word USART1_IRQHandler
197  .word USART2_IRQHandler
198  .word USART3_IRQHandler
199  .word EXTI15_10_IRQHandler
200  .word RTC_Alarm_IRQHandler
201  .word USB_FS_WKUP_IRQHandler
202  .word TIM6_IRQHandler
203  .word TIM7_IRQHandler
204  .word 0
205  .word 0
206  .word 0
207  .word 0
208  .word 0
209  .word 0
210  .word 0
211  .word 0
212  .word 0
213  .word 0
214  .word 0
215  .word 0
216  .word 0
217  .word 0
218  .word 0
219  .word 0
220  .word 0
221  .word BootRAM          /* @0x108. This is for boot in RAM mode for
222                            STM32L151XBA devices. */
223
224/*******************************************************************************
225*
226* Provide weak aliases for each Exception handler to the Default_Handler.
227* As they are weak aliases, any function with the same name will override
228* this definition.
229*
230*******************************************************************************/
231
232  .weak NMI_Handler
233  .thumb_set NMI_Handler,Default_Handler
234
235  .weak HardFault_Handler
236  .thumb_set HardFault_Handler,Default_Handler
237
238  .weak MemManage_Handler
239  .thumb_set MemManage_Handler,Default_Handler
240
241  .weak BusFault_Handler
242  .thumb_set BusFault_Handler,Default_Handler
243
244  .weak UsageFault_Handler
245  .thumb_set UsageFault_Handler,Default_Handler
246
247  .weak SVC_Handler
248  .thumb_set SVC_Handler,Default_Handler
249
250  .weak DebugMon_Handler
251  .thumb_set DebugMon_Handler,Default_Handler
252
253  .weak PendSV_Handler
254  .thumb_set PendSV_Handler,Default_Handler
255
256  .weak SysTick_Handler
257  .thumb_set SysTick_Handler,Default_Handler
258
259  .weak WWDG_IRQHandler
260  .thumb_set WWDG_IRQHandler,Default_Handler
261
262  .weak PVD_IRQHandler
263  .thumb_set PVD_IRQHandler,Default_Handler
264
265  .weak TAMPER_STAMP_IRQHandler
266  .thumb_set TAMPER_STAMP_IRQHandler,Default_Handler
267
268  .weak RTC_WKUP_IRQHandler
269  .thumb_set RTC_WKUP_IRQHandler,Default_Handler
270
271  .weak FLASH_IRQHandler
272  .thumb_set FLASH_IRQHandler,Default_Handler
273
274  .weak RCC_IRQHandler
275  .thumb_set RCC_IRQHandler,Default_Handler
276
277  .weak EXTI0_IRQHandler
278  .thumb_set EXTI0_IRQHandler,Default_Handler
279
280  .weak EXTI1_IRQHandler
281  .thumb_set EXTI1_IRQHandler,Default_Handler
282
283  .weak EXTI2_IRQHandler
284  .thumb_set EXTI2_IRQHandler,Default_Handler
285
286  .weak EXTI3_IRQHandler
287  .thumb_set EXTI3_IRQHandler,Default_Handler
288
289  .weak EXTI4_IRQHandler
290  .thumb_set EXTI4_IRQHandler,Default_Handler
291
292  .weak DMA1_Channel1_IRQHandler
293  .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
294
295  .weak DMA1_Channel2_IRQHandler
296  .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
297
298  .weak DMA1_Channel3_IRQHandler
299  .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
300
301  .weak DMA1_Channel4_IRQHandler
302  .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
303
304  .weak DMA1_Channel5_IRQHandler
305  .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
306
307  .weak DMA1_Channel6_IRQHandler
308  .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
309
310  .weak DMA1_Channel7_IRQHandler
311  .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
312
313  .weak ADC1_IRQHandler
314  .thumb_set ADC1_IRQHandler,Default_Handler
315
316  .weak USB_HP_IRQHandler
317  .thumb_set USB_HP_IRQHandler,Default_Handler
318
319  .weak USB_LP_IRQHandler
320  .thumb_set USB_LP_IRQHandler,Default_Handler
321
322  .weak DAC_IRQHandler
323  .thumb_set DAC_IRQHandler,Default_Handler
324
325  .weak COMP_IRQHandler
326  .thumb_set COMP_IRQHandler,Default_Handler
327
328  .weak EXTI9_5_IRQHandler
329  .thumb_set EXTI9_5_IRQHandler,Default_Handler
330
331  .weak TIM9_IRQHandler
332  .thumb_set TIM9_IRQHandler,Default_Handler
333
334  .weak TIM10_IRQHandler
335  .thumb_set TIM10_IRQHandler,Default_Handler
336
337  .weak TIM11_IRQHandler
338  .thumb_set TIM11_IRQHandler,Default_Handler
339
340  .weak TIM2_IRQHandler
341  .thumb_set TIM2_IRQHandler,Default_Handler
342
343  .weak TIM3_IRQHandler
344  .thumb_set TIM3_IRQHandler,Default_Handler
345
346  .weak TIM4_IRQHandler
347  .thumb_set TIM4_IRQHandler,Default_Handler
348
349  .weak I2C1_EV_IRQHandler
350  .thumb_set I2C1_EV_IRQHandler,Default_Handler
351
352  .weak I2C1_ER_IRQHandler
353  .thumb_set I2C1_ER_IRQHandler,Default_Handler
354
355  .weak I2C2_EV_IRQHandler
356  .thumb_set I2C2_EV_IRQHandler,Default_Handler
357
358  .weak I2C2_ER_IRQHandler
359  .thumb_set I2C2_ER_IRQHandler,Default_Handler
360
361  .weak SPI1_IRQHandler
362  .thumb_set SPI1_IRQHandler,Default_Handler
363
364  .weak SPI2_IRQHandler
365  .thumb_set SPI2_IRQHandler,Default_Handler
366
367  .weak USART1_IRQHandler
368  .thumb_set USART1_IRQHandler,Default_Handler
369
370  .weak USART2_IRQHandler
371  .thumb_set USART2_IRQHandler,Default_Handler
372
373  .weak USART3_IRQHandler
374  .thumb_set USART3_IRQHandler,Default_Handler
375
376  .weak EXTI15_10_IRQHandler
377  .thumb_set EXTI15_10_IRQHandler,Default_Handler
378
379  .weak RTC_Alarm_IRQHandler
380  .thumb_set RTC_Alarm_IRQHandler,Default_Handler
381
382  .weak USB_FS_WKUP_IRQHandler
383  .thumb_set USB_FS_WKUP_IRQHandler,Default_Handler
384
385  .weak TIM6_IRQHandler
386  .thumb_set TIM6_IRQHandler,Default_Handler
387
388  .weak TIM7_IRQHandler
389  .thumb_set TIM7_IRQHandler,Default_Handler
390
391/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
392
393