1 /** 2 * \file 3 * 4 * \brief SPI Master DMA related functionality declaration. 5 * 6 * Copyright (C) 2016 Atmel Corporation. All rights reserved. 7 * 8 * \asf_license_start 9 * 10 * \page License 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 18 * 2. Redistributions in binary form must reproduce the above copyright notice, 19 * this list of conditions and the following disclaimer in the documentation 20 * and/or other materials provided with the distribution. 21 * 22 * 3. The name of Atmel may not be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * 4. This software may only be redistributed and used in connection with an 26 * Atmel microcontroller product. 27 * 28 * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED 29 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 30 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE 31 * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 36 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 * 40 * \asf_license_stop 41 * 42 */ 43 44 #ifndef _HPL_SPI_M_DMA_H_INCLUDED 45 #define _HPL_SPI_M_DMA_H_INCLUDED 46 47 #include <hpl_spi.h> 48 #include <hpl_spi_dma.h> 49 50 /** 51 * \addtogroup hpl_spi HPL SPI 52 * 53 * 54 *@{ 55 */ 56 57 #ifdef __cplusplus 58 extern "C" { 59 #endif 60 61 /** Uses common SPI dma device driver. */ 62 #define _spi_m_dma_dev _spi_dma_dev 63 64 #define _spi_m_dma_dev_cb_type _spi_dma_dev_cb_type 65 66 /** 67 * \brief Initialize SPI for access with interrupts 68 * It will load default hardware configuration and software struct. 69 * \param[in, out] dev Pointer to the SPI device instance. 70 * \param[in] hw Pointer to the hardware base. 71 * \return Operation status. 72 * \retval ERR_INVALID_ARG Input parameter problem. 73 * \retval ERR_BUSY SPI hardware not ready (resetting). 74 * \retval ERR_DENIED SPI has been enabled. 75 * \retval 0 ERR_NONE is operation done successfully. 76 */ 77 int32_t _spi_m_dma_init(struct _spi_m_dma_dev *dev, void *const hw); 78 79 /** 80 * \brief Initialize SPI for access with interrupts 81 * Disable, reset the hardware and the software struct. 82 * \param[in, out] dev Pointer to the SPI device instance. 83 * \return Operation status. 84 * \retval 0 ERR_NONE is operation done successfully. 85 */ 86 int32_t _spi_m_dma_deinit(struct _spi_m_dma_dev *dev); 87 88 /** 89 * \brief Enable SPI for access with interrupts 90 * Enable the SPI and enable callback generation of receive and error 91 * interrupts. 92 * \param[in] dev Pointer to the SPI device instance. 93 * \return Operation status. 94 * \retval ERR_INVALID_ARG Input parameter problem. 95 * \retval ERR_BUSY SPI hardware not ready (resetting). 96 * \retval 0 ERR_NONE is operation done successfully. 97 */ 98 int32_t _spi_m_dma_enable(struct _spi_m_dma_dev *dev); 99 100 /** 101 * \brief Disable SPI for access without interrupts 102 * Disable SPI and interrupts. Deactivate all CS pins if works as master. 103 * \param[in] dev Pointer to the SPI device instance. 104 * \return Operation status. 105 * \retval 0 ERR_NONE is operation done successfully. 106 */ 107 int32_t _spi_m_dma_disable(struct _spi_m_dma_dev *dev); 108 109 /** 110 * \brief Set SPI transfer mode 111 * Set SPI transfer mode (\ref spi_transfer_mode), 112 * which controls clock polarity and clock phase. 113 * Mode 0: leading edge is rising edge, data sample on leading edge. 114 * Mode 1: leading edge is rising edge, data sample on trailing edge. 115 * Mode 2: leading edge is falling edge, data sample on leading edge. 116 * Mode 3: leading edge is falling edge, data sample on trailing edge. 117 * \param[in] dev Pointer to the SPI device instance. 118 * \param[in] mode The SPI transfer mode. 119 * \return Operation status. 120 * \retval ERR_BUSY SPI is not ready to accept new setting. 121 * \retval 0 ERR_NONE is operation done successfully. 122 */ 123 int32_t _spi_m_dma_set_mode(struct _spi_m_dma_dev *dev, const enum spi_transfer_mode mode); 124 125 /** 126 * \brief Set SPI baudrate 127 * \param[in] dev Pointer to the SPI device instance. 128 * \param[in] baud_val The SPI baudrate value, see \ref _spi_calc_baud_val() on 129 * how it's generated. 130 * \return Operation status. 131 * \retval ERR_BUSY SPI is not ready to accept new setting. 132 * \retval 0 Operation done successfully. 133 */ 134 int32_t _spi_m_dma_set_baudrate(struct _spi_m_dma_dev *dev, const uint32_t baud_val); 135 136 /** 137 * \brief Set SPI baudrate 138 * \param[in, out] dev Pointer to the SPI device instance. 139 * \param[in] char_size The character size, see \ref spi_char_size. 140 * \return Operation status. 141 * \retval ERR_INVALID_ARG The character size is not supported. 142 * \retval ERR_BUSY SPI is not ready to accept new setting. 143 * \retval 0 Operation done successfully. 144 */ 145 int32_t _spi_m_dma_set_char_size(struct _spi_m_dma_dev *dev, const enum spi_char_size char_size); 146 147 /** 148 * \brief Set SPI data order 149 * \param[in] dev Pointer to the SPI device instance. 150 * \param[in] dord SPI data order (LSB/MSB first). 151 * \return Operation status. 152 * \retval ERR_INVALID_ARG The character size is not supported. 153 * \retval ERR_BUSY SPI is not ready to accept new setting. 154 * \retval 0 Operation done successfully. 155 */ 156 int32_t _spi_m_dma_set_data_order(struct _spi_m_dma_dev *dev, const enum spi_data_order dord); 157 158 /** 159 * \brief Register the SPI device callback 160 * \param[in] dev Pointer to the SPI device instance. 161 * \param[in] cb_type The callback type. 162 * \param[in] func The callback function to register. NULL to disable callback. 163 * \return Always 0. 164 */ 165 void _spi_m_dma_register_callback(struct _spi_m_dma_dev *dev, enum _spi_dma_dev_cb_type, _spi_dma_cb_t func); 166 167 /** \brief Do SPI data transfer (TX & RX) with DMA 168 * Log the TX & RX buffers and transfer them in background. It never blocks. 169 * 170 * \param[in] dev Pointer to the SPI device instance. 171 * \param[in] txbuf Pointer to the transfer information (\ref spi_transfer). 172 * \param[out] rxbuf Pointer to the receiver information (\ref spi_receive). 173 * \param[in] length spi transfer data length. 174 * 175 * \return Operation status. 176 * \retval ERR_NONE Success. 177 * \retval ERR_BUSY Busy. 178 */ 179 int32_t _spi_m_dma_transfer(struct _spi_m_dma_dev *dev, uint8_t const *txbuf, uint8_t *const rxbuf, 180 const uint16_t length); 181 182 #ifdef __cplusplus 183 } 184 #endif 185 186 /**@}*/ 187 #endif /* ifndef _HPL_SPI_M_DMA_H_INCLUDED */ 188
