1/**
2  ******************************************************************************
3  * @file      startup_stm32l081xx.s
4  * @author    MCD Application Team
5  * @brief     STM32L081xx Devices vector table for Atollic TrueSTUDIO toolchain.
6  *            This module performs:
7  *                - Set the initial SP
8  *                - Set the initial PC == Reset_Handler,
9  *                - Set the vector table entries with the exceptions ISR address
10  *                - Branches to main in the C library (which eventually
11  *                  calls main()).
12  *            After Reset the Cortex-M0+ processor is in Thread mode,
13  *            priority is Privileged, and the Stack is set to Main.
14  ******************************************************************************
15  *
16  * Redistribution and use in source and binary forms, with or without modification,
17  * are permitted provided that the following conditions are met:
18  *   1. Redistributions of source code must retain the above copyright notice,
19  *      this list of conditions and the following disclaimer.
20  *   2. Redistributions in binary form must reproduce the above copyright notice,
21  *      this list of conditions and the following disclaimer in the documentation
22  *      and/or other materials provided with the distribution.
23  *   3. Neither the name of STMicroelectronics nor the names of its contributors
24  *      may be used to endorse or promote products derived from this software
25  *      without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
28  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
30  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
31  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
34  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
35  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37  *
38  ******************************************************************************
39  */
40
41  .syntax unified
42  .cpu cortex-m0plus
43  .fpu softvfp
44  .thumb
45
46.global  g_pfnVectors
47.global  Default_Handler
48
49/* start address for the initialization values of the .data section.
50defined in linker script */
51.word  _sidata
52/* start address for the .data section. defined in linker script */
53.word  _sdata
54/* end address for the .data section. defined in linker script */
55.word  _edata
56/* start address for the .bss section. defined in linker script */
57.word  _sbss
58/* end address for the .bss section. defined in linker script */
59.word  _ebss
60
61    .section  .text.Reset_Handler
62  .weak  Reset_Handler
63  .type  Reset_Handler, %function
64Reset_Handler:
65   ldr   r0, =_estack
66   mov   sp, r0          /* set stack pointer */
67
68/* Copy the data segment initializers from flash to SRAM */
69  movs  r1, #0
70  b  LoopCopyDataInit
71
72CopyDataInit:
73  ldr  r3, =_sidata
74  ldr  r3, [r3, r1]
75  str  r3, [r0, r1]
76  adds  r1, r1, #4
77
78LoopCopyDataInit:
79  ldr  r0, =_sdata
80  ldr  r3, =_edata
81  adds  r2, r0, r1
82  cmp  r2, r3
83  bcc  CopyDataInit
84  ldr  r2, =_sbss
85  b  LoopFillZerobss
86/* Zero fill the bss segment. */
87FillZerobss:
88  movs  r3, #0
89  str  r3, [r2]
90  adds r2, r2, #4
91
92
93LoopFillZerobss:
94  ldr  r3, = _ebss
95  cmp  r2, r3
96  bcc  FillZerobss
97
98/* Call the clock system intitialization function.*/
99  bl  SystemInit
100/* Call static constructors */
101    bl __libc_init_array
102/* Call the application's entry point.*/
103  bl  main
104
105LoopForever:
106    b LoopForever
107
108
109.size  Reset_Handler, .-Reset_Handler
110
111/**
112 * @brief  This is the code that gets called when the processor receives an
113 *         unexpected interrupt.  This simply enters an infinite loop, preserving
114 *         the system state for examination by a debugger.
115 *
116 * @param  None
117 * @retval : None
118*/
119    .section  .text.Default_Handler,"ax",%progbits
120Default_Handler:
121Infinite_Loop:
122  b  Infinite_Loop
123  .size  Default_Handler, .-Default_Handler
124/******************************************************************************
125*
126* The minimal vector table for a Cortex M0.  Note that the proper constructs
127* must be placed on this to ensure that it ends up at physical address
128* 0x0000.0000.
129*
130******************************************************************************/
131   .section  .isr_vector,"a",%progbits
132  .type  g_pfnVectors, %object
133  .size  g_pfnVectors, .-g_pfnVectors
134
135
136g_pfnVectors:
137  .word  _estack
138  .word  Reset_Handler
139  .word  NMI_Handler
140  .word  HardFault_Handler
141  .word  0
142  .word  0
143  .word  0
144  .word  0
145  .word  0
146  .word  0
147  .word  0
148  .word  SVC_Handler
149  .word  0
150  .word  0
151  .word  PendSV_Handler
152  .word  SysTick_Handler
153  .word     WWDG_IRQHandler                   /* Window WatchDog              */
154  .word     PVD_IRQHandler                    /* PVD through EXTI Line detection */
155  .word     RTC_IRQHandler                    /* RTC through the EXTI line     */
156  .word     FLASH_IRQHandler                  /* FLASH                        */
157  .word     RCC_IRQHandler                    /* RCC                          */
158  .word     EXTI0_1_IRQHandler                /* EXTI Line 0 and 1            */
159  .word     EXTI2_3_IRQHandler                /* EXTI Line 2 and 3            */
160  .word     EXTI4_15_IRQHandler               /* EXTI Line 4 to 15            */
161  .word     0                                 /* Reserved                     */
162  .word     DMA1_Channel1_IRQHandler          /* DMA1 Channel 1               */
163  .word     DMA1_Channel2_3_IRQHandler        /* DMA1 Channel 2 and Channel 3 */
164  .word     DMA1_Channel4_5_6_7_IRQHandler    /* DMA1 Channel 4, Channel 5, Channel 6 and Channel 7*/
165  .word     ADC1_COMP_IRQHandler              /* ADC1, COMP1 and COMP2        */
166  .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
167  .word     USART4_5_IRQHandler               /* USART4 and USART 5           */
168  .word     TIM2_IRQHandler                   /* TIM2                         */
169  .word     TIM3_IRQHandler                   /* TIM3                         */
170  .word     TIM6_IRQHandler                   /* TIM6                         */
171  .word     TIM7_IRQHandler 				          /* TIM7                         */
172  .word     0              					          /* Reserved                     */
173  .word     TIM21_IRQHandler                  /* TIM21                        */
174  .word     I2C3_IRQHandler                   /* I2C3                         */
175  .word     TIM22_IRQHandler                  /* TIM22                        */
176  .word     I2C1_IRQHandler                   /* I2C1                         */
177  .word     I2C2_IRQHandler                   /* I2C2                         */
178  .word     SPI1_IRQHandler                   /* SPI1                         */
179  .word     SPI2_IRQHandler                   /* SPI2                         */
180  .word     USART1_IRQHandler                 /* USART1                       */
181  .word     USART2_IRQHandler                 /* USART2                       */
182  .word     AES_LPUART1_IRQHandler            /* AES and LPUART1              */
183  .word     0                                 /* Reserved                     */
184  .word     0                                 /* Reserved                     */
185
186/*******************************************************************************
187*
188* Provide weak aliases for each Exception handler to the Default_Handler.
189* As they are weak aliases, any function with the same name will override
190* this definition.
191*
192*******************************************************************************/
193
194   .weak      NMI_Handler
195   .thumb_set NMI_Handler,Default_Handler
196
197   .weak      HardFault_Handler
198   .thumb_set HardFault_Handler,Default_Handler
199
200   .weak      SVC_Handler
201   .thumb_set SVC_Handler,Default_Handler
202
203   .weak      PendSV_Handler
204   .thumb_set PendSV_Handler,Default_Handler
205
206   .weak      SysTick_Handler
207   .thumb_set SysTick_Handler,Default_Handler
208
209   .weak      WWDG_IRQHandler
210   .thumb_set WWDG_IRQHandler,Default_Handler
211
212   .weak      PVD_IRQHandler
213   .thumb_set PVD_IRQHandler,Default_Handler
214
215   .weak      RTC_IRQHandler
216   .thumb_set RTC_IRQHandler,Default_Handler
217
218   .weak      FLASH_IRQHandler
219   .thumb_set FLASH_IRQHandler,Default_Handler
220
221   .weak      RCC_IRQHandler
222   .thumb_set RCC_IRQHandler,Default_Handler
223
224   .weak      EXTI0_1_IRQHandler
225   .thumb_set EXTI0_1_IRQHandler,Default_Handler
226
227   .weak      EXTI2_3_IRQHandler
228   .thumb_set EXTI2_3_IRQHandler,Default_Handler
229
230   .weak      EXTI4_15_IRQHandler
231   .thumb_set EXTI4_15_IRQHandler,Default_Handler
232
233   .weak      DMA1_Channel1_IRQHandler
234   .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
235
236   .weak      DMA1_Channel2_3_IRQHandler
237   .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler
238
239   .weak      DMA1_Channel4_5_6_7_IRQHandler
240   .thumb_set DMA1_Channel4_5_6_7_IRQHandler,Default_Handler
241
242   .weak      ADC1_COMP_IRQHandler
243   .thumb_set ADC1_COMP_IRQHandler,Default_Handler
244
245   .weak      LPTIM1_IRQHandler
246   .thumb_set LPTIM1_IRQHandler,Default_Handler
247
248   .weak      USART4_5_IRQHandler
249   .thumb_set USART4_5_IRQHandler,Default_Handler
250
251   .weak      TIM2_IRQHandler
252   .thumb_set TIM2_IRQHandler,Default_Handler
253
254   .weak      TIM3_IRQHandler
255   .thumb_set TIM3_IRQHandler,Default_Handler
256
257   .weak      TIM6_IRQHandler
258   .thumb_set TIM6_IRQHandler,Default_Handler
259
260   .weak      TIM7_IRQHandler
261   .thumb_set TIM7_IRQHandler,Default_Handler
262
263   .weak      TIM21_IRQHandler
264   .thumb_set TIM21_IRQHandler,Default_Handler
265
266   .weak      I2C3_IRQHandler
267   .thumb_set I2C3_IRQHandler,Default_Handler
268
269   .weak      TIM22_IRQHandler
270   .thumb_set TIM22_IRQHandler,Default_Handler
271
272   .weak      I2C1_IRQHandler
273   .thumb_set I2C1_IRQHandler,Default_Handler
274
275   .weak      I2C2_IRQHandler
276   .thumb_set I2C2_IRQHandler,Default_Handler
277
278   .weak      SPI1_IRQHandler
279   .thumb_set SPI1_IRQHandler,Default_Handler
280
281   .weak      SPI2_IRQHandler
282   .thumb_set SPI2_IRQHandler,Default_Handler
283
284   .weak      USART1_IRQHandler
285   .thumb_set USART1_IRQHandler,Default_Handler
286
287   .weak      USART2_IRQHandler
288   .thumb_set USART2_IRQHandler,Default_Handler
289
290   .weak      AES_LPUART1_IRQHandler
291   .thumb_set AES_LPUART1_IRQHandler,Default_Handler
292
293
294
295
296/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
297
298