1 /****************************************************************************** 2 * Filename: cc23x0r5.h 3 * 4 * Description: Collection of architecture definitions for CC23x0R5 devices 5 * 6 // ##### LICENSE HEADER ##### 7 * 8 ******************************************************************************/ 9 #ifndef __CC23X0R5_H__ 10 #define __CC23X0R5_H__ 11 12 /* IRQ numbers */ 13 typedef enum IRQn 14 { 15 NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ 16 HardFault_IRQn = -13, /* 3 Hard Fault Interrupt */ 17 SVCall_IRQn = -5, /* 11 SV Call Interrupt */ 18 PendSV_IRQn = -2, /* 14 Pend SV Interrupt */ 19 SysTick_IRQn = -1, /* 15 System Tick Interrupt */ 20 CPUIRQ0_IRQn = 0, /* 16 CPUIRQ0 configurable source */ 21 CPUIRQ1_IRQn = 1, /* 17 CPUIRQ1 configurable source */ 22 CPUIRQ2_IRQn = 2, /* 18 CPUIRQ2 configurable source */ 23 CPUIRQ3_IRQn = 3, /* 19 CPUIRQ3 configurable source */ 24 CPUIRQ4_IRQn = 4, /* 20 CPUIRQ4 configurable source */ 25 GPIO_COMB_IRQn = 5, /* 21 GPIO event interrupt */ 26 LRFD_IRQ0_IRQn = 6, /* 22 LRF interrupt 0 */ 27 LRFD_IRQ1_IRQn = 7, /* 23 LRF interrupt 1 */ 28 DMA_DONE_COMB_IRQn = 8, /* 24 uDMA done events */ 29 AES_COMB_IRQn = 9, /* 25 AES interrupt */ 30 SPI0_COMB_IRQn = 10, /* 26 SPI0 combined interrupt */ 31 UART0_COMB_IRQn = 11, /* 27 UART0 combined interrupt */ 32 I2C0_IRQ_IRQn = 12, /* 28 I2C0 combined interrupt */ 33 LGPT0_COMB_IRQn = 13, /* 29 LGPT0 interrupt */ 34 LGPT1_COMB_IRQn = 14, /* 30 LGPT1 interrupt */ 35 ADC_COMB_IRQn = 15, /* 31 ADC0 interrupt */ 36 CPUIRQ16_IRQn = 16, /* 32 CPUIRQ16 configurable source */ 37 LGPT2_COMB_IRQn = 17, /* 33 LGPT0 interrupt */ 38 LGPT3_COMB_IRQn = 18, /* 34 LGPT1 interrupt */ 39 } IRQn_Type; 40 41 /* Architecture-specific constants */ 42 #define __SAUREGION_PRESENT 0x0000U /* SAU present */ 43 #define __DSP_PRESENT 0x0000U /* DSP extension present */ 44 #define __Vendor_SysTickConfig 0x0000U /* Set to 1 if different SysTick Config is used */ 45 #define __MPU_PRESENT 0x0000U /* MPU present or not */ 46 #define __FPU_PRESENT 0x0000U /* FPU present or not */ 47 #define __VTOR_PRESENT 0x0001U /* VTOR present */ 48 #define __NVIC_PRIO_BITS 0x0002U /* 2 NVIC priority bits */ 49 50 #include "core/core_cm0plus.h" 51 52 #endif // #ifndef __CC23X0R5_H__ 53
