1 // SETTINGS FOR PHY BASED ON RADIO CONTROL LAYER (SOURCE FILE) 2 // 3 // 4 // CODE EXPORT INFORMATION 5 // This file is generated 6 // 7 // Tool name SmartRF Studio 8 8 // Tool version 0.6.0.327 INTERNAL 9 // Created 2024-05-28 13:53:16.066 10 // Computer swtools 11 // User - 12 // 13 // 14 // WORKSPACE INFORMATION 15 // 16 // Workspace file srf_cli.workspace 17 // Device CC2340R5 18 // Package QFN40 5x5 RKP 19 // Revision(s) B (2.0) 20 // SDK SimpleLink LPF3 SDK 8.11.00.09 21 // Board LP-EM-CC2340R5 22 // PHY ADC Noise 23 // PHY abbreviation adc_noise 24 // 25 // 26 // VALIDATION WARNINGS 27 // 28 // No warnings 29 30 #include "rcl_settings_adc_noise.h" 31 #include DeviceFamily_constructPath(rf_patches/lrf_rfe_binary_ble5.h) 32 33 34 // Configuration: Common 35 static const uint32_t LRF_commonRegConfig[] = 36 { 37 0x0000002C, // Segment length = 44 38 0x0000A002, // Data structure 32-bit region (start byte position = 0, count = 3) 39 (uint32_t) &LRF_swConfigAdcNoise, // LRF_swParam : swConfig 40 0x00000000, // LRF_swParam : txPowerTable 41 (uint32_t) &(fcfg->appTrims), // LRF_swParam : trimDef 42 0x00003003, // HW sparse region (address/value pairs, count = 4) 43 0x30800000, // LRFDRFE.MAGNTHRCFG 44 0x30880000, // LRFDRFE.RSSIOFFSET 45 0x31201820, // LRFDRFE.MISC0 46 0x31300C07, // LRFDRFE.PHEDISC 47 0x30A01002, // HW 16-bit region (start address = 0x30A0, count = 3) 48 0x1F40A246, // LRFDRFE.SPARE3 LRFDRFE.SPARE2 49 0x00000000, // - LRFDRFE.SPARE4 50 0x30B01002, // HW 16-bit region (start address = 0x30B0, count = 3) 51 0x0006000A, // LRFDRFE.IFAMPRFLDO LRFDRFE.LNA 52 0x00000000, // - LRFDRFE.PA0 53 0x30C40005, // HW zero region (start address = 0x30C4, count = 6) 54 0x30E4100C, // HW 16-bit region (start address = 0x30E4, count = 13) 55 0x00000200, // LRFDRFE.DCO LRFDRFE.ATSTREFH 56 0x00000008, // LRFDRFE.DIVLDO LRFDRFE.DIV 57 0x00000000, // LRFDRFE.DCOLDO0 LRFDRFE.TDCLDO 58 0x07060000, // LRFDRFE.PRE0 LRFDRFE.DCOLDO1 59 0x06050000, // LRFDRFE.PRE2 LRFDRFE.PRE1 60 0x40080603, // LRFDRFE.CAL0 LRFDRFE.PRE3 61 0x00007F00, // - LRFDRFE.CAL1 62 0x31381002, // HW 16-bit region (start address = 0x3138, count = 3) 63 0x047FDF7F, // LRFDRFE.PLLMON1 LRFDRFE.PLLMON0 64 0x00001804, // - LRFDRFE.MOD0 65 0x68046005, // RAM 32-bit region (start address = 0x6804, count = 6) 66 0x03000012, // RFE_COMMON_RAM.TDCCAL0 RFE_COMMON_RAM.SYNTHCTL 67 0x00100000, // RFE_COMMON_RAM.TDCCAL2 RFE_COMMON_RAM.TDCCAL1 68 0x569B0400, // RFE_COMMON_RAM.K1LSB RFE_COMMON_RAM.TDCPLL 69 0x012D010A, // RFE_COMMON_RAM.K2BL RFE_COMMON_RAM.K1MSB 70 0x132C0034, // RFE_COMMON_RAM.K3BL RFE_COMMON_RAM.K2AL 71 0x916F07AB, // RFE_COMMON_RAM.K5 RFE_COMMON_RAM.K3AL 72 0x68206005, // RAM 32-bit region (start address = 0x6820, count = 6) 73 0x00000000, // RFE_COMMON_RAM.RTRIMMIN RFE_COMMON_RAM.RTRIMOFF 74 0x48080008, // RFE_COMMON_RAM.DIVF RFE_COMMON_RAM.DIVI 75 0x00000000, // RFE_COMMON_RAM.DIVLDOF RFE_COMMON_RAM.DIVLDOI 76 0x00470014, // RFE_COMMON_RAM.LDOSETTLE RFE_COMMON_RAM.DIVLDOIOFF 77 0x0005002E, // RFE_COMMON_RAM.DCOSETTLE RFE_COMMON_RAM.CHRGSETTLE 78 0x0000FE00, // RFE_COMMON_RAM.IFAMPRFLDODEFAULT RFE_COMMON_RAM.IFAMPRFLDOTX 79 0x683E5003, // RAM 16-bit region (start address = 0x683E, count = 4) 80 0x00220050, // RFE_COMMON_RAM.SPARE0SHADOW RFE_COMMON_RAM.PHYRSSIOFFSET 81 0x00000045 // RFE_COMMON_RAM.AGCINFO RFE_COMMON_RAM.SPARE1SHADOW 82 }; 83 84 85 // LRF register configuration list 86 static const LRF_RegConfigList LRF_regConfigList = { 87 .numEntries = 1, 88 .entries = { 89 (LRF_ConfigWord*) LRF_commonRegConfig 90 } 91 }; 92 93 // LRF_SwConfig data structure 94 const LRF_SwConfig LRF_swConfigAdcNoise = { 95 .rxIntFrequency = 0, 96 .rxFrequencyOffset = 0, 97 .txFrequencyOffset = 0, 98 .modFrequencyDeviation = 0x00000000, 99 .txShape = (LRF_TxShape*) 0, 100 .bwIndex = 0x01, 101 .bwIndexDither = 0x01 102 }; 103 104 // LRF_Config data structure 105 const LRF_Config LRF_configAdcNoise = { 106 .pbeImage = (LRF_TOPsmImage*) 0, 107 .mceImage = (LRF_TOPsmImage*) 0, 108 .rfeImage = (const LRF_TOPsmImage*) LRF_RFE_binary_ble5, 109 .regConfigList = &LRF_regConfigList 110 }; 111
