1 /****************************************************************************** 2 * Filename: hw_aux_evctl_h 3 * Revised: $Date$ 4 * Revision: $Revision$ 5 * 6 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions are met: 11 * 12 * 1) Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2) Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may 20 * be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 ******************************************************************************/ 36 37 #ifndef __HW_AUX_EVCTL_H__ 38 #define __HW_AUX_EVCTL_H__ 39 40 //***************************************************************************** 41 // 42 // This section defines the register offsets of 43 // AUX_EVCTL component 44 // 45 //***************************************************************************** 46 // Event Status 0 47 #define AUX_EVCTL_O_EVSTAT0 0x00000000 48 49 // Event Status 1 50 #define AUX_EVCTL_O_EVSTAT1 0x00000004 51 52 // Event Status 2 53 #define AUX_EVCTL_O_EVSTAT2 0x00000008 54 55 // Event Status 3 56 #define AUX_EVCTL_O_EVSTAT3 0x0000000C 57 58 // Sensor Controller Engine Wait Event Configuration 0 59 #define AUX_EVCTL_O_SCEWEVCFG0 0x00000010 60 61 // Sensor Controller Engine Wait Event Configuration 1 62 #define AUX_EVCTL_O_SCEWEVCFG1 0x00000014 63 64 // Direct Memory Access Control 65 #define AUX_EVCTL_O_DMACTL 0x00000018 66 67 // Software Event Set 68 #define AUX_EVCTL_O_SWEVSET 0x00000020 69 70 // Events To AON Flags 71 #define AUX_EVCTL_O_EVTOAONFLAGS 0x00000024 72 73 // Events To AON Polarity 74 #define AUX_EVCTL_O_EVTOAONPOL 0x00000028 75 76 // Events To AON Clear 77 #define AUX_EVCTL_O_EVTOAONFLAGSCLR 0x0000002C 78 79 // Events to MCU Flags 80 #define AUX_EVCTL_O_EVTOMCUFLAGS 0x00000030 81 82 // Event To MCU Polarity 83 #define AUX_EVCTL_O_EVTOMCUPOL 0x00000034 84 85 // Events To MCU Flags Clear 86 #define AUX_EVCTL_O_EVTOMCUFLAGSCLR 0x00000038 87 88 // Combined Event To MCU Mask 89 #define AUX_EVCTL_O_COMBEVTOMCUMASK 0x0000003C 90 91 // Event Observation Configuration 92 #define AUX_EVCTL_O_EVOBSCFG 0x00000040 93 94 // Programmable Delay 95 #define AUX_EVCTL_O_PROGDLY 0x00000044 96 97 // Manual 98 #define AUX_EVCTL_O_MANUAL 0x00000048 99 100 // Event Status 0 Low 101 #define AUX_EVCTL_O_EVSTAT0L 0x0000004C 102 103 // Event Status 0 High 104 #define AUX_EVCTL_O_EVSTAT0H 0x00000050 105 106 // Event Status 1 Low 107 #define AUX_EVCTL_O_EVSTAT1L 0x00000054 108 109 // Event Status 1 High 110 #define AUX_EVCTL_O_EVSTAT1H 0x00000058 111 112 // Event Status 2 Low 113 #define AUX_EVCTL_O_EVSTAT2L 0x0000005C 114 115 // Event Status 2 High 116 #define AUX_EVCTL_O_EVSTAT2H 0x00000060 117 118 // Event Status 3 Low 119 #define AUX_EVCTL_O_EVSTAT3L 0x00000064 120 121 // Event Status 3 High 122 #define AUX_EVCTL_O_EVSTAT3H 0x00000068 123 124 //***************************************************************************** 125 // 126 // Register: AUX_EVCTL_O_EVSTAT0 127 // 128 //***************************************************************************** 129 // Field: [15] AUXIO15 130 // 131 // AUXIO15 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 7. 132 #define AUX_EVCTL_EVSTAT0_AUXIO15 0x00008000 133 #define AUX_EVCTL_EVSTAT0_AUXIO15_BITN 15 134 #define AUX_EVCTL_EVSTAT0_AUXIO15_M 0x00008000 135 #define AUX_EVCTL_EVSTAT0_AUXIO15_S 15 136 137 // Field: [14] AUXIO14 138 // 139 // AUXIO14 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 6. 140 #define AUX_EVCTL_EVSTAT0_AUXIO14 0x00004000 141 #define AUX_EVCTL_EVSTAT0_AUXIO14_BITN 14 142 #define AUX_EVCTL_EVSTAT0_AUXIO14_M 0x00004000 143 #define AUX_EVCTL_EVSTAT0_AUXIO14_S 14 144 145 // Field: [13] AUXIO13 146 // 147 // AUXIO13 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 5. 148 #define AUX_EVCTL_EVSTAT0_AUXIO13 0x00002000 149 #define AUX_EVCTL_EVSTAT0_AUXIO13_BITN 13 150 #define AUX_EVCTL_EVSTAT0_AUXIO13_M 0x00002000 151 #define AUX_EVCTL_EVSTAT0_AUXIO13_S 13 152 153 // Field: [12] AUXIO12 154 // 155 // AUXIO12 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 4. 156 #define AUX_EVCTL_EVSTAT0_AUXIO12 0x00001000 157 #define AUX_EVCTL_EVSTAT0_AUXIO12_BITN 12 158 #define AUX_EVCTL_EVSTAT0_AUXIO12_M 0x00001000 159 #define AUX_EVCTL_EVSTAT0_AUXIO12_S 12 160 161 // Field: [11] AUXIO11 162 // 163 // AUXIO11 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 3. 164 #define AUX_EVCTL_EVSTAT0_AUXIO11 0x00000800 165 #define AUX_EVCTL_EVSTAT0_AUXIO11_BITN 11 166 #define AUX_EVCTL_EVSTAT0_AUXIO11_M 0x00000800 167 #define AUX_EVCTL_EVSTAT0_AUXIO11_S 11 168 169 // Field: [10] AUXIO10 170 // 171 // AUXIO10 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 2. 172 #define AUX_EVCTL_EVSTAT0_AUXIO10 0x00000400 173 #define AUX_EVCTL_EVSTAT0_AUXIO10_BITN 10 174 #define AUX_EVCTL_EVSTAT0_AUXIO10_M 0x00000400 175 #define AUX_EVCTL_EVSTAT0_AUXIO10_S 10 176 177 // Field: [9] AUXIO9 178 // 179 // AUXIO9 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 1. 180 #define AUX_EVCTL_EVSTAT0_AUXIO9 0x00000200 181 #define AUX_EVCTL_EVSTAT0_AUXIO9_BITN 9 182 #define AUX_EVCTL_EVSTAT0_AUXIO9_M 0x00000200 183 #define AUX_EVCTL_EVSTAT0_AUXIO9_S 9 184 185 // Field: [8] AUXIO8 186 // 187 // AUXIO8 pin level, read value corresponds to AUX_AIODIO1:GPIODIN bit 0. 188 #define AUX_EVCTL_EVSTAT0_AUXIO8 0x00000100 189 #define AUX_EVCTL_EVSTAT0_AUXIO8_BITN 8 190 #define AUX_EVCTL_EVSTAT0_AUXIO8_M 0x00000100 191 #define AUX_EVCTL_EVSTAT0_AUXIO8_S 8 192 193 // Field: [7] AUXIO7 194 // 195 // AUXIO7 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 7. 196 #define AUX_EVCTL_EVSTAT0_AUXIO7 0x00000080 197 #define AUX_EVCTL_EVSTAT0_AUXIO7_BITN 7 198 #define AUX_EVCTL_EVSTAT0_AUXIO7_M 0x00000080 199 #define AUX_EVCTL_EVSTAT0_AUXIO7_S 7 200 201 // Field: [6] AUXIO6 202 // 203 // AUXIO6 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 6. 204 #define AUX_EVCTL_EVSTAT0_AUXIO6 0x00000040 205 #define AUX_EVCTL_EVSTAT0_AUXIO6_BITN 6 206 #define AUX_EVCTL_EVSTAT0_AUXIO6_M 0x00000040 207 #define AUX_EVCTL_EVSTAT0_AUXIO6_S 6 208 209 // Field: [5] AUXIO5 210 // 211 // AUXIO5 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 5. 212 #define AUX_EVCTL_EVSTAT0_AUXIO5 0x00000020 213 #define AUX_EVCTL_EVSTAT0_AUXIO5_BITN 5 214 #define AUX_EVCTL_EVSTAT0_AUXIO5_M 0x00000020 215 #define AUX_EVCTL_EVSTAT0_AUXIO5_S 5 216 217 // Field: [4] AUXIO4 218 // 219 // AUXIO4 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 4. 220 #define AUX_EVCTL_EVSTAT0_AUXIO4 0x00000010 221 #define AUX_EVCTL_EVSTAT0_AUXIO4_BITN 4 222 #define AUX_EVCTL_EVSTAT0_AUXIO4_M 0x00000010 223 #define AUX_EVCTL_EVSTAT0_AUXIO4_S 4 224 225 // Field: [3] AUXIO3 226 // 227 // AUXIO3 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 3. 228 #define AUX_EVCTL_EVSTAT0_AUXIO3 0x00000008 229 #define AUX_EVCTL_EVSTAT0_AUXIO3_BITN 3 230 #define AUX_EVCTL_EVSTAT0_AUXIO3_M 0x00000008 231 #define AUX_EVCTL_EVSTAT0_AUXIO3_S 3 232 233 // Field: [2] AUXIO2 234 // 235 // AUXIO2 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 2. 236 #define AUX_EVCTL_EVSTAT0_AUXIO2 0x00000004 237 #define AUX_EVCTL_EVSTAT0_AUXIO2_BITN 2 238 #define AUX_EVCTL_EVSTAT0_AUXIO2_M 0x00000004 239 #define AUX_EVCTL_EVSTAT0_AUXIO2_S 2 240 241 // Field: [1] AUXIO1 242 // 243 // AUXIO1 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 1. 244 #define AUX_EVCTL_EVSTAT0_AUXIO1 0x00000002 245 #define AUX_EVCTL_EVSTAT0_AUXIO1_BITN 1 246 #define AUX_EVCTL_EVSTAT0_AUXIO1_M 0x00000002 247 #define AUX_EVCTL_EVSTAT0_AUXIO1_S 1 248 249 // Field: [0] AUXIO0 250 // 251 // AUXIO0 pin level, read value corresponds to AUX_AIODIO0:GPIODIN bit 0. 252 #define AUX_EVCTL_EVSTAT0_AUXIO0 0x00000001 253 #define AUX_EVCTL_EVSTAT0_AUXIO0_BITN 0 254 #define AUX_EVCTL_EVSTAT0_AUXIO0_M 0x00000001 255 #define AUX_EVCTL_EVSTAT0_AUXIO0_S 0 256 257 //***************************************************************************** 258 // 259 // Register: AUX_EVCTL_O_EVSTAT1 260 // 261 //***************************************************************************** 262 // Field: [15] AUXIO31 263 // 264 // AUXIO31 pin level, read value corresponds to AUX_AIODIO3:GPIODIN bit 7. 265 #define AUX_EVCTL_EVSTAT1_AUXIO31 0x00008000 266 #define AUX_EVCTL_EVSTAT1_AUXIO31_BITN 15 267 #define AUX_EVCTL_EVSTAT1_AUXIO31_M 0x00008000 268 #define AUX_EVCTL_EVSTAT1_AUXIO31_S 15 269 270 // Field: [14] AUXIO30 271 // 272 // AUXIO30 pin level, read value corresponds to AUX_AIODIO3:GPIODIN bit 6. 273 #define AUX_EVCTL_EVSTAT1_AUXIO30 0x00004000 274 #define AUX_EVCTL_EVSTAT1_AUXIO30_BITN 14 275 #define AUX_EVCTL_EVSTAT1_AUXIO30_M 0x00004000 276 #define AUX_EVCTL_EVSTAT1_AUXIO30_S 14 277 278 // Field: [13] AUXIO29 279 // 280 // AUXIO29 pin level, read value corresponds to AUX_AIODIO3:GPIODIN bit 5. 281 #define AUX_EVCTL_EVSTAT1_AUXIO29 0x00002000 282 #define AUX_EVCTL_EVSTAT1_AUXIO29_BITN 13 283 #define AUX_EVCTL_EVSTAT1_AUXIO29_M 0x00002000 284 #define AUX_EVCTL_EVSTAT1_AUXIO29_S 13 285 286 // Field: [12] AUXIO28 287 // 288 // AUXIO28 pin level, read value corresponds to AUX_AIODIO3:GPIODIN bit 4. 289 #define AUX_EVCTL_EVSTAT1_AUXIO28 0x00001000 290 #define AUX_EVCTL_EVSTAT1_AUXIO28_BITN 12 291 #define AUX_EVCTL_EVSTAT1_AUXIO28_M 0x00001000 292 #define AUX_EVCTL_EVSTAT1_AUXIO28_S 12 293 294 // Field: [11] AUXIO27 295 // 296 // AUXIO27 pin level, read value corresponds to AUX_AIODIO3:GPIODIN bit 3. 297 #define AUX_EVCTL_EVSTAT1_AUXIO27 0x00000800 298 #define AUX_EVCTL_EVSTAT1_AUXIO27_BITN 11 299 #define AUX_EVCTL_EVSTAT1_AUXIO27_M 0x00000800 300 #define AUX_EVCTL_EVSTAT1_AUXIO27_S 11 301 302 // Field: [10] AUXIO26 303 // 304 // AUXIO26 pin level, read value corresponds to AUX_AIODIO3:GPIODIN bit 2. 305 #define AUX_EVCTL_EVSTAT1_AUXIO26 0x00000400 306 #define AUX_EVCTL_EVSTAT1_AUXIO26_BITN 10 307 #define AUX_EVCTL_EVSTAT1_AUXIO26_M 0x00000400 308 #define AUX_EVCTL_EVSTAT1_AUXIO26_S 10 309 310 // Field: [9] AUXIO25 311 // 312 // AUXIO25 pin level, read value corresponds to AUX_AIODIO3:GPIODIN bit 1. 313 #define AUX_EVCTL_EVSTAT1_AUXIO25 0x00000200 314 #define AUX_EVCTL_EVSTAT1_AUXIO25_BITN 9 315 #define AUX_EVCTL_EVSTAT1_AUXIO25_M 0x00000200 316 #define AUX_EVCTL_EVSTAT1_AUXIO25_S 9 317 318 // Field: [8] AUXIO24 319 // 320 // AUXIO24 pin level, read value corresponds to AUX_AIODIO3:GPIODIN bit 0. 321 #define AUX_EVCTL_EVSTAT1_AUXIO24 0x00000100 322 #define AUX_EVCTL_EVSTAT1_AUXIO24_BITN 8 323 #define AUX_EVCTL_EVSTAT1_AUXIO24_M 0x00000100 324 #define AUX_EVCTL_EVSTAT1_AUXIO24_S 8 325 326 // Field: [7] AUXIO23 327 // 328 // AUXIO23 pin level, read value corresponds to AUX_AIODIO2:GPIODIN bit 7. 329 #define AUX_EVCTL_EVSTAT1_AUXIO23 0x00000080 330 #define AUX_EVCTL_EVSTAT1_AUXIO23_BITN 7 331 #define AUX_EVCTL_EVSTAT1_AUXIO23_M 0x00000080 332 #define AUX_EVCTL_EVSTAT1_AUXIO23_S 7 333 334 // Field: [6] AUXIO22 335 // 336 // AUXIO22 pin level, read value corresponds to AUX_AIODIO2:GPIODIN bit 6. 337 #define AUX_EVCTL_EVSTAT1_AUXIO22 0x00000040 338 #define AUX_EVCTL_EVSTAT1_AUXIO22_BITN 6 339 #define AUX_EVCTL_EVSTAT1_AUXIO22_M 0x00000040 340 #define AUX_EVCTL_EVSTAT1_AUXIO22_S 6 341 342 // Field: [5] AUXIO21 343 // 344 // AUXIO21 pin level, read value corresponds to AUX_AIODIO2:GPIODIN bit 5. 345 #define AUX_EVCTL_EVSTAT1_AUXIO21 0x00000020 346 #define AUX_EVCTL_EVSTAT1_AUXIO21_BITN 5 347 #define AUX_EVCTL_EVSTAT1_AUXIO21_M 0x00000020 348 #define AUX_EVCTL_EVSTAT1_AUXIO21_S 5 349 350 // Field: [4] AUXIO20 351 // 352 // AUXIO20 pin level, read value corresponds to AUX_AIODIO2:GPIODIN bit 4. 353 #define AUX_EVCTL_EVSTAT1_AUXIO20 0x00000010 354 #define AUX_EVCTL_EVSTAT1_AUXIO20_BITN 4 355 #define AUX_EVCTL_EVSTAT1_AUXIO20_M 0x00000010 356 #define AUX_EVCTL_EVSTAT1_AUXIO20_S 4 357 358 // Field: [3] AUXIO19 359 // 360 // AUXIO19 pin level, read value corresponds to AUX_AIODIO2:GPIODIN bit 3. 361 #define AUX_EVCTL_EVSTAT1_AUXIO19 0x00000008 362 #define AUX_EVCTL_EVSTAT1_AUXIO19_BITN 3 363 #define AUX_EVCTL_EVSTAT1_AUXIO19_M 0x00000008 364 #define AUX_EVCTL_EVSTAT1_AUXIO19_S 3 365 366 // Field: [2] AUXIO18 367 // 368 // AUXIO18 pin level, read value corresponds to AUX_AIODIO2:GPIODIN bit 2. 369 #define AUX_EVCTL_EVSTAT1_AUXIO18 0x00000004 370 #define AUX_EVCTL_EVSTAT1_AUXIO18_BITN 2 371 #define AUX_EVCTL_EVSTAT1_AUXIO18_M 0x00000004 372 #define AUX_EVCTL_EVSTAT1_AUXIO18_S 2 373 374 // Field: [1] AUXIO17 375 // 376 // AUXIO17 pin level, read value corresponds to AUX_AIODIO2:GPIODIN bit 1. 377 #define AUX_EVCTL_EVSTAT1_AUXIO17 0x00000002 378 #define AUX_EVCTL_EVSTAT1_AUXIO17_BITN 1 379 #define AUX_EVCTL_EVSTAT1_AUXIO17_M 0x00000002 380 #define AUX_EVCTL_EVSTAT1_AUXIO17_S 1 381 382 // Field: [0] AUXIO16 383 // 384 // AUXIO16 pin level, read value corresponds to AUX_AIODIO2:GPIODIN bit 0. 385 #define AUX_EVCTL_EVSTAT1_AUXIO16 0x00000001 386 #define AUX_EVCTL_EVSTAT1_AUXIO16_BITN 0 387 #define AUX_EVCTL_EVSTAT1_AUXIO16_M 0x00000001 388 #define AUX_EVCTL_EVSTAT1_AUXIO16_S 0 389 390 //***************************************************************************** 391 // 392 // Register: AUX_EVCTL_O_EVSTAT2 393 // 394 //***************************************************************************** 395 // Field: [15] AUX_COMPB 396 // 397 // Comparator B output. 398 // Configuration of AUX_SYSIF:EVSYNCRATE.AUX_COMPB_SYNC_RATE sets the 399 // synchronization rate for this event. 400 #define AUX_EVCTL_EVSTAT2_AUX_COMPB 0x00008000 401 #define AUX_EVCTL_EVSTAT2_AUX_COMPB_BITN 15 402 #define AUX_EVCTL_EVSTAT2_AUX_COMPB_M 0x00008000 403 #define AUX_EVCTL_EVSTAT2_AUX_COMPB_S 15 404 405 // Field: [14] AUX_COMPA 406 // 407 // Comparator A output. 408 // Configuration of AUX_SYSIF:EVSYNCRATE.AUX_COMPA_SYNC_RATE sets the 409 // synchronization rate for this event. 410 #define AUX_EVCTL_EVSTAT2_AUX_COMPA 0x00004000 411 #define AUX_EVCTL_EVSTAT2_AUX_COMPA_BITN 14 412 #define AUX_EVCTL_EVSTAT2_AUX_COMPA_M 0x00004000 413 #define AUX_EVCTL_EVSTAT2_AUX_COMPA_S 14 414 415 // Field: [13] MCU_OBSMUX1 416 // 417 // Observation input 1 from IOC. 418 // This event is configured by IOC:OBSAUXOUTPUT.SEL1. 419 #define AUX_EVCTL_EVSTAT2_MCU_OBSMUX1 0x00002000 420 #define AUX_EVCTL_EVSTAT2_MCU_OBSMUX1_BITN 13 421 #define AUX_EVCTL_EVSTAT2_MCU_OBSMUX1_M 0x00002000 422 #define AUX_EVCTL_EVSTAT2_MCU_OBSMUX1_S 13 423 424 // Field: [12] MCU_OBSMUX0 425 // 426 // Observation input 0 from IOC. 427 // This event is configured by IOC:OBSAUXOUTPUT.SEL0 and can be overridden by 428 // IOC:OBSAUXOUTPUT.SEL_MISC. 429 #define AUX_EVCTL_EVSTAT2_MCU_OBSMUX0 0x00001000 430 #define AUX_EVCTL_EVSTAT2_MCU_OBSMUX0_BITN 12 431 #define AUX_EVCTL_EVSTAT2_MCU_OBSMUX0_M 0x00001000 432 #define AUX_EVCTL_EVSTAT2_MCU_OBSMUX0_S 12 433 434 // Field: [11] MCU_EV 435 // 436 // Event from EVENT configured by EVENT:AUXSEL0. 437 #define AUX_EVCTL_EVSTAT2_MCU_EV 0x00000800 438 #define AUX_EVCTL_EVSTAT2_MCU_EV_BITN 11 439 #define AUX_EVCTL_EVSTAT2_MCU_EV_M 0x00000800 440 #define AUX_EVCTL_EVSTAT2_MCU_EV_S 11 441 442 // Field: [10] ACLK_REF 443 // 444 // TDC reference clock. 445 // It is configured by DDI_0_OSC:CTL0.ACLK_REF_SRC_SEL and enabled by 446 // AUX_SYSIF:TDCREFCLKCTL.REQ. 447 #define AUX_EVCTL_EVSTAT2_ACLK_REF 0x00000400 448 #define AUX_EVCTL_EVSTAT2_ACLK_REF_BITN 10 449 #define AUX_EVCTL_EVSTAT2_ACLK_REF_M 0x00000400 450 #define AUX_EVCTL_EVSTAT2_ACLK_REF_S 10 451 452 // Field: [9] VDDR_RECHARGE 453 // 454 // Event is high during VDDR recharge. 455 #define AUX_EVCTL_EVSTAT2_VDDR_RECHARGE 0x00000200 456 #define AUX_EVCTL_EVSTAT2_VDDR_RECHARGE_BITN 9 457 #define AUX_EVCTL_EVSTAT2_VDDR_RECHARGE_M 0x00000200 458 #define AUX_EVCTL_EVSTAT2_VDDR_RECHARGE_S 9 459 460 // Field: [8] MCU_ACTIVE 461 // 462 // Event is high while system(MCU, AUX, or JTAG domains) is active or 463 // transitions to active (GLDO or DCDC power supply state). Event is not high 464 // during VDDR recharge. 465 #define AUX_EVCTL_EVSTAT2_MCU_ACTIVE 0x00000100 466 #define AUX_EVCTL_EVSTAT2_MCU_ACTIVE_BITN 8 467 #define AUX_EVCTL_EVSTAT2_MCU_ACTIVE_M 0x00000100 468 #define AUX_EVCTL_EVSTAT2_MCU_ACTIVE_S 8 469 470 // Field: [7] PWR_DWN 471 // 472 // Event is high while system(MCU, AUX, or JTAG domains) is in powerdown (uLDO 473 // power supply). 474 #define AUX_EVCTL_EVSTAT2_PWR_DWN 0x00000080 475 #define AUX_EVCTL_EVSTAT2_PWR_DWN_BITN 7 476 #define AUX_EVCTL_EVSTAT2_PWR_DWN_M 0x00000080 477 #define AUX_EVCTL_EVSTAT2_PWR_DWN_S 7 478 479 // Field: [6] SCLK_LF 480 // 481 // SCLK_LF clock 482 #define AUX_EVCTL_EVSTAT2_SCLK_LF 0x00000040 483 #define AUX_EVCTL_EVSTAT2_SCLK_LF_BITN 6 484 #define AUX_EVCTL_EVSTAT2_SCLK_LF_M 0x00000040 485 #define AUX_EVCTL_EVSTAT2_SCLK_LF_S 6 486 487 // Field: [5] AON_BATMON_TEMP_UPD 488 // 489 // Event is high for two SCLK_MF clock periods when there is an update of 490 // AON_BATMON:TEMP. 491 #define AUX_EVCTL_EVSTAT2_AON_BATMON_TEMP_UPD 0x00000020 492 #define AUX_EVCTL_EVSTAT2_AON_BATMON_TEMP_UPD_BITN 5 493 #define AUX_EVCTL_EVSTAT2_AON_BATMON_TEMP_UPD_M 0x00000020 494 #define AUX_EVCTL_EVSTAT2_AON_BATMON_TEMP_UPD_S 5 495 496 // Field: [4] AON_BATMON_BAT_UPD 497 // 498 // Event is high for two SCLK_MF clock periods when there is an update of 499 // AON_BATMON:BAT. 500 #define AUX_EVCTL_EVSTAT2_AON_BATMON_BAT_UPD 0x00000010 501 #define AUX_EVCTL_EVSTAT2_AON_BATMON_BAT_UPD_BITN 4 502 #define AUX_EVCTL_EVSTAT2_AON_BATMON_BAT_UPD_M 0x00000010 503 #define AUX_EVCTL_EVSTAT2_AON_BATMON_BAT_UPD_S 4 504 505 // Field: [3] AON_RTC_4KHZ 506 // 507 // AON_RTC:SUBSEC.VALUE bit 19. 508 // AON_RTC:CTL.RTC_4KHZ_EN enables this event. 509 #define AUX_EVCTL_EVSTAT2_AON_RTC_4KHZ 0x00000008 510 #define AUX_EVCTL_EVSTAT2_AON_RTC_4KHZ_BITN 3 511 #define AUX_EVCTL_EVSTAT2_AON_RTC_4KHZ_M 0x00000008 512 #define AUX_EVCTL_EVSTAT2_AON_RTC_4KHZ_S 3 513 514 // Field: [2] AON_RTC_CH2_DLY 515 // 516 // AON_RTC:EVFLAGS.CH2 delayed by AON_RTC:CTL.EV_DELAY configuration. 517 #define AUX_EVCTL_EVSTAT2_AON_RTC_CH2_DLY 0x00000004 518 #define AUX_EVCTL_EVSTAT2_AON_RTC_CH2_DLY_BITN 2 519 #define AUX_EVCTL_EVSTAT2_AON_RTC_CH2_DLY_M 0x00000004 520 #define AUX_EVCTL_EVSTAT2_AON_RTC_CH2_DLY_S 2 521 522 // Field: [1] AON_RTC_CH2 523 // 524 // AON_RTC:EVFLAGS.CH2. 525 #define AUX_EVCTL_EVSTAT2_AON_RTC_CH2 0x00000002 526 #define AUX_EVCTL_EVSTAT2_AON_RTC_CH2_BITN 1 527 #define AUX_EVCTL_EVSTAT2_AON_RTC_CH2_M 0x00000002 528 #define AUX_EVCTL_EVSTAT2_AON_RTC_CH2_S 1 529 530 // Field: [0] MANUAL_EV 531 // 532 // Programmable event. See MANUAL for description. 533 #define AUX_EVCTL_EVSTAT2_MANUAL_EV 0x00000001 534 #define AUX_EVCTL_EVSTAT2_MANUAL_EV_BITN 0 535 #define AUX_EVCTL_EVSTAT2_MANUAL_EV_M 0x00000001 536 #define AUX_EVCTL_EVSTAT2_MANUAL_EV_S 0 537 538 //***************************************************************************** 539 // 540 // Register: AUX_EVCTL_O_EVSTAT3 541 // 542 //***************************************************************************** 543 // Field: [15] AUX_TIMER2_CLKSWITCH_RDY 544 // 545 // AUX_SYSIF:TIMER2CLKSWITCH.RDY 546 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_CLKSWITCH_RDY 0x00008000 547 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_CLKSWITCH_RDY_BITN 15 548 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_CLKSWITCH_RDY_M 0x00008000 549 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_CLKSWITCH_RDY_S 15 550 551 // Field: [14] AUX_DAC_HOLD_ACTIVE 552 // 553 // AUX_ANAIF:DACSTAT.HOLD_ACTIVE 554 #define AUX_EVCTL_EVSTAT3_AUX_DAC_HOLD_ACTIVE 0x00004000 555 #define AUX_EVCTL_EVSTAT3_AUX_DAC_HOLD_ACTIVE_BITN 14 556 #define AUX_EVCTL_EVSTAT3_AUX_DAC_HOLD_ACTIVE_M 0x00004000 557 #define AUX_EVCTL_EVSTAT3_AUX_DAC_HOLD_ACTIVE_S 14 558 559 // Field: [13] AUX_SMPH_AUTOTAKE_DONE 560 // 561 // See AUX_SMPH:AUTOTAKE.SMPH_ID for description. 562 #define AUX_EVCTL_EVSTAT3_AUX_SMPH_AUTOTAKE_DONE 0x00002000 563 #define AUX_EVCTL_EVSTAT3_AUX_SMPH_AUTOTAKE_DONE_BITN 13 564 #define AUX_EVCTL_EVSTAT3_AUX_SMPH_AUTOTAKE_DONE_M 0x00002000 565 #define AUX_EVCTL_EVSTAT3_AUX_SMPH_AUTOTAKE_DONE_S 13 566 567 // Field: [12] AUX_ADC_FIFO_NOT_EMPTY 568 // 569 // AUX_ANAIF:ADCFIFOSTAT.EMPTY negated 570 #define AUX_EVCTL_EVSTAT3_AUX_ADC_FIFO_NOT_EMPTY 0x00001000 571 #define AUX_EVCTL_EVSTAT3_AUX_ADC_FIFO_NOT_EMPTY_BITN 12 572 #define AUX_EVCTL_EVSTAT3_AUX_ADC_FIFO_NOT_EMPTY_M 0x00001000 573 #define AUX_EVCTL_EVSTAT3_AUX_ADC_FIFO_NOT_EMPTY_S 12 574 575 // Field: [11] AUX_ADC_FIFO_ALMOST_FULL 576 // 577 // AUX_ANAIF:ADCFIFOSTAT.ALMOST_FULL 578 #define AUX_EVCTL_EVSTAT3_AUX_ADC_FIFO_ALMOST_FULL 0x00000800 579 #define AUX_EVCTL_EVSTAT3_AUX_ADC_FIFO_ALMOST_FULL_BITN 11 580 #define AUX_EVCTL_EVSTAT3_AUX_ADC_FIFO_ALMOST_FULL_M 0x00000800 581 #define AUX_EVCTL_EVSTAT3_AUX_ADC_FIFO_ALMOST_FULL_S 11 582 583 // Field: [10] AUX_ADC_IRQ 584 // 585 // The logical function for this event is configurable. 586 // 587 // When DMACTL.EN = 1 : 588 // Event = UDMA0 Channel 7 done event OR 589 // AUX_ANAIF:ADCFIFOSTAT.OVERFLOW OR AUX_ANAIF:ADCFIFOSTAT.UNDERFLOW 590 // 591 // When DMACTL.EN = 0 : 592 // Event = (NOT AUX_ANAIF:ADCFIFOSTAT.EMPTY) OR 593 // AUX_ANAIF:ADCFIFOSTAT.OVERFLOW OR AUX_ANAIF:ADCFIFOSTAT.UNDERFLOW 594 // 595 // Bit 7 in UDMA0:DONEMASK must be 0. 596 #define AUX_EVCTL_EVSTAT3_AUX_ADC_IRQ 0x00000400 597 #define AUX_EVCTL_EVSTAT3_AUX_ADC_IRQ_BITN 10 598 #define AUX_EVCTL_EVSTAT3_AUX_ADC_IRQ_M 0x00000400 599 #define AUX_EVCTL_EVSTAT3_AUX_ADC_IRQ_S 10 600 601 // Field: [9] AUX_ADC_DONE 602 // 603 // AUX_ANAIF ADC conversion done event. 604 // Event is synchronized at AUX bus rate. 605 #define AUX_EVCTL_EVSTAT3_AUX_ADC_DONE 0x00000200 606 #define AUX_EVCTL_EVSTAT3_AUX_ADC_DONE_BITN 9 607 #define AUX_EVCTL_EVSTAT3_AUX_ADC_DONE_M 0x00000200 608 #define AUX_EVCTL_EVSTAT3_AUX_ADC_DONE_S 9 609 610 // Field: [8] AUX_ISRC_RESET_N 611 // 612 // AUX_ANAIF:ISRCCTL.RESET_N 613 #define AUX_EVCTL_EVSTAT3_AUX_ISRC_RESET_N 0x00000100 614 #define AUX_EVCTL_EVSTAT3_AUX_ISRC_RESET_N_BITN 8 615 #define AUX_EVCTL_EVSTAT3_AUX_ISRC_RESET_N_M 0x00000100 616 #define AUX_EVCTL_EVSTAT3_AUX_ISRC_RESET_N_S 8 617 618 // Field: [7] AUX_TDC_DONE 619 // 620 // AUX_TDC:STAT.DONE 621 #define AUX_EVCTL_EVSTAT3_AUX_TDC_DONE 0x00000080 622 #define AUX_EVCTL_EVSTAT3_AUX_TDC_DONE_BITN 7 623 #define AUX_EVCTL_EVSTAT3_AUX_TDC_DONE_M 0x00000080 624 #define AUX_EVCTL_EVSTAT3_AUX_TDC_DONE_S 7 625 626 // Field: [6] AUX_TIMER0_EV 627 // 628 // AUX_TIMER0_EV event, see AUX_TIMER01:T0TARGET for description. 629 #define AUX_EVCTL_EVSTAT3_AUX_TIMER0_EV 0x00000040 630 #define AUX_EVCTL_EVSTAT3_AUX_TIMER0_EV_BITN 6 631 #define AUX_EVCTL_EVSTAT3_AUX_TIMER0_EV_M 0x00000040 632 #define AUX_EVCTL_EVSTAT3_AUX_TIMER0_EV_S 6 633 634 // Field: [5] AUX_TIMER1_EV 635 // 636 // AUX_TIMER1_EV event, see AUX_TIMER01:T1TARGET for description. 637 #define AUX_EVCTL_EVSTAT3_AUX_TIMER1_EV 0x00000020 638 #define AUX_EVCTL_EVSTAT3_AUX_TIMER1_EV_BITN 5 639 #define AUX_EVCTL_EVSTAT3_AUX_TIMER1_EV_M 0x00000020 640 #define AUX_EVCTL_EVSTAT3_AUX_TIMER1_EV_S 5 641 642 // Field: [4] AUX_TIMER2_PULSE 643 // 644 // AUX_TIMER2 pulse event. 645 // Configuration of AUX_SYSIF:EVSYNCRATE.AUX_TIMER2_SYNC_RATE sets the 646 // synchronization rate for this event. 647 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_PULSE 0x00000010 648 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_PULSE_BITN 4 649 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_PULSE_M 0x00000010 650 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_PULSE_S 4 651 652 // Field: [3] AUX_TIMER2_EV3 653 // 654 // AUX_TIMER2 event output 3. 655 // Configuration of AUX_SYSIF:EVSYNCRATE.AUX_TIMER2_SYNC_RATE sets the 656 // synchronization rate for this event. 657 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV3 0x00000008 658 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV3_BITN 3 659 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV3_M 0x00000008 660 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV3_S 3 661 662 // Field: [2] AUX_TIMER2_EV2 663 // 664 // AUX_TIMER2 event output 2. 665 // Configuration of AUX_SYSIF:EVSYNCRATE.AUX_TIMER2_SYNC_RATE sets the 666 // synchronization rate for this event. 667 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV2 0x00000004 668 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV2_BITN 2 669 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV2_M 0x00000004 670 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV2_S 2 671 672 // Field: [1] AUX_TIMER2_EV1 673 // 674 // AUX_TIMER2 event output 1. 675 // Configuration of AUX_SYSIF:EVSYNCRATE.AUX_TIMER2_SYNC_RATE sets the 676 // synchronization rate for this event. 677 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV1 0x00000002 678 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV1_BITN 1 679 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV1_M 0x00000002 680 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV1_S 1 681 682 // Field: [0] AUX_TIMER2_EV0 683 // 684 // AUX_TIMER2 event output 0. 685 // Configuration of AUX_SYSIF:EVSYNCRATE.AUX_TIMER2_SYNC_RATE sets the 686 // synchronization rate for this event. 687 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV0 0x00000001 688 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV0_BITN 0 689 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV0_M 0x00000001 690 #define AUX_EVCTL_EVSTAT3_AUX_TIMER2_EV0_S 0 691 692 //***************************************************************************** 693 // 694 // Register: AUX_EVCTL_O_SCEWEVCFG0 695 // 696 //***************************************************************************** 697 // Field: [6] COMB_EV_EN 698 // 699 // Event combination control: 700 // 701 // 0: Disable event combination. 702 // 1: Enable event combination. 703 #define AUX_EVCTL_SCEWEVCFG0_COMB_EV_EN 0x00000040 704 #define AUX_EVCTL_SCEWEVCFG0_COMB_EV_EN_BITN 6 705 #define AUX_EVCTL_SCEWEVCFG0_COMB_EV_EN_M 0x00000040 706 #define AUX_EVCTL_SCEWEVCFG0_COMB_EV_EN_S 6 707 708 // Field: [5:0] EV0_SEL 709 // 710 // Select the event source from the synchronous event bus to be used in event 711 // equation. 712 // ENUMs: 713 // AUX_TIMER2_CLKSWITCH_RDY EVSTAT3.AUX_TIMER2_CLKSWITCH_RDY 714 // AUX_DAC_HOLD_ACTIVE EVSTAT3.AUX_DAC_HOLD_ACTIVE 715 // AUX_SMPH_AUTOTAKE_DONE EVSTAT3.AUX_SMPH_AUTOTAKE_DONE 716 // AUX_ADC_FIFO_NOT_EMPTY EVSTAT3.AUX_ADC_FIFO_NOT_EMPTY 717 // AUX_ADC_FIFO_ALMOST_FULL EVSTAT3.AUX_ADC_FIFO_ALMOST_FULL 718 // AUX_ADC_IRQ EVSTAT3.AUX_ADC_IRQ 719 // AUX_ADC_DONE EVSTAT3.AUX_ADC_DONE 720 // AUX_ISRC_RESET_N EVSTAT3.AUX_ISRC_RESET_N 721 // AUX_TDC_DONE EVSTAT3.AUX_TDC_DONE 722 // AUX_TIMER0_EV EVSTAT3.AUX_TIMER0_EV 723 // AUX_TIMER1_EV EVSTAT3.AUX_TIMER1_EV 724 // AUX_TIMER2_PULSE EVSTAT3.AUX_TIMER2_PULSE 725 // AUX_TIMER2_EV3 EVSTAT3.AUX_TIMER2_EV3 726 // AUX_TIMER2_EV2 EVSTAT3.AUX_TIMER2_EV2 727 // AUX_TIMER2_EV1 EVSTAT3.AUX_TIMER2_EV1 728 // AUX_TIMER2_EV0 EVSTAT3.AUX_TIMER2_EV0 729 // AUX_COMPB EVSTAT2.AUX_COMPB 730 // AUX_COMPA EVSTAT2.AUX_COMPA 731 // MCU_OBSMUX1 EVSTAT2.MCU_OBSMUX1 732 // MCU_OBSMUX0 EVSTAT2.MCU_OBSMUX0 733 // MCU_EV EVSTAT2.MCU_EV 734 // ACLK_REF EVSTAT2.ACLK_REF 735 // VDDR_RECHARGE EVSTAT2.VDDR_RECHARGE 736 // MCU_ACTIVE EVSTAT2.MCU_ACTIVE 737 // PWR_DWN EVSTAT2.PWR_DWN 738 // SCLK_LF EVSTAT2.SCLK_LF 739 // AON_BATMON_TEMP_UPD EVSTAT2.AON_BATMON_TEMP_UPD 740 // AON_BATMON_BAT_UPD EVSTAT2.AON_BATMON_BAT_UPD 741 // AON_RTC_4KHZ EVSTAT2.AON_RTC_4KHZ 742 // AON_RTC_CH2_DLY EVSTAT2.AON_RTC_CH2_DLY 743 // AON_RTC_CH2 EVSTAT2.AON_RTC_CH2 744 // AUX_PROG_DLY_IDLE Programmable delay event as described in PROGDLY 745 // AUXIO31 EVSTAT1.AUXIO31 746 // AUXIO30 EVSTAT1.AUXIO30 747 // AUXIO29 EVSTAT1.AUXIO29 748 // AUXIO28 EVSTAT1.AUXIO28 749 // AUXIO27 EVSTAT1.AUXIO27 750 // AUXIO26 EVSTAT1.AUXIO26 751 // AUXIO25 EVSTAT1.AUXIO25 752 // AUXIO24 EVSTAT1.AUXIO24 753 // AUXIO23 EVSTAT1.AUXIO23 754 // AUXIO22 EVSTAT1.AUXIO22 755 // AUXIO21 EVSTAT1.AUXIO21 756 // AUXIO20 EVSTAT1.AUXIO20 757 // AUXIO19 EVSTAT1.AUXIO19 758 // AUXIO18 EVSTAT1.AUXIO18 759 // AUXIO17 EVSTAT1.AUXIO17 760 // AUXIO16 EVSTAT1.AUXIO16 761 // AUXIO15 EVSTAT0.AUXIO15 762 // AUXIO14 EVSTAT0.AUXIO14 763 // AUXIO13 EVSTAT0.AUXIO13 764 // AUXIO12 EVSTAT0.AUXIO12 765 // AUXIO11 EVSTAT0.AUXIO11 766 // AUXIO10 EVSTAT0.AUXIO10 767 // AUXIO9 EVSTAT0.AUXIO9 768 // AUXIO8 EVSTAT0.AUXIO8 769 // AUXIO7 EVSTAT0.AUXIO7 770 // AUXIO6 EVSTAT0.AUXIO6 771 // AUXIO5 EVSTAT0.AUXIO5 772 // AUXIO4 EVSTAT0.AUXIO4 773 // AUXIO3 EVSTAT0.AUXIO3 774 // AUXIO2 EVSTAT0.AUXIO2 775 // AUXIO1 EVSTAT0.AUXIO1 776 // AUXIO0 EVSTAT0.AUXIO0 777 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_W 6 778 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_M 0x0000003F 779 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_S 0 780 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TIMER2_CLKSWITCH_RDY 0x0000003F 781 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_DAC_HOLD_ACTIVE 0x0000003E 782 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_SMPH_AUTOTAKE_DONE 0x0000003D 783 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_ADC_FIFO_NOT_EMPTY 0x0000003C 784 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_ADC_FIFO_ALMOST_FULL 0x0000003B 785 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_ADC_IRQ 0x0000003A 786 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_ADC_DONE 0x00000039 787 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_ISRC_RESET_N 0x00000038 788 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TDC_DONE 0x00000037 789 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TIMER0_EV 0x00000036 790 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TIMER1_EV 0x00000035 791 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TIMER2_PULSE 0x00000034 792 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TIMER2_EV3 0x00000033 793 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TIMER2_EV2 0x00000032 794 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TIMER2_EV1 0x00000031 795 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_TIMER2_EV0 0x00000030 796 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_COMPB 0x0000002F 797 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_COMPA 0x0000002E 798 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_MCU_OBSMUX1 0x0000002D 799 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_MCU_OBSMUX0 0x0000002C 800 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_MCU_EV 0x0000002B 801 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_ACLK_REF 0x0000002A 802 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_VDDR_RECHARGE 0x00000029 803 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_MCU_ACTIVE 0x00000028 804 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_PWR_DWN 0x00000027 805 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_SCLK_LF 0x00000026 806 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AON_BATMON_TEMP_UPD 0x00000025 807 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AON_BATMON_BAT_UPD 0x00000024 808 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AON_RTC_4KHZ 0x00000023 809 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AON_RTC_CH2_DLY 0x00000022 810 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AON_RTC_CH2 0x00000021 811 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUX_PROG_DLY_IDLE 0x00000020 812 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO31 0x0000001F 813 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO30 0x0000001E 814 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO29 0x0000001D 815 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO28 0x0000001C 816 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO27 0x0000001B 817 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO26 0x0000001A 818 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO25 0x00000019 819 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO24 0x00000018 820 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO23 0x00000017 821 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO22 0x00000016 822 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO21 0x00000015 823 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO20 0x00000014 824 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO19 0x00000013 825 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO18 0x00000012 826 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO17 0x00000011 827 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO16 0x00000010 828 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO15 0x0000000F 829 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO14 0x0000000E 830 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO13 0x0000000D 831 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO12 0x0000000C 832 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO11 0x0000000B 833 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO10 0x0000000A 834 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO9 0x00000009 835 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO8 0x00000008 836 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO7 0x00000007 837 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO6 0x00000006 838 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO5 0x00000005 839 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO4 0x00000004 840 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO3 0x00000003 841 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO2 0x00000002 842 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO1 0x00000001 843 #define AUX_EVCTL_SCEWEVCFG0_EV0_SEL_AUXIO0 0x00000000 844 845 //***************************************************************************** 846 // 847 // Register: AUX_EVCTL_O_SCEWEVCFG1 848 // 849 //***************************************************************************** 850 // Field: [7] EV0_POL 851 // 852 // Polarity of SCEWEVCFG0.EV0_SEL event. 853 // 854 // When SCEWEVCFG0.COMB_EV_EN is 0: 855 // 856 // 0: Non-inverted. 857 // 1: Non-inverted. 858 // 859 // When SCEWEVCFG0.COMB_EV_EN is 1. 860 // 861 // 0: Non-inverted. 862 // 1: Inverted. 863 #define AUX_EVCTL_SCEWEVCFG1_EV0_POL 0x00000080 864 #define AUX_EVCTL_SCEWEVCFG1_EV0_POL_BITN 7 865 #define AUX_EVCTL_SCEWEVCFG1_EV0_POL_M 0x00000080 866 #define AUX_EVCTL_SCEWEVCFG1_EV0_POL_S 7 867 868 // Field: [6] EV1_POL 869 // 870 // Polarity of EV1_SEL event. 871 // 872 // When SCEWEVCFG0.COMB_EV_EN is 0: 873 // 874 // 0: Non-inverted. 875 // 1: Non-inverted. 876 // 877 // When SCEWEVCFG0.COMB_EV_EN is 1. 878 // 879 // 0: Non-inverted. 880 // 1: Inverted. 881 #define AUX_EVCTL_SCEWEVCFG1_EV1_POL 0x00000040 882 #define AUX_EVCTL_SCEWEVCFG1_EV1_POL_BITN 6 883 #define AUX_EVCTL_SCEWEVCFG1_EV1_POL_M 0x00000040 884 #define AUX_EVCTL_SCEWEVCFG1_EV1_POL_S 6 885 886 // Field: [5:0] EV1_SEL 887 // 888 // Select the event source from the synchronous event bus to be used in event 889 // equation. 890 // ENUMs: 891 // AUX_TIMER2_CLKSWITCH_RDY EVSTAT3.AUX_TIMER2_CLKSWITCH_RDY 892 // AUX_DAC_HOLD_ACTIVE EVSTAT3.AUX_DAC_HOLD_ACTIVE 893 // AUX_SMPH_AUTOTAKE_DONE EVSTAT3.AUX_SMPH_AUTOTAKE_DONE 894 // AUX_ADC_FIFO_NOT_EMPTY EVSTAT3.AUX_ADC_FIFO_NOT_EMPTY 895 // AUX_ADC_FIFO_ALMOST_FULL EVSTAT3.AUX_ADC_FIFO_ALMOST_FULL 896 // AUX_ADC_IRQ EVSTAT3.AUX_ADC_IRQ 897 // AUX_ADC_DONE EVSTAT3.AUX_ADC_DONE 898 // AUX_ISRC_RESET_N EVSTAT3.AUX_ISRC_RESET_N 899 // AUX_TDC_DONE EVSTAT3.AUX_TDC_DONE 900 // AUX_TIMER0_EV EVSTAT3.AUX_TIMER0_EV 901 // AUX_TIMER1_EV EVSTAT3.AUX_TIMER1_EV 902 // AUX_TIMER2_PULSE EVSTAT3.AUX_TIMER2_PULSE 903 // AUX_TIMER2_EV3 EVSTAT3.AUX_TIMER2_EV3 904 // AUX_TIMER2_EV2 EVSTAT3.AUX_TIMER2_EV2 905 // AUX_TIMER2_EV1 EVSTAT3.AUX_TIMER2_EV1 906 // AUX_TIMER2_EV0 EVSTAT3.AUX_TIMER2_EV0 907 // AUX_COMPB EVSTAT2.AUX_COMPB 908 // AUX_COMPA EVSTAT2.AUX_COMPA 909 // MCU_OBSMUX1 EVSTAT2.MCU_OBSMUX1 910 // MCU_OBSMUX0 EVSTAT2.MCU_OBSMUX0 911 // MCU_EV EVSTAT2.MCU_EV 912 // ACLK_REF EVSTAT2.ACLK_REF 913 // VDDR_RECHARGE EVSTAT2.VDDR_RECHARGE 914 // MCU_ACTIVE EVSTAT2.MCU_ACTIVE 915 // PWR_DWN EVSTAT2.PWR_DWN 916 // SCLK_LF EVSTAT2.SCLK_LF 917 // AON_BATMON_TEMP_UPD EVSTAT2.AON_BATMON_TEMP_UPD 918 // AON_BATMON_BAT_UPD EVSTAT2.AON_BATMON_BAT_UPD 919 // AON_RTC_4KHZ EVSTAT2.AON_RTC_4KHZ 920 // AON_RTC_CH2_DLY EVSTAT2.AON_RTC_CH2_DLY 921 // AON_RTC_CH2 EVSTAT2.AON_RTC_CH2 922 // AUX_PROG_DLY_IDLE Programmable delay event as described in PROGDLY 923 // AUXIO31 EVSTAT1.AUXIO31 924 // AUXIO30 EVSTAT1.AUXIO30 925 // AUXIO29 EVSTAT1.AUXIO29 926 // AUXIO28 EVSTAT1.AUXIO28 927 // AUXIO27 EVSTAT1.AUXIO27 928 // AUXIO26 EVSTAT1.AUXIO26 929 // AUXIO25 EVSTAT1.AUXIO25 930 // AUXIO24 EVSTAT1.AUXIO24 931 // AUXIO23 EVSTAT1.AUXIO23 932 // AUXIO22 EVSTAT1.AUXIO22 933 // AUXIO21 EVSTAT1.AUXIO21 934 // AUXIO20 EVSTAT1.AUXIO20 935 // AUXIO19 EVSTAT1.AUXIO19 936 // AUXIO18 EVSTAT1.AUXIO18 937 // AUXIO17 EVSTAT1.AUXIO17 938 // AUXIO16 EVSTAT1.AUXIO16 939 // AUXIO15 EVSTAT0.AUXIO15 940 // AUXIO14 EVSTAT0.AUXIO14 941 // AUXIO13 EVSTAT0.AUXIO13 942 // AUXIO12 EVSTAT0.AUXIO12 943 // AUXIO11 EVSTAT0.AUXIO11 944 // AUXIO10 EVSTAT0.AUXIO10 945 // AUXIO9 EVSTAT0.AUXIO9 946 // AUXIO8 EVSTAT0.AUXIO8 947 // AUXIO7 EVSTAT0.AUXIO7 948 // AUXIO6 EVSTAT0.AUXIO6 949 // AUXIO5 EVSTAT0.AUXIO5 950 // AUXIO4 EVSTAT0.AUXIO4 951 // AUXIO3 EVSTAT0.AUXIO3 952 // AUXIO2 EVSTAT0.AUXIO2 953 // AUXIO1 EVSTAT0.AUXIO1 954 // AUXIO0 EVSTAT0.AUXIO0 955 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_W 6 956 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_M 0x0000003F 957 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_S 0 958 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TIMER2_CLKSWITCH_RDY 0x0000003F 959 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_DAC_HOLD_ACTIVE 0x0000003E 960 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_SMPH_AUTOTAKE_DONE 0x0000003D 961 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_ADC_FIFO_NOT_EMPTY 0x0000003C 962 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_ADC_FIFO_ALMOST_FULL 0x0000003B 963 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_ADC_IRQ 0x0000003A 964 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_ADC_DONE 0x00000039 965 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_ISRC_RESET_N 0x00000038 966 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TDC_DONE 0x00000037 967 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TIMER0_EV 0x00000036 968 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TIMER1_EV 0x00000035 969 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TIMER2_PULSE 0x00000034 970 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TIMER2_EV3 0x00000033 971 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TIMER2_EV2 0x00000032 972 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TIMER2_EV1 0x00000031 973 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_TIMER2_EV0 0x00000030 974 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_COMPB 0x0000002F 975 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_COMPA 0x0000002E 976 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_MCU_OBSMUX1 0x0000002D 977 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_MCU_OBSMUX0 0x0000002C 978 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_MCU_EV 0x0000002B 979 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_ACLK_REF 0x0000002A 980 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_VDDR_RECHARGE 0x00000029 981 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_MCU_ACTIVE 0x00000028 982 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_PWR_DWN 0x00000027 983 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_SCLK_LF 0x00000026 984 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AON_BATMON_TEMP_UPD 0x00000025 985 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AON_BATMON_BAT_UPD 0x00000024 986 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AON_RTC_4KHZ 0x00000023 987 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AON_RTC_CH2_DLY 0x00000022 988 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AON_RTC_CH2 0x00000021 989 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUX_PROG_DLY_IDLE 0x00000020 990 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO31 0x0000001F 991 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO30 0x0000001E 992 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO29 0x0000001D 993 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO28 0x0000001C 994 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO27 0x0000001B 995 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO26 0x0000001A 996 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO25 0x00000019 997 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO24 0x00000018 998 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO23 0x00000017 999 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO22 0x00000016 1000 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO21 0x00000015 1001 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO20 0x00000014 1002 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO19 0x00000013 1003 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO18 0x00000012 1004 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO17 0x00000011 1005 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO16 0x00000010 1006 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO15 0x0000000F 1007 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO14 0x0000000E 1008 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO13 0x0000000D 1009 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO12 0x0000000C 1010 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO11 0x0000000B 1011 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO10 0x0000000A 1012 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO9 0x00000009 1013 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO8 0x00000008 1014 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO7 0x00000007 1015 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO6 0x00000006 1016 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO5 0x00000005 1017 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO4 0x00000004 1018 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO3 0x00000003 1019 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO2 0x00000002 1020 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO1 0x00000001 1021 #define AUX_EVCTL_SCEWEVCFG1_EV1_SEL_AUXIO0 0x00000000 1022 1023 //***************************************************************************** 1024 // 1025 // Register: AUX_EVCTL_O_DMACTL 1026 // 1027 //***************************************************************************** 1028 // Field: [2] REQ_MODE 1029 // 1030 // UDMA0 Request mode 1031 // ENUMs: 1032 // SINGLE Single requests are generated on UDMA0 channel 7 1033 // when the condition configured in SEL is met. 1034 // BURST Burst requests are generated on UDMA0 channel 7 1035 // when the condition configured in SEL is met. 1036 #define AUX_EVCTL_DMACTL_REQ_MODE 0x00000004 1037 #define AUX_EVCTL_DMACTL_REQ_MODE_BITN 2 1038 #define AUX_EVCTL_DMACTL_REQ_MODE_M 0x00000004 1039 #define AUX_EVCTL_DMACTL_REQ_MODE_S 2 1040 #define AUX_EVCTL_DMACTL_REQ_MODE_SINGLE 0x00000004 1041 #define AUX_EVCTL_DMACTL_REQ_MODE_BURST 0x00000000 1042 1043 // Field: [1] EN 1044 // 1045 // uDMA ADC interface enable. 1046 // 1047 // 0: Disable UDMA0 interface to ADC. 1048 // 1: Enable UDMA0 interface to ADC. 1049 #define AUX_EVCTL_DMACTL_EN 0x00000002 1050 #define AUX_EVCTL_DMACTL_EN_BITN 1 1051 #define AUX_EVCTL_DMACTL_EN_M 0x00000002 1052 #define AUX_EVCTL_DMACTL_EN_S 1 1053 1054 // Field: [0] SEL 1055 // 1056 // Select FIFO watermark level required to trigger a UDMA0 transfer of ADC FIFO 1057 // data. 1058 // ENUMs: 1059 // AUX_ADC_FIFO_ALMOST_FULL UDMA0 trigger event will be generated when the ADC 1060 // FIFO is almost full (3/4 full). 1061 // AUX_ADC_FIFO_NOT_EMPTY UDMA0 trigger event will be generated when there 1062 // are samples in the ADC FIFO. 1063 #define AUX_EVCTL_DMACTL_SEL 0x00000001 1064 #define AUX_EVCTL_DMACTL_SEL_BITN 0 1065 #define AUX_EVCTL_DMACTL_SEL_M 0x00000001 1066 #define AUX_EVCTL_DMACTL_SEL_S 0 1067 #define AUX_EVCTL_DMACTL_SEL_AUX_ADC_FIFO_ALMOST_FULL 0x00000001 1068 #define AUX_EVCTL_DMACTL_SEL_AUX_ADC_FIFO_NOT_EMPTY 0x00000000 1069 1070 //***************************************************************************** 1071 // 1072 // Register: AUX_EVCTL_O_SWEVSET 1073 // 1074 //***************************************************************************** 1075 // Field: [2] SWEV2 1076 // 1077 // Software event flag 2. 1078 // 1079 // 0: No effect. 1080 // 1: Set software event flag 2. 1081 #define AUX_EVCTL_SWEVSET_SWEV2 0x00000004 1082 #define AUX_EVCTL_SWEVSET_SWEV2_BITN 2 1083 #define AUX_EVCTL_SWEVSET_SWEV2_M 0x00000004 1084 #define AUX_EVCTL_SWEVSET_SWEV2_S 2 1085 1086 // Field: [1] SWEV1 1087 // 1088 // Software event flag 1. 1089 // 1090 // 0: No effect. 1091 // 1: Set software event flag 1. 1092 #define AUX_EVCTL_SWEVSET_SWEV1 0x00000002 1093 #define AUX_EVCTL_SWEVSET_SWEV1_BITN 1 1094 #define AUX_EVCTL_SWEVSET_SWEV1_M 0x00000002 1095 #define AUX_EVCTL_SWEVSET_SWEV1_S 1 1096 1097 // Field: [0] SWEV0 1098 // 1099 // Software event flag 0. 1100 // 1101 // 0: No effect. 1102 // 1: Set software event flag 0. 1103 #define AUX_EVCTL_SWEVSET_SWEV0 0x00000001 1104 #define AUX_EVCTL_SWEVSET_SWEV0_BITN 0 1105 #define AUX_EVCTL_SWEVSET_SWEV0_M 0x00000001 1106 #define AUX_EVCTL_SWEVSET_SWEV0_S 0 1107 1108 //***************************************************************************** 1109 // 1110 // Register: AUX_EVCTL_O_EVTOAONFLAGS 1111 // 1112 //***************************************************************************** 1113 // Field: [8] AUX_TIMER1_EV 1114 // 1115 // This event flag is set when level selected by EVTOAONPOL.AUX_TIMER1_EV 1116 // occurs on EVSTAT3.AUX_TIMER1_EV. 1117 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TIMER1_EV 0x00000100 1118 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TIMER1_EV_BITN 8 1119 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TIMER1_EV_M 0x00000100 1120 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TIMER1_EV_S 8 1121 1122 // Field: [7] AUX_TIMER0_EV 1123 // 1124 // This event flag is set when level selected by EVTOAONPOL.AUX_TIMER0_EV 1125 // occurs on EVSTAT3.AUX_TIMER0_EV. 1126 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TIMER0_EV 0x00000080 1127 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TIMER0_EV_BITN 7 1128 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TIMER0_EV_M 0x00000080 1129 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TIMER0_EV_S 7 1130 1131 // Field: [6] AUX_TDC_DONE 1132 // 1133 // This event flag is set when level selected by EVTOAONPOL.AUX_TDC_DONE occurs 1134 // on EVSTAT3.AUX_TDC_DONE. 1135 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TDC_DONE 0x00000040 1136 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TDC_DONE_BITN 6 1137 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TDC_DONE_M 0x00000040 1138 #define AUX_EVCTL_EVTOAONFLAGS_AUX_TDC_DONE_S 6 1139 1140 // Field: [5] AUX_ADC_DONE 1141 // 1142 // This event flag is set when level selected by EVTOAONPOL.AUX_ADC_DONE occurs 1143 // on EVSTAT3.AUX_ADC_DONE. 1144 #define AUX_EVCTL_EVTOAONFLAGS_AUX_ADC_DONE 0x00000020 1145 #define AUX_EVCTL_EVTOAONFLAGS_AUX_ADC_DONE_BITN 5 1146 #define AUX_EVCTL_EVTOAONFLAGS_AUX_ADC_DONE_M 0x00000020 1147 #define AUX_EVCTL_EVTOAONFLAGS_AUX_ADC_DONE_S 5 1148 1149 // Field: [4] AUX_COMPB 1150 // 1151 // This event flag is set when edge selected by EVTOAONPOL.AUX_COMPB occurs on 1152 // EVSTAT2.AUX_COMPB. 1153 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB 0x00000010 1154 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB_BITN 4 1155 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB_M 0x00000010 1156 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPB_S 4 1157 1158 // Field: [3] AUX_COMPA 1159 // 1160 // This event flag is set when edge selected by EVTOAONPOL.AUX_COMPA occurs on 1161 // EVSTAT2.AUX_COMPA. 1162 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA 0x00000008 1163 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA_BITN 3 1164 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA_M 0x00000008 1165 #define AUX_EVCTL_EVTOAONFLAGS_AUX_COMPA_S 3 1166 1167 // Field: [2] SWEV2 1168 // 1169 // This event flag is set when software writes a 1 to SWEVSET.SWEV2. 1170 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2 0x00000004 1171 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2_BITN 2 1172 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2_M 0x00000004 1173 #define AUX_EVCTL_EVTOAONFLAGS_SWEV2_S 2 1174 1175 // Field: [1] SWEV1 1176 // 1177 // This event flag is set when software writes a 1 to SWEVSET.SWEV1. 1178 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1 0x00000002 1179 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1_BITN 1 1180 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1_M 0x00000002 1181 #define AUX_EVCTL_EVTOAONFLAGS_SWEV1_S 1 1182 1183 // Field: [0] SWEV0 1184 // 1185 // This event flag is set when software writes a 1 to SWEVSET.SWEV0. 1186 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0 0x00000001 1187 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0_BITN 0 1188 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0_M 0x00000001 1189 #define AUX_EVCTL_EVTOAONFLAGS_SWEV0_S 0 1190 1191 //***************************************************************************** 1192 // 1193 // Register: AUX_EVCTL_O_EVTOAONPOL 1194 // 1195 //***************************************************************************** 1196 // Field: [8] AUX_TIMER1_EV 1197 // 1198 // Select the level of EVSTAT3.AUX_TIMER1_EV that sets 1199 // EVTOAONFLAGS.AUX_TIMER1_EV. 1200 // ENUMs: 1201 // LOW Low level 1202 // HIGH High level 1203 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER1_EV 0x00000100 1204 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER1_EV_BITN 8 1205 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER1_EV_M 0x00000100 1206 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER1_EV_S 8 1207 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER1_EV_LOW 0x00000100 1208 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER1_EV_HIGH 0x00000000 1209 1210 // Field: [7] AUX_TIMER0_EV 1211 // 1212 // Select the level of EVSTAT3.AUX_TIMER0_EV that sets 1213 // EVTOAONFLAGS.AUX_TIMER0_EV. 1214 // ENUMs: 1215 // LOW Low level 1216 // HIGH High level 1217 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER0_EV 0x00000080 1218 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER0_EV_BITN 7 1219 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER0_EV_M 0x00000080 1220 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER0_EV_S 7 1221 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER0_EV_LOW 0x00000080 1222 #define AUX_EVCTL_EVTOAONPOL_AUX_TIMER0_EV_HIGH 0x00000000 1223 1224 // Field: [6] AUX_TDC_DONE 1225 // 1226 // Select level of EVSTAT3.AUX_TDC_DONE that sets EVTOAONFLAGS.AUX_TDC_DONE. 1227 // ENUMs: 1228 // LOW Low level 1229 // HIGH High level 1230 #define AUX_EVCTL_EVTOAONPOL_AUX_TDC_DONE 0x00000040 1231 #define AUX_EVCTL_EVTOAONPOL_AUX_TDC_DONE_BITN 6 1232 #define AUX_EVCTL_EVTOAONPOL_AUX_TDC_DONE_M 0x00000040 1233 #define AUX_EVCTL_EVTOAONPOL_AUX_TDC_DONE_S 6 1234 #define AUX_EVCTL_EVTOAONPOL_AUX_TDC_DONE_LOW 0x00000040 1235 #define AUX_EVCTL_EVTOAONPOL_AUX_TDC_DONE_HIGH 0x00000000 1236 1237 // Field: [5] AUX_ADC_DONE 1238 // 1239 // Select the level of EVSTAT3.AUX_ADC_DONE that sets 1240 // EVTOAONFLAGS.AUX_ADC_DONE. 1241 // ENUMs: 1242 // LOW Low level 1243 // HIGH High level 1244 #define AUX_EVCTL_EVTOAONPOL_AUX_ADC_DONE 0x00000020 1245 #define AUX_EVCTL_EVTOAONPOL_AUX_ADC_DONE_BITN 5 1246 #define AUX_EVCTL_EVTOAONPOL_AUX_ADC_DONE_M 0x00000020 1247 #define AUX_EVCTL_EVTOAONPOL_AUX_ADC_DONE_S 5 1248 #define AUX_EVCTL_EVTOAONPOL_AUX_ADC_DONE_LOW 0x00000020 1249 #define AUX_EVCTL_EVTOAONPOL_AUX_ADC_DONE_HIGH 0x00000000 1250 1251 // Field: [4] AUX_COMPB 1252 // 1253 // Select the edge of EVSTAT2.AUX_COMPB that sets EVTOAONFLAGS.AUX_COMPB. 1254 // ENUMs: 1255 // FALL Falling edge 1256 // RISE Rising edge 1257 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB 0x00000010 1258 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_BITN 4 1259 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_M 0x00000010 1260 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_S 4 1261 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_FALL 0x00000010 1262 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPB_RISE 0x00000000 1263 1264 // Field: [3] AUX_COMPA 1265 // 1266 // Select the edge of EVSTAT2.AUX_COMPA that sets EVTOAONFLAGS.AUX_COMPA. 1267 // ENUMs: 1268 // FALL Falling edge 1269 // RISE Rising edge 1270 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA 0x00000008 1271 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_BITN 3 1272 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_M 0x00000008 1273 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_S 3 1274 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_FALL 0x00000008 1275 #define AUX_EVCTL_EVTOAONPOL_AUX_COMPA_RISE 0x00000000 1276 1277 //***************************************************************************** 1278 // 1279 // Register: AUX_EVCTL_O_EVTOAONFLAGSCLR 1280 // 1281 //***************************************************************************** 1282 // Field: [8] AUX_TIMER1_EV 1283 // 1284 // Write 1 to clear EVTOAONFLAGS.AUX_TIMER1_EV. 1285 // 1286 // Read value is 0. 1287 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TIMER1_EV 0x00000100 1288 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TIMER1_EV_BITN 8 1289 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TIMER1_EV_M 0x00000100 1290 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TIMER1_EV_S 8 1291 1292 // Field: [7] AUX_TIMER0_EV 1293 // 1294 // Write 1 to clear EVTOAONFLAGS.AUX_TIMER0_EV. 1295 // 1296 // Read value is 0. 1297 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TIMER0_EV 0x00000080 1298 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TIMER0_EV_BITN 7 1299 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TIMER0_EV_M 0x00000080 1300 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TIMER0_EV_S 7 1301 1302 // Field: [6] AUX_TDC_DONE 1303 // 1304 // Write 1 to clear EVTOAONFLAGS.AUX_TDC_DONE. 1305 // 1306 // Read value is 0. 1307 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TDC_DONE 0x00000040 1308 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TDC_DONE_BITN 6 1309 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TDC_DONE_M 0x00000040 1310 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_TDC_DONE_S 6 1311 1312 // Field: [5] AUX_ADC_DONE 1313 // 1314 // Write 1 to clear EVTOAONFLAGS.AUX_ADC_DONE. 1315 // 1316 // Read value is 0. 1317 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_ADC_DONE 0x00000020 1318 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_ADC_DONE_BITN 5 1319 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_ADC_DONE_M 0x00000020 1320 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_ADC_DONE_S 5 1321 1322 // Field: [4] AUX_COMPB 1323 // 1324 // Write 1 to clear EVTOAONFLAGS.AUX_COMPB. 1325 // 1326 // Read value is 0. 1327 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB 0x00000010 1328 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB_BITN 4 1329 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB_M 0x00000010 1330 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPB_S 4 1331 1332 // Field: [3] AUX_COMPA 1333 // 1334 // Write 1 to clear EVTOAONFLAGS.AUX_COMPA. 1335 // 1336 // Read value is 0. 1337 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA 0x00000008 1338 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA_BITN 3 1339 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA_M 0x00000008 1340 #define AUX_EVCTL_EVTOAONFLAGSCLR_AUX_COMPA_S 3 1341 1342 // Field: [2] SWEV2 1343 // 1344 // Write 1 to clear EVTOAONFLAGS.SWEV2. 1345 // 1346 // Read value is 0. 1347 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2 0x00000004 1348 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2_BITN 2 1349 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2_M 0x00000004 1350 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV2_S 2 1351 1352 // Field: [1] SWEV1 1353 // 1354 // Write 1 to clear EVTOAONFLAGS.SWEV1. 1355 // 1356 // Read value is 0. 1357 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1 0x00000002 1358 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1_BITN 1 1359 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1_M 0x00000002 1360 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV1_S 1 1361 1362 // Field: [0] SWEV0 1363 // 1364 // Write 1 to clear EVTOAONFLAGS.SWEV0. 1365 // 1366 // Read value is 0. 1367 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0 0x00000001 1368 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0_BITN 0 1369 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0_M 0x00000001 1370 #define AUX_EVCTL_EVTOAONFLAGSCLR_SWEV0_S 0 1371 1372 //***************************************************************************** 1373 // 1374 // Register: AUX_EVCTL_O_EVTOMCUFLAGS 1375 // 1376 //***************************************************************************** 1377 // Field: [15] AUX_TIMER2_PULSE 1378 // 1379 // This event flag is set when level selected by EVTOMCUPOL.AUX_TIMER2_PULSE 1380 // occurs on EVSTAT3.AUX_TIMER2_PULSE. 1381 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_PULSE 0x00008000 1382 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_PULSE_BITN 15 1383 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_PULSE_M 0x00008000 1384 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_PULSE_S 15 1385 1386 // Field: [14] AUX_TIMER2_EV3 1387 // 1388 // This event flag is set when level selected by EVTOMCUPOL.AUX_TIMER2_EV3 1389 // occurs on EVSTAT3.AUX_TIMER2_EV3. 1390 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV3 0x00004000 1391 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV3_BITN 14 1392 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV3_M 0x00004000 1393 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV3_S 14 1394 1395 // Field: [13] AUX_TIMER2_EV2 1396 // 1397 // This event flag is set when level selected by EVTOMCUPOL.AUX_TIMER2_EV2 1398 // occurs on EVSTAT3.AUX_TIMER2_EV2. 1399 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV2 0x00002000 1400 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV2_BITN 13 1401 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV2_M 0x00002000 1402 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV2_S 13 1403 1404 // Field: [12] AUX_TIMER2_EV1 1405 // 1406 // This event flag is set when level selected by EVTOMCUPOL.AUX_TIMER2_EV1 1407 // occurs on EVSTAT3.AUX_TIMER2_EV1. 1408 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV1 0x00001000 1409 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV1_BITN 12 1410 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV1_M 0x00001000 1411 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV1_S 12 1412 1413 // Field: [11] AUX_TIMER2_EV0 1414 // 1415 // This event flag is set when level selected by EVTOMCUPOL.AUX_TIMER2_EV0 1416 // occurs on EVSTAT3.AUX_TIMER2_EV0. 1417 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV0 0x00000800 1418 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV0_BITN 11 1419 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV0_M 0x00000800 1420 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER2_EV0_S 11 1421 1422 // Field: [10] AUX_ADC_IRQ 1423 // 1424 // This event flag is set when level selected by EVTOMCUPOL.AUX_ADC_IRQ occurs 1425 // on EVSTAT3.AUX_ADC_IRQ. 1426 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_IRQ 0x00000400 1427 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_IRQ_BITN 10 1428 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_IRQ_M 0x00000400 1429 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_IRQ_S 10 1430 1431 // Field: [9] MCU_OBSMUX0 1432 // 1433 // This event flag is set when level selected by EVTOMCUPOL.MCU_OBSMUX0 occurs 1434 // on EVSTAT2.MCU_OBSMUX0. 1435 #define AUX_EVCTL_EVTOMCUFLAGS_MCU_OBSMUX0 0x00000200 1436 #define AUX_EVCTL_EVTOMCUFLAGS_MCU_OBSMUX0_BITN 9 1437 #define AUX_EVCTL_EVTOMCUFLAGS_MCU_OBSMUX0_M 0x00000200 1438 #define AUX_EVCTL_EVTOMCUFLAGS_MCU_OBSMUX0_S 9 1439 1440 // Field: [8] AUX_ADC_FIFO_ALMOST_FULL 1441 // 1442 // This event flag is set when level selected by 1443 // EVTOMCUPOL.AUX_ADC_FIFO_ALMOST_FULL occurs on 1444 // EVSTAT3.AUX_ADC_FIFO_ALMOST_FULL. 1445 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_FIFO_ALMOST_FULL 0x00000100 1446 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_FIFO_ALMOST_FULL_BITN 8 1447 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_FIFO_ALMOST_FULL_M 0x00000100 1448 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_FIFO_ALMOST_FULL_S 8 1449 1450 // Field: [7] AUX_ADC_DONE 1451 // 1452 // This event flag is set when level selected by EVTOMCUPOL.AUX_ADC_DONE occurs 1453 // on EVSTAT3.AUX_ADC_DONE. 1454 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_DONE 0x00000080 1455 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_DONE_BITN 7 1456 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_DONE_M 0x00000080 1457 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_ADC_DONE_S 7 1458 1459 // Field: [6] AUX_SMPH_AUTOTAKE_DONE 1460 // 1461 // This event flag is set when level selected by 1462 // EVTOMCUPOL.AUX_SMPH_AUTOTAKE_DONE occurs on EVSTAT3.AUX_SMPH_AUTOTAKE_DONE. 1463 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_SMPH_AUTOTAKE_DONE 0x00000040 1464 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_SMPH_AUTOTAKE_DONE_BITN 6 1465 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_SMPH_AUTOTAKE_DONE_M 0x00000040 1466 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_SMPH_AUTOTAKE_DONE_S 6 1467 1468 // Field: [5] AUX_TIMER1_EV 1469 // 1470 // This event flag is set when level selected by EVTOMCUPOL.AUX_TIMER1_EV 1471 // occurs on EVSTAT3.AUX_TIMER1_EV. 1472 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER1_EV 0x00000020 1473 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER1_EV_BITN 5 1474 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER1_EV_M 0x00000020 1475 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER1_EV_S 5 1476 1477 // Field: [4] AUX_TIMER0_EV 1478 // 1479 // This event flag is set when level selected by EVTOMCUPOL.AUX_TIMER0_EV 1480 // occurs on EVSTAT3.AUX_TIMER0_EV. 1481 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER0_EV 0x00000010 1482 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER0_EV_BITN 4 1483 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER0_EV_M 0x00000010 1484 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TIMER0_EV_S 4 1485 1486 // Field: [3] AUX_TDC_DONE 1487 // 1488 // This event flag is set when level selected by EVTOMCUPOL.AUX_TDC_DONE occurs 1489 // on EVSTAT3.AUX_TDC_DONE. 1490 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TDC_DONE 0x00000008 1491 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TDC_DONE_BITN 3 1492 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TDC_DONE_M 0x00000008 1493 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_TDC_DONE_S 3 1494 1495 // Field: [2] AUX_COMPB 1496 // 1497 // This event flag is set when edge selected by EVTOMCUPOL.AUX_COMPB occurs on 1498 // EVSTAT2.AUX_COMPB. 1499 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB 0x00000004 1500 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB_BITN 2 1501 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB_M 0x00000004 1502 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPB_S 2 1503 1504 // Field: [1] AUX_COMPA 1505 // 1506 // This event flag is set when edge selected by EVTOMCUPOL.AUX_COMPA occurs on 1507 // EVSTAT2.AUX_COMPA. 1508 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA 0x00000002 1509 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA_BITN 1 1510 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA_M 0x00000002 1511 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_COMPA_S 1 1512 1513 // Field: [0] AUX_WU_EV 1514 // 1515 // This event flag is set when level selected by EVTOMCUPOL.AUX_WU_EV occurs on 1516 // reduction-OR of the AUX_SYSIF:WUFLAGS register. 1517 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_WU_EV 0x00000001 1518 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_WU_EV_BITN 0 1519 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_WU_EV_M 0x00000001 1520 #define AUX_EVCTL_EVTOMCUFLAGS_AUX_WU_EV_S 0 1521 1522 //***************************************************************************** 1523 // 1524 // Register: AUX_EVCTL_O_EVTOMCUPOL 1525 // 1526 //***************************************************************************** 1527 // Field: [15] AUX_TIMER2_PULSE 1528 // 1529 // Select the event source level that sets EVTOMCUFLAGS.AUX_TIMER2_PULSE. 1530 // ENUMs: 1531 // LOW Low level 1532 // HIGH High level 1533 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_PULSE 0x00008000 1534 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_PULSE_BITN 15 1535 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_PULSE_M 0x00008000 1536 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_PULSE_S 15 1537 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_PULSE_LOW 0x00008000 1538 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_PULSE_HIGH 0x00000000 1539 1540 // Field: [14] AUX_TIMER2_EV3 1541 // 1542 // Select the event source level that sets EVTOMCUFLAGS.AUX_TIMER2_EV3. 1543 // ENUMs: 1544 // LOW Low level 1545 // HIGH High level 1546 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV3 0x00004000 1547 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV3_BITN 14 1548 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV3_M 0x00004000 1549 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV3_S 14 1550 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV3_LOW 0x00004000 1551 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV3_HIGH 0x00000000 1552 1553 // Field: [13] AUX_TIMER2_EV2 1554 // 1555 // Select the event source level that sets EVTOMCUFLAGS.AUX_TIMER2_EV2. 1556 // ENUMs: 1557 // LOW Low level 1558 // HIGH High level 1559 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV2 0x00002000 1560 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV2_BITN 13 1561 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV2_M 0x00002000 1562 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV2_S 13 1563 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV2_LOW 0x00002000 1564 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV2_HIGH 0x00000000 1565 1566 // Field: [12] AUX_TIMER2_EV1 1567 // 1568 // Select the event source level that sets EVTOMCUFLAGS.AUX_TIMER2_EV1. 1569 // ENUMs: 1570 // LOW Low level 1571 // HIGH High level 1572 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV1 0x00001000 1573 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV1_BITN 12 1574 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV1_M 0x00001000 1575 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV1_S 12 1576 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV1_LOW 0x00001000 1577 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV1_HIGH 0x00000000 1578 1579 // Field: [11] AUX_TIMER2_EV0 1580 // 1581 // Select the event source level that sets EVTOMCUFLAGS.AUX_TIMER2_EV0. 1582 // ENUMs: 1583 // LOW Low level 1584 // HIGH High level 1585 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV0 0x00000800 1586 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV0_BITN 11 1587 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV0_M 0x00000800 1588 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV0_S 11 1589 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV0_LOW 0x00000800 1590 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER2_EV0_HIGH 0x00000000 1591 1592 // Field: [10] AUX_ADC_IRQ 1593 // 1594 // Select the event source level that sets EVTOMCUFLAGS.AUX_ADC_IRQ. 1595 // ENUMs: 1596 // LOW Low level 1597 // HIGH High level 1598 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_IRQ 0x00000400 1599 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_IRQ_BITN 10 1600 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_IRQ_M 0x00000400 1601 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_IRQ_S 10 1602 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_IRQ_LOW 0x00000400 1603 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_IRQ_HIGH 0x00000000 1604 1605 // Field: [9] MCU_OBSMUX0 1606 // 1607 // Select the event source level that sets EVTOMCUFLAGS.MCU_OBSMUX0. 1608 // ENUMs: 1609 // LOW Low level 1610 // HIGH High level 1611 #define AUX_EVCTL_EVTOMCUPOL_MCU_OBSMUX0 0x00000200 1612 #define AUX_EVCTL_EVTOMCUPOL_MCU_OBSMUX0_BITN 9 1613 #define AUX_EVCTL_EVTOMCUPOL_MCU_OBSMUX0_M 0x00000200 1614 #define AUX_EVCTL_EVTOMCUPOL_MCU_OBSMUX0_S 9 1615 #define AUX_EVCTL_EVTOMCUPOL_MCU_OBSMUX0_LOW 0x00000200 1616 #define AUX_EVCTL_EVTOMCUPOL_MCU_OBSMUX0_HIGH 0x00000000 1617 1618 // Field: [8] AUX_ADC_FIFO_ALMOST_FULL 1619 // 1620 // Select the event source level that sets 1621 // EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL. 1622 // ENUMs: 1623 // LOW Low level 1624 // HIGH High level 1625 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_FIFO_ALMOST_FULL 0x00000100 1626 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_FIFO_ALMOST_FULL_BITN 8 1627 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_FIFO_ALMOST_FULL_M 0x00000100 1628 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_FIFO_ALMOST_FULL_S 8 1629 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_FIFO_ALMOST_FULL_LOW 0x00000100 1630 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_FIFO_ALMOST_FULL_HIGH 0x00000000 1631 1632 // Field: [7] AUX_ADC_DONE 1633 // 1634 // Select the event source level that sets EVTOMCUFLAGS.AUX_ADC_DONE. 1635 // ENUMs: 1636 // LOW Low level 1637 // HIGH High level 1638 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_DONE 0x00000080 1639 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_DONE_BITN 7 1640 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_DONE_M 0x00000080 1641 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_DONE_S 7 1642 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_DONE_LOW 0x00000080 1643 #define AUX_EVCTL_EVTOMCUPOL_AUX_ADC_DONE_HIGH 0x00000000 1644 1645 // Field: [6] AUX_SMPH_AUTOTAKE_DONE 1646 // 1647 // Select the event source level that sets EVTOMCUFLAGS.AUX_SMPH_AUTOTAKE_DONE. 1648 // ENUMs: 1649 // LOW Low level 1650 // HIGH High level 1651 #define AUX_EVCTL_EVTOMCUPOL_AUX_SMPH_AUTOTAKE_DONE 0x00000040 1652 #define AUX_EVCTL_EVTOMCUPOL_AUX_SMPH_AUTOTAKE_DONE_BITN 6 1653 #define AUX_EVCTL_EVTOMCUPOL_AUX_SMPH_AUTOTAKE_DONE_M 0x00000040 1654 #define AUX_EVCTL_EVTOMCUPOL_AUX_SMPH_AUTOTAKE_DONE_S 6 1655 #define AUX_EVCTL_EVTOMCUPOL_AUX_SMPH_AUTOTAKE_DONE_LOW 0x00000040 1656 #define AUX_EVCTL_EVTOMCUPOL_AUX_SMPH_AUTOTAKE_DONE_HIGH 0x00000000 1657 1658 // Field: [5] AUX_TIMER1_EV 1659 // 1660 // Select the event source level that sets EVTOMCUFLAGS.AUX_TIMER1_EV. 1661 // ENUMs: 1662 // LOW Low level 1663 // HIGH High level 1664 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER1_EV 0x00000020 1665 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER1_EV_BITN 5 1666 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER1_EV_M 0x00000020 1667 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER1_EV_S 5 1668 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER1_EV_LOW 0x00000020 1669 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER1_EV_HIGH 0x00000000 1670 1671 // Field: [4] AUX_TIMER0_EV 1672 // 1673 // Select the event source level that sets EVTOMCUFLAGS.AUX_TIMER0_EV. 1674 // ENUMs: 1675 // LOW Low level 1676 // HIGH High level 1677 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER0_EV 0x00000010 1678 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER0_EV_BITN 4 1679 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER0_EV_M 0x00000010 1680 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER0_EV_S 4 1681 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER0_EV_LOW 0x00000010 1682 #define AUX_EVCTL_EVTOMCUPOL_AUX_TIMER0_EV_HIGH 0x00000000 1683 1684 // Field: [3] AUX_TDC_DONE 1685 // 1686 // Select the event source level that sets EVTOMCUFLAGS.AUX_TDC_DONE. 1687 // ENUMs: 1688 // LOW Low level 1689 // HIGH High level 1690 #define AUX_EVCTL_EVTOMCUPOL_AUX_TDC_DONE 0x00000008 1691 #define AUX_EVCTL_EVTOMCUPOL_AUX_TDC_DONE_BITN 3 1692 #define AUX_EVCTL_EVTOMCUPOL_AUX_TDC_DONE_M 0x00000008 1693 #define AUX_EVCTL_EVTOMCUPOL_AUX_TDC_DONE_S 3 1694 #define AUX_EVCTL_EVTOMCUPOL_AUX_TDC_DONE_LOW 0x00000008 1695 #define AUX_EVCTL_EVTOMCUPOL_AUX_TDC_DONE_HIGH 0x00000000 1696 1697 // Field: [2] AUX_COMPB 1698 // 1699 // Select the event source edge that sets EVTOMCUFLAGS.AUX_COMPB. 1700 // ENUMs: 1701 // FALL Falling edge 1702 // RISE Rising edge 1703 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB 0x00000004 1704 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_BITN 2 1705 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_M 0x00000004 1706 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_S 2 1707 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_FALL 0x00000004 1708 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPB_RISE 0x00000000 1709 1710 // Field: [1] AUX_COMPA 1711 // 1712 // Select the event source edge that sets EVTOMCUFLAGS.AUX_COMPA. 1713 // ENUMs: 1714 // FALL Falling edge 1715 // RISE Rising edge 1716 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA 0x00000002 1717 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_BITN 1 1718 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_M 0x00000002 1719 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_S 1 1720 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_FALL 0x00000002 1721 #define AUX_EVCTL_EVTOMCUPOL_AUX_COMPA_RISE 0x00000000 1722 1723 // Field: [0] AUX_WU_EV 1724 // 1725 // Select the event source level that sets EVTOMCUFLAGS.AUX_WU_EV. 1726 // ENUMs: 1727 // LOW Low level 1728 // HIGH High level 1729 #define AUX_EVCTL_EVTOMCUPOL_AUX_WU_EV 0x00000001 1730 #define AUX_EVCTL_EVTOMCUPOL_AUX_WU_EV_BITN 0 1731 #define AUX_EVCTL_EVTOMCUPOL_AUX_WU_EV_M 0x00000001 1732 #define AUX_EVCTL_EVTOMCUPOL_AUX_WU_EV_S 0 1733 #define AUX_EVCTL_EVTOMCUPOL_AUX_WU_EV_LOW 0x00000001 1734 #define AUX_EVCTL_EVTOMCUPOL_AUX_WU_EV_HIGH 0x00000000 1735 1736 //***************************************************************************** 1737 // 1738 // Register: AUX_EVCTL_O_EVTOMCUFLAGSCLR 1739 // 1740 //***************************************************************************** 1741 // Field: [15] AUX_TIMER2_PULSE 1742 // 1743 // Write 1 to clear EVTOMCUFLAGS.AUX_TIMER2_PULSE. 1744 // 1745 // Read value is 0. 1746 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_PULSE 0x00008000 1747 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_PULSE_BITN 15 1748 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_PULSE_M 0x00008000 1749 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_PULSE_S 15 1750 1751 // Field: [14] AUX_TIMER2_EV3 1752 // 1753 // Write 1 to clear EVTOMCUFLAGS.AUX_TIMER2_EV3. 1754 // 1755 // Read value is 0. 1756 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV3 0x00004000 1757 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV3_BITN 14 1758 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV3_M 0x00004000 1759 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV3_S 14 1760 1761 // Field: [13] AUX_TIMER2_EV2 1762 // 1763 // Write 1 to clear EVTOMCUFLAGS.AUX_TIMER2_EV2. 1764 // 1765 // Read value is 0. 1766 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV2 0x00002000 1767 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV2_BITN 13 1768 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV2_M 0x00002000 1769 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV2_S 13 1770 1771 // Field: [12] AUX_TIMER2_EV1 1772 // 1773 // Write 1 to clear EVTOMCUFLAGS.AUX_TIMER2_EV1. 1774 // 1775 // Read value is 0. 1776 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV1 0x00001000 1777 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV1_BITN 12 1778 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV1_M 0x00001000 1779 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV1_S 12 1780 1781 // Field: [11] AUX_TIMER2_EV0 1782 // 1783 // Write 1 to clear EVTOMCUFLAGS.AUX_TIMER2_EV0. 1784 // 1785 // Read value is 0. 1786 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV0 0x00000800 1787 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV0_BITN 11 1788 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV0_M 0x00000800 1789 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER2_EV0_S 11 1790 1791 // Field: [10] AUX_ADC_IRQ 1792 // 1793 // Write 1 to clear EVTOMCUFLAGS.AUX_ADC_IRQ. 1794 // 1795 // Read value is 0. 1796 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_IRQ 0x00000400 1797 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_IRQ_BITN 10 1798 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_IRQ_M 0x00000400 1799 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_IRQ_S 10 1800 1801 // Field: [9] MCU_OBSMUX0 1802 // 1803 // Write 1 to clear EVTOMCUFLAGS.MCU_OBSMUX0. 1804 // 1805 // Read value is 0. 1806 #define AUX_EVCTL_EVTOMCUFLAGSCLR_MCU_OBSMUX0 0x00000200 1807 #define AUX_EVCTL_EVTOMCUFLAGSCLR_MCU_OBSMUX0_BITN 9 1808 #define AUX_EVCTL_EVTOMCUFLAGSCLR_MCU_OBSMUX0_M 0x00000200 1809 #define AUX_EVCTL_EVTOMCUFLAGSCLR_MCU_OBSMUX0_S 9 1810 1811 // Field: [8] AUX_ADC_FIFO_ALMOST_FULL 1812 // 1813 // Write 1 to clear EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL. 1814 // 1815 // Read value is 0. 1816 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_FIFO_ALMOST_FULL 0x00000100 1817 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_FIFO_ALMOST_FULL_BITN 8 1818 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_FIFO_ALMOST_FULL_M 0x00000100 1819 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_FIFO_ALMOST_FULL_S 8 1820 1821 // Field: [7] AUX_ADC_DONE 1822 // 1823 // Write 1 to clear EVTOMCUFLAGS.AUX_ADC_DONE. 1824 // 1825 // Read value is 0. 1826 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_DONE 0x00000080 1827 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_DONE_BITN 7 1828 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_DONE_M 0x00000080 1829 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_ADC_DONE_S 7 1830 1831 // Field: [6] AUX_SMPH_AUTOTAKE_DONE 1832 // 1833 // Write 1 to clear EVTOMCUFLAGS.AUX_SMPH_AUTOTAKE_DONE. 1834 // 1835 // Read value is 0. 1836 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_SMPH_AUTOTAKE_DONE 0x00000040 1837 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_SMPH_AUTOTAKE_DONE_BITN 6 1838 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_SMPH_AUTOTAKE_DONE_M 0x00000040 1839 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_SMPH_AUTOTAKE_DONE_S 6 1840 1841 // Field: [5] AUX_TIMER1_EV 1842 // 1843 // Write 1 to clear EVTOMCUFLAGS.AUX_TIMER1_EV. 1844 // 1845 // Read value is 0. 1846 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER1_EV 0x00000020 1847 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER1_EV_BITN 5 1848 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER1_EV_M 0x00000020 1849 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER1_EV_S 5 1850 1851 // Field: [4] AUX_TIMER0_EV 1852 // 1853 // Write 1 to clear EVTOMCUFLAGS.AUX_TIMER0_EV. 1854 // 1855 // Read value is 0. 1856 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER0_EV 0x00000010 1857 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER0_EV_BITN 4 1858 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER0_EV_M 0x00000010 1859 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TIMER0_EV_S 4 1860 1861 // Field: [3] AUX_TDC_DONE 1862 // 1863 // Write 1 to clear EVTOMCUFLAGS.AUX_TDC_DONE. 1864 // 1865 // Read value is 0. 1866 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TDC_DONE 0x00000008 1867 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TDC_DONE_BITN 3 1868 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TDC_DONE_M 0x00000008 1869 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_TDC_DONE_S 3 1870 1871 // Field: [2] AUX_COMPB 1872 // 1873 // Write 1 to clear EVTOMCUFLAGS.AUX_COMPB. 1874 // 1875 // Read value is 0. 1876 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB 0x00000004 1877 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB_BITN 2 1878 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB_M 0x00000004 1879 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPB_S 2 1880 1881 // Field: [1] AUX_COMPA 1882 // 1883 // Write 1 to clear EVTOMCUFLAGS.AUX_COMPA. 1884 // 1885 // Read value is 0. 1886 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA 0x00000002 1887 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA_BITN 1 1888 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA_M 0x00000002 1889 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_COMPA_S 1 1890 1891 // Field: [0] AUX_WU_EV 1892 // 1893 // Write 1 to clear EVTOMCUFLAGS.AUX_WU_EV. 1894 // 1895 // Read value is 0. 1896 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_WU_EV 0x00000001 1897 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_WU_EV_BITN 0 1898 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_WU_EV_M 0x00000001 1899 #define AUX_EVCTL_EVTOMCUFLAGSCLR_AUX_WU_EV_S 0 1900 1901 //***************************************************************************** 1902 // 1903 // Register: AUX_EVCTL_O_COMBEVTOMCUMASK 1904 // 1905 //***************************************************************************** 1906 // Field: [15] AUX_TIMER2_PULSE 1907 // 1908 // EVTOMCUFLAGS.AUX_TIMER2_PULSE contribution to the AUX_COMB event. 1909 // 1910 // 0: Exclude. 1911 // 1: Include. 1912 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_PULSE 0x00008000 1913 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_PULSE_BITN 15 1914 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_PULSE_M 0x00008000 1915 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_PULSE_S 15 1916 1917 // Field: [14] AUX_TIMER2_EV3 1918 // 1919 // EVTOMCUFLAGS.AUX_TIMER2_EV3 contribution to the AUX_COMB event. 1920 // 1921 // 0: Exclude. 1922 // 1: Include. 1923 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV3 0x00004000 1924 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV3_BITN 14 1925 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV3_M 0x00004000 1926 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV3_S 14 1927 1928 // Field: [13] AUX_TIMER2_EV2 1929 // 1930 // EVTOMCUFLAGS.AUX_TIMER2_EV2 contribution to the AUX_COMB event. 1931 // 1932 // 0: Exclude. 1933 // 1: Include. 1934 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV2 0x00002000 1935 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV2_BITN 13 1936 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV2_M 0x00002000 1937 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV2_S 13 1938 1939 // Field: [12] AUX_TIMER2_EV1 1940 // 1941 // EVTOMCUFLAGS.AUX_TIMER2_EV1 contribution to the AUX_COMB event. 1942 // 1943 // 0: Exclude. 1944 // 1: Include. 1945 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV1 0x00001000 1946 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV1_BITN 12 1947 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV1_M 0x00001000 1948 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV1_S 12 1949 1950 // Field: [11] AUX_TIMER2_EV0 1951 // 1952 // EVTOMCUFLAGS.AUX_TIMER2_EV0 contribution to the AUX_COMB event. 1953 // 1954 // 0: Exclude. 1955 // 1: Include. 1956 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV0 0x00000800 1957 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV0_BITN 11 1958 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV0_M 0x00000800 1959 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER2_EV0_S 11 1960 1961 // Field: [10] AUX_ADC_IRQ 1962 // 1963 // EVTOMCUFLAGS.AUX_ADC_IRQ contribution to the AUX_COMB event. 1964 // 1965 // 0: Exclude. 1966 // 1: Include. 1967 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_IRQ 0x00000400 1968 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_IRQ_BITN 10 1969 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_IRQ_M 0x00000400 1970 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_IRQ_S 10 1971 1972 // Field: [9] MCU_OBSMUX0 1973 // 1974 // EVTOMCUFLAGS.MCU_OBSMUX0 contribution to the AUX_COMB event. 1975 // 1976 // 0: Exclude. 1977 // 1: Include. 1978 #define AUX_EVCTL_COMBEVTOMCUMASK_MCU_OBSMUX0 0x00000200 1979 #define AUX_EVCTL_COMBEVTOMCUMASK_MCU_OBSMUX0_BITN 9 1980 #define AUX_EVCTL_COMBEVTOMCUMASK_MCU_OBSMUX0_M 0x00000200 1981 #define AUX_EVCTL_COMBEVTOMCUMASK_MCU_OBSMUX0_S 9 1982 1983 // Field: [8] AUX_ADC_FIFO_ALMOST_FULL 1984 // 1985 // EVTOMCUFLAGS.AUX_ADC_FIFO_ALMOST_FULL contribution to the AUX_COMB event. 1986 // 1987 // 0: Exclude. 1988 // 1: Include. 1989 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_FIFO_ALMOST_FULL 0x00000100 1990 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_FIFO_ALMOST_FULL_BITN 8 1991 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_FIFO_ALMOST_FULL_M 0x00000100 1992 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_FIFO_ALMOST_FULL_S 8 1993 1994 // Field: [7] AUX_ADC_DONE 1995 // 1996 // EVTOMCUFLAGS.AUX_ADC_DONE contribution to the AUX_COMB event. 1997 // 1998 // 0: Exclude. 1999 // 1: Include. 2000 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_DONE 0x00000080 2001 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_DONE_BITN 7 2002 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_DONE_M 0x00000080 2003 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_ADC_DONE_S 7 2004 2005 // Field: [6] AUX_SMPH_AUTOTAKE_DONE 2006 // 2007 // EVTOMCUFLAGS.AUX_SMPH_AUTOTAKE_DONE contribution to the AUX_COMB event. 2008 // 2009 // 0: Exclude. 2010 // 1: Include. 2011 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_SMPH_AUTOTAKE_DONE 0x00000040 2012 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_SMPH_AUTOTAKE_DONE_BITN 6 2013 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_SMPH_AUTOTAKE_DONE_M 0x00000040 2014 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_SMPH_AUTOTAKE_DONE_S 6 2015 2016 // Field: [5] AUX_TIMER1_EV 2017 // 2018 // EVTOMCUFLAGS.AUX_TIMER1_EV contribution to the AUX_COMB event. 2019 // 2020 // 0: Exclude. 2021 // 1: Include. 2022 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER1_EV 0x00000020 2023 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER1_EV_BITN 5 2024 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER1_EV_M 0x00000020 2025 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER1_EV_S 5 2026 2027 // Field: [4] AUX_TIMER0_EV 2028 // 2029 // EVTOMCUFLAGS.AUX_TIMER0_EV contribution to the AUX_COMB event. 2030 // 2031 // 0: Exclude. 2032 // 1: Include. 2033 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER0_EV 0x00000010 2034 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER0_EV_BITN 4 2035 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER0_EV_M 0x00000010 2036 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TIMER0_EV_S 4 2037 2038 // Field: [3] AUX_TDC_DONE 2039 // 2040 // EVTOMCUFLAGS.AUX_TDC_DONE contribution to the AUX_COMB event. 2041 // 2042 // 0: Exclude. 2043 // 1: Include. 2044 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TDC_DONE 0x00000008 2045 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TDC_DONE_BITN 3 2046 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TDC_DONE_M 0x00000008 2047 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_TDC_DONE_S 3 2048 2049 // Field: [2] AUX_COMPB 2050 // 2051 // EVTOMCUFLAGS.AUX_COMPB contribution to the AUX_COMB event. 2052 // 2053 // 0: Exclude 2054 // 1: Include. 2055 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB 0x00000004 2056 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB_BITN 2 2057 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB_M 0x00000004 2058 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPB_S 2 2059 2060 // Field: [1] AUX_COMPA 2061 // 2062 // EVTOMCUFLAGS.AUX_COMPA contribution to the AUX_COMB event. 2063 // 2064 // 0: Exclude. 2065 // 1: Include. 2066 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA 0x00000002 2067 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA_BITN 1 2068 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA_M 0x00000002 2069 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_COMPA_S 1 2070 2071 // Field: [0] AUX_WU_EV 2072 // 2073 // EVTOMCUFLAGS.AUX_WU_EV contribution to the AUX_COMB event. 2074 // 2075 // 0: Exclude. 2076 // 1: Include. 2077 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_WU_EV 0x00000001 2078 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_WU_EV_BITN 0 2079 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_WU_EV_M 0x00000001 2080 #define AUX_EVCTL_COMBEVTOMCUMASK_AUX_WU_EV_S 0 2081 2082 //***************************************************************************** 2083 // 2084 // Register: AUX_EVCTL_O_EVOBSCFG 2085 // 2086 //***************************************************************************** 2087 // Field: [5:0] EVOBS_SEL 2088 // 2089 // Select which event from the asynchronous event bus that represents 2090 // AUX_EV_OBS in AUX_AIODIOn. 2091 // ENUMs: 2092 // AUX_TIMER2_CLKSW_RDY EVSTAT3.AUX_TIMER2_CLKSWITCH_RDY 2093 // AUX_DAC_HOLD_ACTIVE EVSTAT3.AUX_DAC_HOLD_ACTIVE 2094 // AUX_SMPH_AUTOTAKE_DONE EVSTAT3.AUX_SMPH_AUTOTAKE_DONE 2095 // AUX_ADC_FIFO_NOT_EMPTY EVSTAT3.AUX_ADC_FIFO_NOT_EMPTY 2096 // AUX_ADC_FIFO_ALMOST_FULL EVSTAT3.AUX_ADC_FIFO_ALMOST_FULL 2097 // AUX_ADC_IRQ EVSTAT3.AUX_ADC_IRQ 2098 // AUX_ADC_DONE EVSTAT3.AUX_ADC_DONE 2099 // AUX_ISRC_RESET_N EVSTAT3.AUX_ISRC_RESET_N 2100 // AUX_TDC_DONE EVSTAT3.AUX_TDC_DONE 2101 // AUX_TIMER0_EV EVSTAT3.AUX_TIMER0_EV 2102 // AUX_TIMER1_EV EVSTAT3.AUX_TIMER1_EV 2103 // AUX_TIMER2_PULSE EVSTAT3.AUX_TIMER2_PULSE 2104 // AUX_TIMER2_EV3 EVSTAT3.AUX_TIMER2_EV3 2105 // AUX_TIMER2_EV2 EVSTAT3.AUX_TIMER2_EV2 2106 // AUX_TIMER2_EV1 EVSTAT3.AUX_TIMER2_EV1 2107 // AUX_TIMER2_EV0 EVSTAT3.AUX_TIMER2_EV0 2108 // AUX_COMPB EVSTAT2.AUX_COMPB 2109 // AUX_COMPA EVSTAT2.AUX_COMPA 2110 // MCU_OBSMUX1 EVSTAT2.MCU_OBSMUX1 2111 // MCU_OBSMUX0 EVSTAT2.MCU_OBSMUX0 2112 // MCU_EV EVSTAT2.MCU_EV 2113 // ACLK_REF EVSTAT2.ACLK_REF 2114 // VDDR_RECHARGE EVSTAT2.VDDR_RECHARGE 2115 // MCU_ACTIVE EVSTAT2.MCU_ACTIVE 2116 // PWR_DWN EVSTAT2.PWR_DWN 2117 // SCLK_LF EVSTAT2.SCLK_LF 2118 // AON_BATMON_TEMP_UPD EVSTAT2.AON_BATMON_TEMP_UPD 2119 // AON_BATMON_BAT_UPD EVSTAT2.AON_BATMON_BAT_UPD 2120 // AON_RTC_4KHZ EVSTAT2.AON_RTC_4KHZ 2121 // AON_RTC_CH2_DLY EVSTAT2.AON_RTC_CH2_DLY 2122 // AON_RTC_CH2 EVSTAT2.AON_RTC_CH2 2123 // MANUAL_EV EVSTAT2.MANUAL_EV 2124 // AUXIO31 EVSTAT1.AUXIO31 2125 // AUXIO30 EVSTAT1.AUXIO30 2126 // AUXIO29 EVSTAT1.AUXIO29 2127 // AUXIO28 EVSTAT1.AUXIO28 2128 // AUXIO27 EVSTAT1.AUXIO27 2129 // AUXIO26 EVSTAT1.AUXIO26 2130 // AUXIO25 EVSTAT1.AUXIO25 2131 // AUXIO24 EVSTAT1.AUXIO24 2132 // AUXIO23 EVSTAT1.AUXIO23 2133 // AUXIO22 EVSTAT1.AUXIO22 2134 // AUXIO21 EVSTAT1.AUXIO21 2135 // AUXIO20 EVSTAT1.AUXIO20 2136 // AUXIO19 EVSTAT1.AUXIO19 2137 // AUXIO18 EVSTAT1.AUXIO18 2138 // AUXIO17 EVSTAT1.AUXIO17 2139 // AUXIO16 EVSTAT1.AUXIO16 2140 // AUXIO15 EVSTAT0.AUXIO15 2141 // AUXIO14 EVSTAT0.AUXIO14 2142 // AUXIO13 EVSTAT0.AUXIO13 2143 // AUXIO12 EVSTAT0.AUXIO12 2144 // AUXIO11 EVSTAT0.AUXIO11 2145 // AUXIO10 EVSTAT0.AUXIO10 2146 // AUXIO9 EVSTAT0.AUXIO9 2147 // AUXIO8 EVSTAT0.AUXIO8 2148 // AUXIO7 EVSTAT0.AUXIO7 2149 // AUXIO6 EVSTAT0.AUXIO6 2150 // AUXIO5 EVSTAT0.AUXIO5 2151 // AUXIO4 EVSTAT0.AUXIO4 2152 // AUXIO3 EVSTAT0.AUXIO3 2153 // AUXIO2 EVSTAT0.AUXIO2 2154 // AUXIO1 EVSTAT0.AUXIO1 2155 // AUXIO0 EVSTAT0.AUXIO0 2156 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_W 6 2157 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_M 0x0000003F 2158 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_S 0 2159 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TIMER2_CLKSW_RDY 0x0000003F 2160 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_DAC_HOLD_ACTIVE 0x0000003E 2161 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_SMPH_AUTOTAKE_DONE 0x0000003D 2162 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_ADC_FIFO_NOT_EMPTY 0x0000003C 2163 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_ADC_FIFO_ALMOST_FULL 0x0000003B 2164 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_ADC_IRQ 0x0000003A 2165 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_ADC_DONE 0x00000039 2166 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_ISRC_RESET_N 0x00000038 2167 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TDC_DONE 0x00000037 2168 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TIMER0_EV 0x00000036 2169 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TIMER1_EV 0x00000035 2170 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TIMER2_PULSE 0x00000034 2171 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TIMER2_EV3 0x00000033 2172 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TIMER2_EV2 0x00000032 2173 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TIMER2_EV1 0x00000031 2174 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_TIMER2_EV0 0x00000030 2175 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_COMPB 0x0000002F 2176 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUX_COMPA 0x0000002E 2177 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_MCU_OBSMUX1 0x0000002D 2178 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_MCU_OBSMUX0 0x0000002C 2179 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_MCU_EV 0x0000002B 2180 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_ACLK_REF 0x0000002A 2181 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_VDDR_RECHARGE 0x00000029 2182 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_MCU_ACTIVE 0x00000028 2183 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_PWR_DWN 0x00000027 2184 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_SCLK_LF 0x00000026 2185 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AON_BATMON_TEMP_UPD 0x00000025 2186 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AON_BATMON_BAT_UPD 0x00000024 2187 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AON_RTC_4KHZ 0x00000023 2188 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AON_RTC_CH2_DLY 0x00000022 2189 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AON_RTC_CH2 0x00000021 2190 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_MANUAL_EV 0x00000020 2191 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO31 0x0000001F 2192 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO30 0x0000001E 2193 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO29 0x0000001D 2194 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO28 0x0000001C 2195 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO27 0x0000001B 2196 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO26 0x0000001A 2197 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO25 0x00000019 2198 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO24 0x00000018 2199 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO23 0x00000017 2200 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO22 0x00000016 2201 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO21 0x00000015 2202 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO20 0x00000014 2203 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO19 0x00000013 2204 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO18 0x00000012 2205 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO17 0x00000011 2206 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO16 0x00000010 2207 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO15 0x0000000F 2208 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO14 0x0000000E 2209 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO13 0x0000000D 2210 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO12 0x0000000C 2211 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO11 0x0000000B 2212 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO10 0x0000000A 2213 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO9 0x00000009 2214 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO8 0x00000008 2215 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO7 0x00000007 2216 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO6 0x00000006 2217 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO5 0x00000005 2218 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO4 0x00000004 2219 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO3 0x00000003 2220 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO2 0x00000002 2221 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO1 0x00000001 2222 #define AUX_EVCTL_EVOBSCFG_EVOBS_SEL_AUXIO0 0x00000000 2223 2224 //***************************************************************************** 2225 // 2226 // Register: AUX_EVCTL_O_PROGDLY 2227 // 2228 //***************************************************************************** 2229 // Field: [15:0] VALUE 2230 // 2231 // VALUE decrements to 0 at a rate of 1 MHz. 2232 // 2233 // The event AUX_PROG_DLY_IDLE is high when VALUE is 0, otherwise it is low. 2234 // 2235 // Only use the programmable delay counter and the AUX_PROG_DLY_IDLE event when 2236 // AUX_SYSIF:OPMODEACK.ACK equals A or LP. 2237 // 2238 // Decrementation of VALUE halts when either is true: 2239 // - AUX_SCE:CTL.DBG_FREEZE_EN is set and system CPU is halted in debug mode. 2240 // - AUX_SYSIF:TIMERHALT.PROGDLY is set. 2241 #define AUX_EVCTL_PROGDLY_VALUE_W 16 2242 #define AUX_EVCTL_PROGDLY_VALUE_M 0x0000FFFF 2243 #define AUX_EVCTL_PROGDLY_VALUE_S 0 2244 2245 //***************************************************************************** 2246 // 2247 // Register: AUX_EVCTL_O_MANUAL 2248 // 2249 //***************************************************************************** 2250 // Field: [0] EV 2251 // 2252 // This bit field sets the value of EVSTAT2.MANUAL_EV. 2253 #define AUX_EVCTL_MANUAL_EV 0x00000001 2254 #define AUX_EVCTL_MANUAL_EV_BITN 0 2255 #define AUX_EVCTL_MANUAL_EV_M 0x00000001 2256 #define AUX_EVCTL_MANUAL_EV_S 0 2257 2258 //***************************************************************************** 2259 // 2260 // Register: AUX_EVCTL_O_EVSTAT0L 2261 // 2262 //***************************************************************************** 2263 // Field: [7:0] ALIAS_EV 2264 // 2265 // Alias of EVSTAT0 event 7 down to 0. 2266 #define AUX_EVCTL_EVSTAT0L_ALIAS_EV_W 8 2267 #define AUX_EVCTL_EVSTAT0L_ALIAS_EV_M 0x000000FF 2268 #define AUX_EVCTL_EVSTAT0L_ALIAS_EV_S 0 2269 2270 //***************************************************************************** 2271 // 2272 // Register: AUX_EVCTL_O_EVSTAT0H 2273 // 2274 //***************************************************************************** 2275 // Field: [7:0] ALIAS_EV 2276 // 2277 // Alias of EVSTAT0 event 15 down to 8. 2278 #define AUX_EVCTL_EVSTAT0H_ALIAS_EV_W 8 2279 #define AUX_EVCTL_EVSTAT0H_ALIAS_EV_M 0x000000FF 2280 #define AUX_EVCTL_EVSTAT0H_ALIAS_EV_S 0 2281 2282 //***************************************************************************** 2283 // 2284 // Register: AUX_EVCTL_O_EVSTAT1L 2285 // 2286 //***************************************************************************** 2287 // Field: [7:0] ALIAS_EV 2288 // 2289 // Alias of EVSTAT1 event 7 down to 0. 2290 #define AUX_EVCTL_EVSTAT1L_ALIAS_EV_W 8 2291 #define AUX_EVCTL_EVSTAT1L_ALIAS_EV_M 0x000000FF 2292 #define AUX_EVCTL_EVSTAT1L_ALIAS_EV_S 0 2293 2294 //***************************************************************************** 2295 // 2296 // Register: AUX_EVCTL_O_EVSTAT1H 2297 // 2298 //***************************************************************************** 2299 // Field: [7:0] ALIAS_EV 2300 // 2301 // Alias of EVSTAT1 event 15 down to 8. 2302 #define AUX_EVCTL_EVSTAT1H_ALIAS_EV_W 8 2303 #define AUX_EVCTL_EVSTAT1H_ALIAS_EV_M 0x000000FF 2304 #define AUX_EVCTL_EVSTAT1H_ALIAS_EV_S 0 2305 2306 //***************************************************************************** 2307 // 2308 // Register: AUX_EVCTL_O_EVSTAT2L 2309 // 2310 //***************************************************************************** 2311 // Field: [7:0] ALIAS_EV 2312 // 2313 // Alias of EVSTAT2 event 7 down to 0. 2314 #define AUX_EVCTL_EVSTAT2L_ALIAS_EV_W 8 2315 #define AUX_EVCTL_EVSTAT2L_ALIAS_EV_M 0x000000FF 2316 #define AUX_EVCTL_EVSTAT2L_ALIAS_EV_S 0 2317 2318 //***************************************************************************** 2319 // 2320 // Register: AUX_EVCTL_O_EVSTAT2H 2321 // 2322 //***************************************************************************** 2323 // Field: [7:0] ALIAS_EV 2324 // 2325 // Alias of EVSTAT2 event 15 down to 8. 2326 #define AUX_EVCTL_EVSTAT2H_ALIAS_EV_W 8 2327 #define AUX_EVCTL_EVSTAT2H_ALIAS_EV_M 0x000000FF 2328 #define AUX_EVCTL_EVSTAT2H_ALIAS_EV_S 0 2329 2330 //***************************************************************************** 2331 // 2332 // Register: AUX_EVCTL_O_EVSTAT3L 2333 // 2334 //***************************************************************************** 2335 // Field: [7:0] ALIAS_EV 2336 // 2337 // Alias of EVSTAT3 event 7 down to 0. 2338 #define AUX_EVCTL_EVSTAT3L_ALIAS_EV_W 8 2339 #define AUX_EVCTL_EVSTAT3L_ALIAS_EV_M 0x000000FF 2340 #define AUX_EVCTL_EVSTAT3L_ALIAS_EV_S 0 2341 2342 //***************************************************************************** 2343 // 2344 // Register: AUX_EVCTL_O_EVSTAT3H 2345 // 2346 //***************************************************************************** 2347 // Field: [7:0] ALIAS_EV 2348 // 2349 // Alias of EVSTAT3 event 15 down to 8. 2350 #define AUX_EVCTL_EVSTAT3H_ALIAS_EV_W 8 2351 #define AUX_EVCTL_EVSTAT3H_ALIAS_EV_M 0x000000FF 2352 #define AUX_EVCTL_EVSTAT3H_ALIAS_EV_S 0 2353 2354 2355 #endif // __AUX_EVCTL__ 2356
