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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 * 33 ******************************************************************************/ 34 //! \addtogroup i2c_api 35 //! @{ 36 //! \section sec_i2c Introduction 37 //! 38 //! The Inter-Integrated Circuit (\i2c) API provides a set of functions for using 39 //! the \ti_device \i2c master and slave module. Functions are provided to perform 40 //! the following actions: 41 //! - Initialize the \i2c module. 42 //! - Send and receive data. 43 //! - Obtain status. 44 //! - Manage interrupts for the \i2c module. 45 //! 46 //! The \i2c master and slave module provide the ability to communicate to other IC 47 //! devices over an \i2c bus. The \i2c bus is specified to support devices that can 48 //! both transmit and receive (write and read) data. Also, devices on the \i2c bus 49 //! can be designated as either a master or a slave. The \ti_device \i2c module 50 //! supports both sending and receiving data as either a master or a slave, and also 51 //! support the simultaneous operation as both a master and a slave. Finally, the 52 //! \ti_device \i2c module can operate at two speeds: standard (100 kb/s) and fast 53 //! (400 kb/s). 54 //! 55 //! The master and slave \i2c module can generate interrupts. The \i2c master 56 //! module generates interrupts when a transmit or receive operation 57 //! completes (or aborts due to an error). 58 //! The \i2c slave module can generate interrupts when data is 59 //! sent or requested by a master and when a START or STOP condition is present. 60 //! 61 //! \section sec_i2c_master Master Operations 62 //! 63 //! When using this API to drive the \i2c master module, the user must first 64 //! initialize the \i2c master module with a call to \ref I2CMasterInitExpClk(). This 65 //! function sets the bus speed and enables the master module. 66 //! 67 //! The user may transmit or receive data after the successful initialization of 68 //! the \i2c master module. Data is transferred by first setting the slave address 69 //! using \ref I2CMasterSlaveAddrSet(). This function is also used to define whether 70 //! the transfer is a send (a write to the slave from the master) or a receive (a 71 //! read from the slave by the master). Then, if connected to an \i2c bus that has 72 //! multiple masters, the \ti_device \i2c master must first call \ref I2CMasterBusBusy() 73 //! before trying to initiate the desired transaction. After determining that 74 //! the bus is not busy, if trying to send data, the user must call the 75 //! \ref I2CMasterDataPut() function. The transaction can then be initiated on the bus 76 //! by calling the \ref I2CMasterControl() function with any of the following commands: 77 //! - \ref I2C_MASTER_CMD_SINGLE_SEND 78 //! - \ref I2C_MASTER_CMD_SINGLE_RECEIVE 79 //! - \ref I2C_MASTER_CMD_BURST_SEND_START 80 //! - \ref I2C_MASTER_CMD_BURST_RECEIVE_START 81 //! 82 //! Any of these commands result in the master arbitrating for the bus, 83 //! driving the start sequence onto the bus, and sending the slave address and 84 //! direction bit across the bus. The remainder of the transaction can then be 85 //! driven using either a polling or interrupt-driven method. 86 //! 87 //! For the single send and receive cases, the polling method involves looping 88 //! on the return from \ref I2CMasterBusy(). Once the function indicates that the \i2c 89 //! master is no longer busy, the bus transaction is complete and can be 90 //! checked for errors using \ref I2CMasterErr(). If there are no errors, then the data 91 //! has been sent or is ready to be read using \ref I2CMasterDataGet(). For the burst 92 //! send and receive cases, the polling method also involves calling the 93 //! \ref I2CMasterControl() function for each byte transmitted or received 94 //! (using either the \ref I2C_MASTER_CMD_BURST_SEND_CONT or \ref I2C_MASTER_CMD_BURST_RECEIVE_CONT 95 //! commands), and for the last byte sent or received (using either the 96 //! \ref I2C_MASTER_CMD_BURST_SEND_FINISH or \ref I2C_MASTER_CMD_BURST_RECEIVE_FINISH 97 //! commands). 98 //! 99 //! If any error is detected during the burst transfer, 100 //! the appropriate stop command (\ref I2C_MASTER_CMD_BURST_SEND_ERROR_STOP or 101 //! \ref I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP) should be used to call the 102 //! \ref I2CMasterControl() function. 103 //! 104 //! For the interrupt-driven transaction, the user must register an interrupt 105 //! handler for the \i2c devices and enable the \i2c master interrupt; the interrupt 106 //! occurs when the master is no longer busy. 107 //! 108 //! \section sec_i2c_slave Slave Operations 109 //! 110 //! When using this API to drive the \i2c slave module, the user must first 111 //! initialize the \i2c slave module with a call to \ref I2CSlaveInit(). This function 112 //! enables the \i2c slave module and initializes the address of the slave. After the 113 //! initialization completes, the user may poll the slave status using 114 //! \ref I2CSlaveStatus() to determine if a master requested a send or receive 115 //! operation. Depending on the type of operation requested, the user can call 116 //! \ref I2CSlaveDataPut() or \ref I2CSlaveDataGet() to complete the transaction. 117 //! Alternatively, the \i2c slave can handle transactions using an interrupt handler 118 //! registered with \ref I2CIntRegister(), and by enabling the \i2c slave interrupt. 119 //! 120 //! \section sec_i2c_api API 121 //! 122 //! The \i2c API is broken into three groups of functions: 123 //! those that handle status and initialization, those that 124 //! deal with sending and receiving data, and those that deal with 125 //! interrupts. 126 //! 127 //! Status and initialization functions for the \i2c module are: 128 //! - \ref I2CMasterInitExpClk() 129 //! - \ref I2CMasterEnable() 130 //! - \ref I2CMasterDisable() 131 //! - \ref I2CMasterBusBusy() 132 //! - \ref I2CMasterBusy() 133 //! - \ref I2CMasterErr() 134 //! - \ref I2CSlaveInit() 135 //! - \ref I2CSlaveEnable() 136 //! - \ref I2CSlaveDisable() 137 //! - \ref I2CSlaveStatus() 138 //! 139 //! Sending and receiving data from the \i2c module is handled by the following functions: 140 //! - \ref I2CMasterSlaveAddrSet() 141 //! - \ref I2CSlaveAddressSet() 142 //! - \ref I2CMasterControl() 143 //! - \ref I2CMasterDataGet() 144 //! - \ref I2CMasterDataPut() 145 //! - \ref I2CSlaveDataGet() 146 //! - \ref I2CSlaveDataPut() 147 //! 148 //! The \i2c master and slave interrupts are handled by the following functions: 149 //! - \ref I2CIntRegister() 150 //! - \ref I2CIntUnregister() 151 //! - \ref I2CMasterIntEnable() 152 //! - \ref I2CMasterIntDisable() 153 //! - \ref I2CMasterIntClear() 154 //! - \ref I2CMasterIntStatus() 155 //! - \ref I2CSlaveIntEnable() 156 //! - \ref I2CSlaveIntDisable() 157 //! - \ref I2CSlaveIntClear() 158 //! - \ref I2CSlaveIntStatus() 159 //! 160 //! @} 161