1 /****************************************************************************** 2 * Filename: hw_cpu_tiprop_h 3 * Revised: 2018-05-14 12:24:52 +0200 (Mon, 14 May 2018) 4 * Revision: 51990 5 * 6 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions are met: 11 * 12 * 1) Redistributions of source code must retain the above copyright notice, 13 * this list of conditions and the following disclaimer. 14 * 15 * 2) Redistributions in binary form must reproduce the above copyright notice, 16 * this list of conditions and the following disclaimer in the documentation 17 * and/or other materials provided with the distribution. 18 * 19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may 20 * be used to endorse or promote products derived from this software without 21 * specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 27 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 ******************************************************************************/ 36 37 #ifndef __HW_CPU_TIPROP_H__ 38 #define __HW_CPU_TIPROP_H__ 39 40 //***************************************************************************** 41 // 42 // This section defines the register offsets of 43 // CPU_TIPROP component 44 // 45 //***************************************************************************** 46 // Internal 47 #define CPU_TIPROP_O_TRACECLKMUX 0x00000FF8 48 49 //***************************************************************************** 50 // 51 // Register: CPU_TIPROP_O_TRACECLKMUX 52 // 53 //***************************************************************************** 54 // Field: [0] TRACECLK_N_SWV 55 // 56 // Internal. Only to be used through TI provided API. 57 // ENUMs: 58 // TRACECLK Internal. Only to be used through TI provided API. 59 // SWV Internal. Only to be used through TI provided API. 60 #define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV 0x00000001 61 #define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_BITN 0 62 #define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_M 0x00000001 63 #define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_S 0 64 #define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_TRACECLK 0x00000001 65 #define CPU_TIPROP_TRACECLKMUX_TRACECLK_N_SWV_SWV 0x00000000 66 67 68 #endif // __CPU_TIPROP__ 69
