1 /******************************************************************************
2 *  Filename:       hw_aux_sce_h
3 *  Revised:        2018-05-14 12:24:52 +0200 (Mon, 14 May 2018)
4 *  Revision:       51990
5 *
6 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
7 * All rights reserved.
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10 * modification, are permitted provided that the following conditions are met:
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12 * 1) Redistributions of source code must retain the above copyright notice,
13 *    this list of conditions and the following disclaimer.
14 *
15 * 2) Redistributions in binary form must reproduce the above copyright notice,
16 *    this list of conditions and the following disclaimer in the documentation
17 *    and/or other materials provided with the distribution.
18 *
19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
20 *    be used to endorse or promote products derived from this software without
21 *    specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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35 ******************************************************************************/
36 
37 #ifndef __HW_AUX_SCE_H__
38 #define __HW_AUX_SCE_H__
39 
40 //*****************************************************************************
41 //
42 // This section defines the register offsets of
43 // AUX_SCE component
44 //
45 //*****************************************************************************
46 // Internal
47 #define AUX_SCE_O_CTL                                               0x00000000
48 
49 // Internal
50 #define AUX_SCE_O_FETCHSTAT                                         0x00000004
51 
52 // Internal
53 #define AUX_SCE_O_CPUSTAT                                           0x00000008
54 
55 // Internal
56 #define AUX_SCE_O_WUSTAT                                            0x0000000C
57 
58 // Internal
59 #define AUX_SCE_O_REG1_0                                            0x00000010
60 
61 // Internal
62 #define AUX_SCE_O_REG3_2                                            0x00000014
63 
64 // Internal
65 #define AUX_SCE_O_REG5_4                                            0x00000018
66 
67 // Internal
68 #define AUX_SCE_O_REG7_6                                            0x0000001C
69 
70 // Internal
71 #define AUX_SCE_O_LOOPADDR                                          0x00000020
72 
73 // Internal
74 #define AUX_SCE_O_LOOPCNT                                           0x00000024
75 
76 //*****************************************************************************
77 //
78 // Register: AUX_SCE_O_CTL
79 //
80 //*****************************************************************************
81 // Field: [31:24] FORCE_EV_LOW
82 //
83 // Internal. Only to be used through TI provided API.
84 #define AUX_SCE_CTL_FORCE_EV_LOW_W                                           8
85 #define AUX_SCE_CTL_FORCE_EV_LOW_M                                  0xFF000000
86 #define AUX_SCE_CTL_FORCE_EV_LOW_S                                          24
87 
88 // Field: [23:16] FORCE_EV_HIGH
89 //
90 // Internal. Only to be used through TI provided API.
91 #define AUX_SCE_CTL_FORCE_EV_HIGH_W                                          8
92 #define AUX_SCE_CTL_FORCE_EV_HIGH_M                                 0x00FF0000
93 #define AUX_SCE_CTL_FORCE_EV_HIGH_S                                         16
94 
95 // Field:  [15:8] RESET_VECTOR
96 //
97 // Internal. Only to be used through TI provided API.
98 #define AUX_SCE_CTL_RESET_VECTOR_W                                           8
99 #define AUX_SCE_CTL_RESET_VECTOR_M                                  0x0000FF00
100 #define AUX_SCE_CTL_RESET_VECTOR_S                                           8
101 
102 // Field:     [6] DBG_FREEZE_EN
103 //
104 // Internal. Only to be used through TI provided API.
105 #define AUX_SCE_CTL_DBG_FREEZE_EN                                   0x00000040
106 #define AUX_SCE_CTL_DBG_FREEZE_EN_BITN                                       6
107 #define AUX_SCE_CTL_DBG_FREEZE_EN_M                                 0x00000040
108 #define AUX_SCE_CTL_DBG_FREEZE_EN_S                                          6
109 
110 // Field:     [5] FORCE_WU_LOW
111 //
112 // Internal. Only to be used through TI provided API.
113 #define AUX_SCE_CTL_FORCE_WU_LOW                                    0x00000020
114 #define AUX_SCE_CTL_FORCE_WU_LOW_BITN                                        5
115 #define AUX_SCE_CTL_FORCE_WU_LOW_M                                  0x00000020
116 #define AUX_SCE_CTL_FORCE_WU_LOW_S                                           5
117 
118 // Field:     [4] FORCE_WU_HIGH
119 //
120 // Internal. Only to be used through TI provided API.
121 #define AUX_SCE_CTL_FORCE_WU_HIGH                                   0x00000010
122 #define AUX_SCE_CTL_FORCE_WU_HIGH_BITN                                       4
123 #define AUX_SCE_CTL_FORCE_WU_HIGH_M                                 0x00000010
124 #define AUX_SCE_CTL_FORCE_WU_HIGH_S                                          4
125 
126 // Field:     [3] RESTART
127 //
128 // Internal. Only to be used through TI provided API.
129 #define AUX_SCE_CTL_RESTART                                         0x00000008
130 #define AUX_SCE_CTL_RESTART_BITN                                             3
131 #define AUX_SCE_CTL_RESTART_M                                       0x00000008
132 #define AUX_SCE_CTL_RESTART_S                                                3
133 
134 // Field:     [2] SINGLE_STEP
135 //
136 // Internal. Only to be used through TI provided API.
137 #define AUX_SCE_CTL_SINGLE_STEP                                     0x00000004
138 #define AUX_SCE_CTL_SINGLE_STEP_BITN                                         2
139 #define AUX_SCE_CTL_SINGLE_STEP_M                                   0x00000004
140 #define AUX_SCE_CTL_SINGLE_STEP_S                                            2
141 
142 // Field:     [1] SUSPEND
143 //
144 // Internal. Only to be used through TI provided API.
145 #define AUX_SCE_CTL_SUSPEND                                         0x00000002
146 #define AUX_SCE_CTL_SUSPEND_BITN                                             1
147 #define AUX_SCE_CTL_SUSPEND_M                                       0x00000002
148 #define AUX_SCE_CTL_SUSPEND_S                                                1
149 
150 // Field:     [0] CLK_EN
151 //
152 // Internal. Only to be used through TI provided API.
153 #define AUX_SCE_CTL_CLK_EN                                          0x00000001
154 #define AUX_SCE_CTL_CLK_EN_BITN                                              0
155 #define AUX_SCE_CTL_CLK_EN_M                                        0x00000001
156 #define AUX_SCE_CTL_CLK_EN_S                                                 0
157 
158 //*****************************************************************************
159 //
160 // Register: AUX_SCE_O_FETCHSTAT
161 //
162 //*****************************************************************************
163 // Field: [31:16] OPCODE
164 //
165 // Internal. Only to be used through TI provided API.
166 #define AUX_SCE_FETCHSTAT_OPCODE_W                                          16
167 #define AUX_SCE_FETCHSTAT_OPCODE_M                                  0xFFFF0000
168 #define AUX_SCE_FETCHSTAT_OPCODE_S                                          16
169 
170 // Field:  [15:0] PC
171 //
172 // Internal. Only to be used through TI provided API.
173 #define AUX_SCE_FETCHSTAT_PC_W                                              16
174 #define AUX_SCE_FETCHSTAT_PC_M                                      0x0000FFFF
175 #define AUX_SCE_FETCHSTAT_PC_S                                               0
176 
177 //*****************************************************************************
178 //
179 // Register: AUX_SCE_O_CPUSTAT
180 //
181 //*****************************************************************************
182 // Field:    [11] BUS_ERROR
183 //
184 // Internal. Only to be used through TI provided API.
185 #define AUX_SCE_CPUSTAT_BUS_ERROR                                   0x00000800
186 #define AUX_SCE_CPUSTAT_BUS_ERROR_BITN                                      11
187 #define AUX_SCE_CPUSTAT_BUS_ERROR_M                                 0x00000800
188 #define AUX_SCE_CPUSTAT_BUS_ERROR_S                                         11
189 
190 // Field:    [10] SLEEP
191 //
192 // Internal. Only to be used through TI provided API.
193 #define AUX_SCE_CPUSTAT_SLEEP                                       0x00000400
194 #define AUX_SCE_CPUSTAT_SLEEP_BITN                                          10
195 #define AUX_SCE_CPUSTAT_SLEEP_M                                     0x00000400
196 #define AUX_SCE_CPUSTAT_SLEEP_S                                             10
197 
198 // Field:     [9] WEV
199 //
200 // Internal. Only to be used through TI provided API.
201 #define AUX_SCE_CPUSTAT_WEV                                         0x00000200
202 #define AUX_SCE_CPUSTAT_WEV_BITN                                             9
203 #define AUX_SCE_CPUSTAT_WEV_M                                       0x00000200
204 #define AUX_SCE_CPUSTAT_WEV_S                                                9
205 
206 // Field:     [8] HALTED
207 //
208 // Internal. Only to be used through TI provided API.
209 #define AUX_SCE_CPUSTAT_HALTED                                      0x00000100
210 #define AUX_SCE_CPUSTAT_HALTED_BITN                                          8
211 #define AUX_SCE_CPUSTAT_HALTED_M                                    0x00000100
212 #define AUX_SCE_CPUSTAT_HALTED_S                                             8
213 
214 // Field:     [3] V_FLAG
215 //
216 // Internal. Only to be used through TI provided API.
217 #define AUX_SCE_CPUSTAT_V_FLAG                                      0x00000008
218 #define AUX_SCE_CPUSTAT_V_FLAG_BITN                                          3
219 #define AUX_SCE_CPUSTAT_V_FLAG_M                                    0x00000008
220 #define AUX_SCE_CPUSTAT_V_FLAG_S                                             3
221 
222 // Field:     [2] C_FLAG
223 //
224 // Internal. Only to be used through TI provided API.
225 #define AUX_SCE_CPUSTAT_C_FLAG                                      0x00000004
226 #define AUX_SCE_CPUSTAT_C_FLAG_BITN                                          2
227 #define AUX_SCE_CPUSTAT_C_FLAG_M                                    0x00000004
228 #define AUX_SCE_CPUSTAT_C_FLAG_S                                             2
229 
230 // Field:     [1] N_FLAG
231 //
232 // Internal. Only to be used through TI provided API.
233 #define AUX_SCE_CPUSTAT_N_FLAG                                      0x00000002
234 #define AUX_SCE_CPUSTAT_N_FLAG_BITN                                          1
235 #define AUX_SCE_CPUSTAT_N_FLAG_M                                    0x00000002
236 #define AUX_SCE_CPUSTAT_N_FLAG_S                                             1
237 
238 // Field:     [0] Z_FLAG
239 //
240 // Internal. Only to be used through TI provided API.
241 #define AUX_SCE_CPUSTAT_Z_FLAG                                      0x00000001
242 #define AUX_SCE_CPUSTAT_Z_FLAG_BITN                                          0
243 #define AUX_SCE_CPUSTAT_Z_FLAG_M                                    0x00000001
244 #define AUX_SCE_CPUSTAT_Z_FLAG_S                                             0
245 
246 //*****************************************************************************
247 //
248 // Register: AUX_SCE_O_WUSTAT
249 //
250 //*****************************************************************************
251 // Field: [18:16] EXC_VECTOR
252 //
253 // Internal. Only to be used through TI provided API.
254 #define AUX_SCE_WUSTAT_EXC_VECTOR_W                                          3
255 #define AUX_SCE_WUSTAT_EXC_VECTOR_M                                 0x00070000
256 #define AUX_SCE_WUSTAT_EXC_VECTOR_S                                         16
257 
258 // Field:     [8] WU_SIGNAL
259 //
260 // Internal. Only to be used through TI provided API.
261 #define AUX_SCE_WUSTAT_WU_SIGNAL                                    0x00000100
262 #define AUX_SCE_WUSTAT_WU_SIGNAL_BITN                                        8
263 #define AUX_SCE_WUSTAT_WU_SIGNAL_M                                  0x00000100
264 #define AUX_SCE_WUSTAT_WU_SIGNAL_S                                           8
265 
266 // Field:   [7:0] EV_SIGNALS
267 //
268 // Internal. Only to be used through TI provided API.
269 // ENUMs:
270 // SCEWEV_PROG              Internal. Only to be used through TI provided API.
271 // AUX_ADC_FIFO_NOT_EMPTY   Internal. Only to be used through TI provided API.
272 // AUX_TIMER1_EV_OR_IDLE    Internal. Only to be used through TI provided API.
273 // AUX_TIMER0_EV_OR_IDLE    Internal. Only to be used through TI provided API.
274 // AUX_TDC_DONE             Internal. Only to be used through TI provided API.
275 // AUX_COMPB                Internal. Only to be used through TI provided API.
276 // AUX_COMPA                Internal. Only to be used through TI provided API.
277 // AUX_PROG_DLY_IDLE        Internal. Only to be used through TI provided API.
278 #define AUX_SCE_WUSTAT_EV_SIGNALS_W                                          8
279 #define AUX_SCE_WUSTAT_EV_SIGNALS_M                                 0x000000FF
280 #define AUX_SCE_WUSTAT_EV_SIGNALS_S                                          0
281 #define AUX_SCE_WUSTAT_EV_SIGNALS_SCEWEV_PROG                       0x00000080
282 #define AUX_SCE_WUSTAT_EV_SIGNALS_AUX_ADC_FIFO_NOT_EMPTY            0x00000040
283 #define AUX_SCE_WUSTAT_EV_SIGNALS_AUX_TIMER1_EV_OR_IDLE             0x00000020
284 #define AUX_SCE_WUSTAT_EV_SIGNALS_AUX_TIMER0_EV_OR_IDLE             0x00000010
285 #define AUX_SCE_WUSTAT_EV_SIGNALS_AUX_TDC_DONE                      0x00000008
286 #define AUX_SCE_WUSTAT_EV_SIGNALS_AUX_COMPB                         0x00000004
287 #define AUX_SCE_WUSTAT_EV_SIGNALS_AUX_COMPA                         0x00000002
288 #define AUX_SCE_WUSTAT_EV_SIGNALS_AUX_PROG_DLY_IDLE                 0x00000001
289 
290 //*****************************************************************************
291 //
292 // Register: AUX_SCE_O_REG1_0
293 //
294 //*****************************************************************************
295 // Field: [31:16] REG1
296 //
297 // Internal. Only to be used through TI provided API.
298 #define AUX_SCE_REG1_0_REG1_W                                               16
299 #define AUX_SCE_REG1_0_REG1_M                                       0xFFFF0000
300 #define AUX_SCE_REG1_0_REG1_S                                               16
301 
302 // Field:  [15:0] REG0
303 //
304 // Internal. Only to be used through TI provided API.
305 #define AUX_SCE_REG1_0_REG0_W                                               16
306 #define AUX_SCE_REG1_0_REG0_M                                       0x0000FFFF
307 #define AUX_SCE_REG1_0_REG0_S                                                0
308 
309 //*****************************************************************************
310 //
311 // Register: AUX_SCE_O_REG3_2
312 //
313 //*****************************************************************************
314 // Field: [31:16] REG3
315 //
316 // Internal. Only to be used through TI provided API.
317 #define AUX_SCE_REG3_2_REG3_W                                               16
318 #define AUX_SCE_REG3_2_REG3_M                                       0xFFFF0000
319 #define AUX_SCE_REG3_2_REG3_S                                               16
320 
321 // Field:  [15:0] REG2
322 //
323 // Internal. Only to be used through TI provided API.
324 #define AUX_SCE_REG3_2_REG2_W                                               16
325 #define AUX_SCE_REG3_2_REG2_M                                       0x0000FFFF
326 #define AUX_SCE_REG3_2_REG2_S                                                0
327 
328 //*****************************************************************************
329 //
330 // Register: AUX_SCE_O_REG5_4
331 //
332 //*****************************************************************************
333 // Field: [31:16] REG5
334 //
335 // Internal. Only to be used through TI provided API.
336 #define AUX_SCE_REG5_4_REG5_W                                               16
337 #define AUX_SCE_REG5_4_REG5_M                                       0xFFFF0000
338 #define AUX_SCE_REG5_4_REG5_S                                               16
339 
340 // Field:  [15:0] REG4
341 //
342 // Internal. Only to be used through TI provided API.
343 #define AUX_SCE_REG5_4_REG4_W                                               16
344 #define AUX_SCE_REG5_4_REG4_M                                       0x0000FFFF
345 #define AUX_SCE_REG5_4_REG4_S                                                0
346 
347 //*****************************************************************************
348 //
349 // Register: AUX_SCE_O_REG7_6
350 //
351 //*****************************************************************************
352 // Field: [31:16] REG7
353 //
354 // Internal. Only to be used through TI provided API.
355 #define AUX_SCE_REG7_6_REG7_W                                               16
356 #define AUX_SCE_REG7_6_REG7_M                                       0xFFFF0000
357 #define AUX_SCE_REG7_6_REG7_S                                               16
358 
359 // Field:  [15:0] REG6
360 //
361 // Internal. Only to be used through TI provided API.
362 #define AUX_SCE_REG7_6_REG6_W                                               16
363 #define AUX_SCE_REG7_6_REG6_M                                       0x0000FFFF
364 #define AUX_SCE_REG7_6_REG6_S                                                0
365 
366 //*****************************************************************************
367 //
368 // Register: AUX_SCE_O_LOOPADDR
369 //
370 //*****************************************************************************
371 // Field: [31:16] STOP
372 //
373 // Internal. Only to be used through TI provided API.
374 #define AUX_SCE_LOOPADDR_STOP_W                                             16
375 #define AUX_SCE_LOOPADDR_STOP_M                                     0xFFFF0000
376 #define AUX_SCE_LOOPADDR_STOP_S                                             16
377 
378 // Field:  [15:0] START
379 //
380 // Internal. Only to be used through TI provided API.
381 #define AUX_SCE_LOOPADDR_START_W                                            16
382 #define AUX_SCE_LOOPADDR_START_M                                    0x0000FFFF
383 #define AUX_SCE_LOOPADDR_START_S                                             0
384 
385 //*****************************************************************************
386 //
387 // Register: AUX_SCE_O_LOOPCNT
388 //
389 //*****************************************************************************
390 // Field:   [7:0] ITER_LEFT
391 //
392 // Internal. Only to be used through TI provided API.
393 #define AUX_SCE_LOOPCNT_ITER_LEFT_W                                          8
394 #define AUX_SCE_LOOPCNT_ITER_LEFT_M                                 0x000000FF
395 #define AUX_SCE_LOOPCNT_ITER_LEFT_S                                          0
396 
397 
398 #endif // __AUX_SCE__
399