1 /******************************************************************************
2 *  Filename:       hw_aon_ioc_h
3 *  Revised:        2020-02-27 14:31:42 +0100 (Thu, 27 Feb 2020)
4 *  Revision:       56881
5 *
6 * Copyright (c) 2015 - 2017, Texas Instruments Incorporated
7 * All rights reserved.
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10 * modification, are permitted provided that the following conditions are met:
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13 *    this list of conditions and the following disclaimer.
14 *
15 * 2) Redistributions in binary form must reproduce the above copyright notice,
16 *    this list of conditions and the following disclaimer in the documentation
17 *    and/or other materials provided with the distribution.
18 *
19 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
20 *    be used to endorse or promote products derived from this software without
21 *    specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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35 ******************************************************************************/
36 
37 #ifndef __HW_AON_IOC_H__
38 #define __HW_AON_IOC_H__
39 
40 //*****************************************************************************
41 //
42 // This section defines the register offsets of
43 // AON_IOC component
44 //
45 //*****************************************************************************
46 // Internal
47 #define AON_IOC_O_IOSTRMIN                                          0x00000000
48 
49 // Internal
50 #define AON_IOC_O_IOSTRMED                                          0x00000004
51 
52 // Internal
53 #define AON_IOC_O_IOSTRMAX                                          0x00000008
54 
55 // IO Latch Control
56 #define AON_IOC_O_IOCLATCH                                          0x0000000C
57 
58 // SCLK_LF External Output Control
59 #define AON_IOC_O_CLK32KCTL                                         0x00000010
60 
61 // TCK IO Pin Control
62 #define AON_IOC_O_TCKCTL                                            0x00000014
63 
64 //*****************************************************************************
65 //
66 // Register: AON_IOC_O_IOSTRMIN
67 //
68 //*****************************************************************************
69 // Field:   [2:0] GRAY_CODE
70 //
71 // Internal. Only to be used through TI provided API.
72 #define AON_IOC_IOSTRMIN_GRAY_CODE_W                                         3
73 #define AON_IOC_IOSTRMIN_GRAY_CODE_M                                0x00000007
74 #define AON_IOC_IOSTRMIN_GRAY_CODE_S                                         0
75 
76 //*****************************************************************************
77 //
78 // Register: AON_IOC_O_IOSTRMED
79 //
80 //*****************************************************************************
81 // Field:   [2:0] GRAY_CODE
82 //
83 // Internal. Only to be used through TI provided API.
84 #define AON_IOC_IOSTRMED_GRAY_CODE_W                                         3
85 #define AON_IOC_IOSTRMED_GRAY_CODE_M                                0x00000007
86 #define AON_IOC_IOSTRMED_GRAY_CODE_S                                         0
87 
88 //*****************************************************************************
89 //
90 // Register: AON_IOC_O_IOSTRMAX
91 //
92 //*****************************************************************************
93 // Field:   [2:0] GRAY_CODE
94 //
95 // Internal. Only to be used through TI provided API.
96 #define AON_IOC_IOSTRMAX_GRAY_CODE_W                                         3
97 #define AON_IOC_IOSTRMAX_GRAY_CODE_M                                0x00000007
98 #define AON_IOC_IOSTRMAX_GRAY_CODE_S                                         0
99 
100 //*****************************************************************************
101 //
102 // Register: AON_IOC_O_IOCLATCH
103 //
104 //*****************************************************************************
105 // Field:     [0] EN
106 //
107 // Controls latches between MCU IOC and AON_IOC.
108 //
109 // The latches are transparent by default.
110 //
111 // They must be closed prior to power off the domain(s) controlling the IOs in
112 // order to preserve IO values on external pins.
113 // ENUMs:
114 // TRANSP                   Latches are transparent, meaning the value of the
115 //                          IO is directly controlled by the GPIO or
116 //                          peripheral value
117 // STATIC                   Latches are static, meaning the current value on
118 //                          the IO pin is frozen by latches and kept even
119 //                          if GPIO module or a peripheral module is turned
120 //                          off
121 #define AON_IOC_IOCLATCH_EN                                         0x00000001
122 #define AON_IOC_IOCLATCH_EN_BITN                                             0
123 #define AON_IOC_IOCLATCH_EN_M                                       0x00000001
124 #define AON_IOC_IOCLATCH_EN_S                                                0
125 #define AON_IOC_IOCLATCH_EN_TRANSP                                  0x00000001
126 #define AON_IOC_IOCLATCH_EN_STATIC                                  0x00000000
127 
128 //*****************************************************************************
129 //
130 // Register: AON_IOC_O_CLK32KCTL
131 //
132 //*****************************************************************************
133 // Field:     [0] OE_N
134 //
135 // 0: Output enable active. SCLK_LF output on IO pin that has PORT_ID (for
136 // example IOC:IOCFG0.PORT_ID) set to AON_CLK32K.
137 // 1: Output enable not active
138 #define AON_IOC_CLK32KCTL_OE_N                                      0x00000001
139 #define AON_IOC_CLK32KCTL_OE_N_BITN                                          0
140 #define AON_IOC_CLK32KCTL_OE_N_M                                    0x00000001
141 #define AON_IOC_CLK32KCTL_OE_N_S                                             0
142 
143 //*****************************************************************************
144 //
145 // Register: AON_IOC_O_TCKCTL
146 //
147 //*****************************************************************************
148 // Field:     [0] EN
149 //
150 // 0: Input driver for TCK disabled.
151 // 1: Input driver for TCK enabled.
152 #define AON_IOC_TCKCTL_EN                                           0x00000001
153 #define AON_IOC_TCKCTL_EN_BITN                                               0
154 #define AON_IOC_TCKCTL_EN_M                                         0x00000001
155 #define AON_IOC_TCKCTL_EN_S                                                  0
156 
157 
158 #endif // __AON_IOC__
159