1 /******************************************************************************
2 * Filename: i2s.h
3 *
4 * Description: Defines and prototypes for the I2S.
5 *
6 * Copyright (c) 2015 - 2022, Texas Instruments Incorporated
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions are met:
11 *
12 * 1) Redistributions of source code must retain the above copyright notice,
13 * this list of conditions and the following disclaimer.
14 *
15 * 2) Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
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18 *
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20 * be used to endorse or promote products derived from this software without
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22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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35 ******************************************************************************/
36
37 //****************************************************************************
38 //
39 //! \addtogroup peripheral_group
40 //! @{
41 //! \addtogroup i2s_api
42 //! @{
43 //
44 //****************************************************************************
45
46 #ifndef __I2S_H__
47 #define __I2S_H__
48
49 //*****************************************************************************
50 //
51 // If building with a C++ compiler, make all of the definitions in this header
52 // have a C binding.
53 //
54 //*****************************************************************************
55 #ifdef __cplusplus
56 extern "C"
57 {
58 #endif
59
60 #include <stdbool.h>
61 #include <stdint.h>
62 #include "../inc/hw_types.h"
63 #include "../inc/hw_memmap.h"
64 #include "../inc/hw_ints.h"
65 #include "../inc/hw_i2s.h"
66 #include "debug.h"
67 #include "interrupt.h"
68
69 //*****************************************************************************
70 //
71 // Support for DriverLib in ROM:
72 // This section renames all functions that are not "static inline", so that
73 // calling these functions will default to implementation in flash. At the end
74 // of this file a second renaming will change the defaults to implementation in
75 // ROM for available functions.
76 //
77 // To force use of the implementation in flash, e.g. for debugging:
78 // - Globally: Define DRIVERLIB_NOROM at project level
79 // - Per function: Use prefix "NOROM_" when calling the function
80 //
81 //*****************************************************************************
82 #if !defined(DOXYGEN)
83 #define I2SEnable NOROM_I2SEnable
84 #define I2SAudioFormatConfigure NOROM_I2SAudioFormatConfigure
85 #define I2SChannelConfigure NOROM_I2SChannelConfigure
86 #define I2SBufferConfig NOROM_I2SBufferConfig
87 #define I2SPointerUpdate NOROM_I2SPointerUpdate
88 #define I2SPointerSet NOROM_I2SPointerSet
89 #define I2SSampleStampConfigure NOROM_I2SSampleStampConfigure
90 #define I2SSampleStampGet NOROM_I2SSampleStampGet
91 #endif
92
93 //*****************************************************************************
94 //
95 //! \brief A structure that defines an audio control table. Note: Memory for this
96 //! structure \b must be initialized by user application. See detailed description!
97 //!
98 //! \deprecated This structure will be removed in a future release.
99 //!
100 //! These fields are used by the I2S and normally it is not necessary for
101 //! software to directly read or write fields in the table.
102 //!
103 //! \note The control table must be defined by the user as a global variable and
104 //! the global pointer must then be assigned the address of the control table
105 //! inside a user function (but before calling any I2S-function).
106 //!
107 /*!
108 \verbatim
109 I2SControlTable g_controlTable; // Define global
110 g_pControlTable = &g_controlTable; // Assign pointer (inside a function)
111 \endverbatim
112 */
113 //!
114 //
115 //*****************************************************************************
116 #ifndef DEPRECATED
117 typedef struct
118 {
119 uint16_t ui16DMABufSize; //!< Size of DMA buffer in number of samples.
120 uint16_t ui16ChBufSize; //!< Size of Channel buffer.
121 uint8_t ui8InChan; //!< Input Channel.
122 uint8_t ui8OutChan; //!< Output Channel.
123 uint16_t ui16MemLen; //!< Length of the audio words stored in memory.
124 uint32_t ui32InBase; //!< Base address of the input buffer.
125 uint32_t ui32InOffset; //!< Value of the current input pointer offset.
126 uint32_t ui32OutBase; //!< Base address of the output buffer.
127 uint32_t ui32OutOffset; //!< Value of the current output pointer offset.
128 } I2SControlTable;
129 #endif
130
131 //*****************************************************************************
132 //
133 // Declare global pointer to the I2S data structure.
134 //
135 // The control table must be defined by the user as a global variable and the
136 // global pointer must then be assigned the address of the control table:
137 //
138 // I2SControlTable g_controlTable;
139 // g_pControlTable = &g_controlTable;
140 //
141 //*****************************************************************************
142 #ifndef DEPRECATED
143 extern I2SControlTable *g_pControlTable;
144 #endif
145
146 //*****************************************************************************
147 //
148 // Defines for the I2S DMA buffer sizes
149 //
150 //*****************************************************************************
151 #ifndef DEPRECATED
152 #define I2S_DMA_BUF_SIZE_64 0x00000040
153 #define I2S_DMA_BUF_SIZE_128 0x00000080
154 #define I2S_DMA_BUF_SIZE_256 0x00000100
155 #endif
156
157 //*****************************************************************************
158 //
159 // Defines for the I2S audio clock configuration
160 //
161 //*****************************************************************************
162 #ifndef DEPRECATED
163 #define I2S_EXT_WCLK 0x00000001
164 #define I2S_INT_WCLK 0x00000002
165 #define I2S_INVERT_WCLK 0x00000004
166 #define I2S_NORMAL_WCLK 0x00000000
167 #endif
168
169 //*****************************************************************************
170 //
171 // Defines for the audio data line input/output configuration
172 //
173 //*****************************************************************************
174 #ifndef DEPRECATED
175 #define I2S_LINE_UNUSED 0x00000000
176 #define I2S_LINE_INPUT 0x00000001
177 #define I2S_LINE_OUTPUT 0x00000002
178 #define I2S_LINE_MASK 0x00000003
179 #endif
180
181 //*****************************************************************************
182 //
183 // Defines for activating an audio channel.
184 //
185 //*****************************************************************************
186 #ifndef DEPRECATED
187 #define I2S_CHAN0_ACT 0x00000100
188 #define I2S_CHAN1_ACT 0x00000200
189 #define I2S_CHAN2_ACT 0x00000400
190 #define I2S_CHAN3_ACT 0x00000800
191 #define I2S_CHAN4_ACT 0x00001000
192 #define I2S_CHAN5_ACT 0x00002000
193 #define I2S_CHAN6_ACT 0x00004000
194 #define I2S_CHAN7_ACT 0x00008000
195 #define I2S_MONO_MODE 0x00000100
196 #define I2S_STEREO_MODE 0x00000300
197 #define I2S_CHAN_CFG_MASK 0x0000FF00
198 #endif
199
200 #define I2S_CHAN0_MASK 0x00000001
201 #define I2S_CHAN1_MASK 0x00000002
202 #define I2S_CHAN2_MASK 0x00000004
203 #define I2S_CHAN3_MASK 0x00000008
204 #define I2S_CHAN4_MASK 0x00000010
205 #define I2S_CHAN5_MASK 0x00000020
206 #define I2S_CHAN6_MASK 0x00000040
207 #define I2S_CHAN7_MASK 0x00000080
208
209 //*****************************************************************************
210 //
211 // Defines for the audio format configuration
212 //
213 //*****************************************************************************
214 #define I2S_MEM_LENGTH_16 0x00000000 // 16 bit size of word in memory
215 #define I2S_MEM_LENGTH_24 0x00000080 // 24 bit size of word in memory
216 #define I2S_POS_EDGE 0x00000040 // Sample on positive edge
217 #define I2S_NEG_EDGE 0x00000000 // Sample on negative edge
218 #define I2S_DUAL_PHASE_FMT 0x00000020 // Dual Phased audio format
219 #define I2S_SINGLE_PHASE_FMT 0x00000000 // Single Phased audio format
220 #define I2S_WORD_LENGTH_8 0x00000008 // Word length is 8 bits
221 #define I2S_WORD_LENGTH_16 0x00000010 // Word length is 16 bits
222 #define I2S_WORD_LENGTH_24 0x00000018 // Word length is 24 bits
223
224 //*****************************************************************************
225 //
226 // Defines for the sample stamp counters
227 //
228 //*****************************************************************************
229 #ifndef DEPRECATED
230 #define I2S_STMP0 0x00000001 // Sample stamp counter channel 0
231 #define I2S_STMP1 0x00000002 // Sample stamp counter channel 1
232 #endif
233 #define I2S_STMP_SATURATION 0x0000FFFF // The saturation value used when
234 // calculating the sample stamp
235
236 //*****************************************************************************
237 //
238 // Defines for the interrupt
239 //
240 //*****************************************************************************
241 #define I2S_INT_DMA_IN 0x00000020 // DMA output buffer full interrupt
242 #define I2S_INT_DMA_OUT 0x00000010 // DMA input buffer empty interrupt
243 #define I2S_INT_TIMEOUT 0x00000008 // Word Clock Timeout
244 #define I2S_INT_BUS_ERR 0x00000004 // DMA Bus error
245 #define I2S_INT_WCLK_ERR 0x00000002 // Word Clock error
246 #define I2S_INT_PTR_ERR 0x00000001 // Data pointer error (DMA data was not updated in time).
247 #define I2S_INT_ALL 0x0000003F // All interrupts
248
249 //*****************************************************************************
250 //
251 // API Functions and prototypes
252 //
253 //*****************************************************************************
254
255 #ifdef DRIVERLIB_DEBUG
256 //*****************************************************************************
257 //
258 //! \internal
259 //!
260 //! \brief Checks an I2S base address.
261 //!
262 //! This function determines if an I2S port base address is valid.
263 //!
264 //! \param ui32Base is the base address of the I2S port.
265 //!
266 //! \return Returns \c true if the base address is valid and \c false
267 //! otherwise.
268 //
269 //*****************************************************************************
270 static bool
I2SBaseValid(uint32_t ui32Base)271 I2SBaseValid(uint32_t ui32Base)
272 {
273 return(ui32Base == I2S0_BASE);
274 }
275 #endif
276
277 //*****************************************************************************
278 //
279 //! \brief Enables the I2S module for operation.
280 //!
281 //! \deprecated This function will be removed in a future release.
282 //!
283 //! \note The module should only be enabled after configuration. When the
284 //! module is disabled, no data or clocks will be generated on the I2S signals.
285 //!
286 //! \note Immediately after enabling the module the programmer should update
287 //! the DMA data pointer registers using \ref I2SPointerUpdate() to ensure a new
288 //! pointer is written before the DMA transfer completes. Failure to update
289 //! the pointer in time will result in an \ref I2S_INT_PTR_ERR.
290 //!
291 //! \param ui32Base is the I2S module base address.
292 //!
293 //! \return None
294 //
295 //*****************************************************************************
296 #ifndef DEPRECATED
297 extern void I2SEnable(uint32_t ui32Base);
298 #endif
299
300 //*****************************************************************************
301 //
302 //! \brief Disables the I2S module for operation.
303 //!
304 //! \deprecated This function will be removed in a future release.
305 //!
306 //! This function will immediately disable the I2S module. To ensure that
307 //! all buffer operations are completed before shutting down, the correct
308 //! procedure is:
309 //! 1. Do not update the data pointers using \ref I2SPointerUpdate().
310 //! 2. Await next interrupt resulting in \ref I2S_INT_PTR_ERR.
311 //! 3. Disable the I2S using \ref I2SDisable() and clear the pointer error using
312 //! \ref I2SIntClear().
313 //! 4. Disable bit clock source (done externally).
314 //!
315 //! \param ui32Base is the I2S module base address.
316 //!
317 //! \return None
318 //
319 //*****************************************************************************
320 #ifndef DEPRECATED
321 __STATIC_INLINE void
I2SDisable(uint32_t ui32Base)322 I2SDisable(uint32_t ui32Base)
323 {
324 // Check the arguments.
325 ASSERT(I2SBaseValid(ui32Base));
326
327 // Disable the I2S module.
328 HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = 0x0;
329 }
330 #endif
331
332 //*****************************************************************************
333 //
334 //! \brief Configures the I2S module.
335 //!
336 //! \deprecated This function will be removed in a future release.
337 //!
338 //! The word length defines the size of the word transmitted on the data
339 //! lines. For single phased formats \c I2S_WORD_LENGTH_x is the exact number
340 //! of bits per word. In dual phased format this is the maximum number of bits
341 //! per word. The size is set using \ref I2S_WORD_LENGTH_8,
342 //! \ref I2S_WORD_LENGTH_16 or \ref I2S_WORD_LENGTH_24.
343 //!
344 //! \param ui32Base is the I2S module base address.
345 //! \param ui32FmtCfg is the bitwise OR of several options:
346 //! - Sample size:
347 //! - \ref I2S_MEM_LENGTH_16
348 //! - \ref I2S_MEM_LENGTH_24
349 //! - Clock edge sampling:
350 //! - \ref I2S_POS_EDGE
351 //! - \ref I2S_NEG_EDGE
352 //! - Phase:
353 //! - \ref I2S_DUAL_PHASE_FMT
354 //! - \ref I2S_SINGLE_PHASE_FMT
355 //! - Word length:
356 //! - \ref I2S_WORD_LENGTH_8
357 //! - \ref I2S_WORD_LENGTH_16
358 //! - \ref I2S_WORD_LENGTH_24
359 //! \param ui32BitClkDelay defines the bit clock delay by setting the number of bit clock periods between the
360 //! positive word clock edge and the MSB of the first word in a phase. The bit
361 //! clock delay is determined by the ratio between the bit clock and the frame
362 //! clock and the chosen audio format. The bit clock delay \b must be configured
363 //! depending on the chosen audio format:
364 //! - 0 : Left Justified Format (LJF).
365 //! - 1 : I2S and DSP format.
366 //! - 2-255 : Right Justified format (RJF).
367 //!
368 //! \return None
369 //!
370 //! \sa \ref I2SChannelConfigure()
371 //
372 //*****************************************************************************
373 #ifndef DEPRECATED
374 extern void I2SAudioFormatConfigure(uint32_t ui32Base, uint32_t ui32FmtCfg,
375 uint32_t ui32BitClkDelay);
376 #endif
377
378 //****************************************************************************
379 //
380 //! \brief Setup the audio channel configuration.
381 //!
382 //! \deprecated This function will be removed in a future release.
383 //!
384 //! The channel configuration is a bitwise OR of the input/output mode of each
385 //! data line and the active audio channels within a specific audio frame.
386 //!
387 //! Setting up the input/output mode use one of:
388 //! - \ref I2S_LINE_UNUSED
389 //! - \ref I2S_LINE_INPUT
390 //! - \ref I2S_LINE_OUTPUT
391 //!
392 //! For dual phased audio (LJF,RJF,I2S) only mono and stereo modes are allowed.
393 //! For single phased audio format (DSP) up to 8 active channels are allowed
394 //! on a single data line. For setting up the active channels in a frame use:
395 //! - Single phased, use a bitwise OR'ed combination of:
396 //! - \ref I2S_CHAN0_ACT
397 //! - \ref I2S_CHAN1_ACT
398 //! - \ref I2S_CHAN2_ACT
399 //! - \ref I2S_CHAN3_ACT
400 //! - \ref I2S_CHAN4_ACT
401 //! - \ref I2S_CHAN5_ACT
402 //! - \ref I2S_CHAN6_ACT
403 //! - \ref I2S_CHAN7_ACT
404 //! - Dual phased, use one of:
405 //! - \ref I2S_MONO_MODE (same as \ref I2S_CHAN0_ACT)
406 //! - \ref I2S_STEREO_MODE (same as \ref I2S_CHAN0_ACT | \ref I2S_CHAN1_ACT)
407 //!
408 //! \note The audio format and the clock configuration should be set using
409 //! \ref I2SAudioFormatConfigure()
410 //!
411 //! \param ui32Base is base address of the I2S module.
412 //! \param ui32Chan0Cfg defines the channel configuration for data line 0.
413 //! \param ui32Chan1Cfg defines the channel configuration for data line 1.
414 //!
415 //! \return None
416 //!
417 //! \sa \ref I2SAudioFormatConfigure()
418 //
419 //****************************************************************************
420 #ifndef DEPRECATED
421 extern void I2SChannelConfigure(uint32_t ui32Base, uint32_t ui32Chan0Cfg,
422 uint32_t ui32Chan1Cfg);
423 #endif
424
425 //****************************************************************************
426 //
427 //! \brief Configure the I2S frame clock.
428 //!
429 //! \deprecated This function will be removed in a future release.
430 //!
431 //! Configure I2S clock to be either internal or external and either normal
432 //! or inverted.
433 //!
434 //! \note The bit clock configuration is done externally, but the internal/
435 //! external setting must match what is chosen internally in the I2S module
436 //! for the frame clock.
437 //!
438 //! \param ui32Base is the base address of the I2S module.
439 //! \param ui32ClkConfig is the clock configuration parameter. Bitwise OR'ed
440 //! combination of clock source and clock polarity:
441 //! - Clock source:
442 //! - \ref I2S_EXT_WCLK : External clock.
443 //! - \ref I2S_INT_WCLK : Internal clock.
444 //! - Clock polarity:
445 //! - \ref I2S_NORMAL_WCLK : Normal clock.
446 //! - \ref I2S_INVERT_WCLK : Inverted clock.
447 //!
448 //! \return None
449 //
450 //****************************************************************************
451 #ifndef DEPRECATED
452 __STATIC_INLINE void
I2SClockConfigure(uint32_t ui32Base,uint32_t ui32ClkConfig)453 I2SClockConfigure(uint32_t ui32Base, uint32_t ui32ClkConfig)
454 {
455 // Check the arguments.
456 ASSERT(I2SBaseValid(ui32Base));
457
458 // Setup register WCLK Source.
459 HWREG(I2S0_BASE + I2S_O_AIFWCLKSRC) = ui32ClkConfig &
460 (I2S_AIFWCLKSRC_WCLK_INV_M |
461 I2S_AIFWCLKSRC_WCLK_SRC_M);
462 }
463 #endif
464
465 //****************************************************************************
466 //
467 //! \brief Set the input buffer pointers.
468 //!
469 //! \deprecated This function will be removed in a future release.
470 //!
471 //! The next pointer should always be written while the DMA is using the
472 //! previous written pointer. If not written in time an \ref I2S_INT_PTR_ERR will
473 //! occur and all outputs will be disabled.
474 //!
475 //! \note At startup the next data pointer should be
476 //! written just before and just after calling the \ref I2SEnable().
477 //!
478 //! \param ui32Base is the base address of the I2S module.
479 //! \param ui32InBufBase is the address of the input buffer.
480 //! \param ui32OutBufBase is the address of the output buffer.
481 //! \param ui16DMABufSize is the size of the DMA buffers. Must be greater than 0!
482 //! \param ui16ChanBufSize is the size of the channel buffers.
483 //!
484 //! \return None
485 //
486 //****************************************************************************
487 #ifndef DEPRECATED
488 extern void I2SBufferConfig(uint32_t ui32Base, uint32_t ui32InBufBase,
489 uint32_t ui32OutBufBase, uint16_t ui16DMABufSize,
490 uint16_t ui16ChanBufSize);
491 #endif
492
493 //****************************************************************************
494 //
495 //! \brief Update the buffer pointers.
496 //!
497 //! \deprecated This function will be removed in a future release.
498 //!
499 //! The next pointer should always be written while the DMA is using the
500 //! previous written pointer. If not written in time an \ref I2S_INT_PTR_ERR will occur
501 //! and all outputs will be disabled. Nothing is preventing the pointers from
502 //! being identical, but this function relies on both pointers (input or
503 //! output pointers) are pointing to a valid address.
504 //!
505 //! \note It is recommended that the pointer update is done in an interrupt context
506 //! to ensure that the update is performed before the buffer is full.
507 //!
508 //! \param ui32Base is the base address of the I2S module.
509 //! \param bInput determines whether to update input or output pointer.
510 //! - \c true : Update input pointer.
511 //! - \c false : Update output pointer
512 //!
513 //! \return None
514 //!
515 //! \sa \ref I2SPointerSet()
516 //
517 //****************************************************************************
518 #ifndef DEPRECATED
519 extern void I2SPointerUpdate(uint32_t ui32Base, bool bInput);
520 #endif
521
522 //****************************************************************************
523 //
524 //! \brief Set a buffer pointer (input or output) directly.
525 //!
526 //! \deprecated This function will be removed in a future release.
527 //!
528 //! This function allows bypassing of the pointers in the global control table.
529 //!
530 //! The next pointer should always be written while the DMA is using the
531 //! previous written pointer. If not written in time an \ref I2S_INT_PTR_ERR will occur
532 //! and all outputs will be disabled. Nothing is preventing the pointers from
533 //! being identical, but this function relies on both pointers (input or
534 //! output pointers) are pointing to a valid address.
535 //!
536 //! \note It is recommended that the pointer update is done in an interrupt context
537 //! to ensure that the update is performed before the buffer is full.
538 //!
539 //! \param ui32Base is the base address of the I2S module.
540 //! \param bInput determines whether to update input or output pointer.
541 //! - \c true : Update input pointer.
542 //! - \c false : Update output pointer
543 //! \param pNextPointer is a void pointer to user defined buffer.
544 //!
545 //! \return None
546 //!
547 //! \sa \ref I2SPointerUpdate()
548 //
549 //****************************************************************************
550 #ifndef DEPRECATED
551 extern void I2SPointerSet(uint32_t ui32Base, bool bInput, void * pNextPointer);
552 #endif
553
554 //*****************************************************************************
555 //
556 //! \brief Registers an interrupt handler for an I2S interrupt in the dynamic interrupt table.
557 //!
558 //! \deprecated This function will be removed in a future release.
559 //!
560 //! \note Only use this function if you want to use the dynamic vector table (in SRAM)!
561 //!
562 //! This function registers a function as the interrupt handler for a specific
563 //! interrupt and enables the corresponding interrupt in the interrupt controller.
564 //!
565 //! Specific I2S interrupts must be enabled via \ref I2SIntEnable(). It is the interrupt
566 //! handler's responsibility to clear the interrupt source.
567 //!
568 //! \param ui32Base is the base address of the I2S module.
569 //! \param pfnHandler is a pointer to the function to be called when the
570 //! I2S interrupt occurs.
571 //!
572 //! \return None
573 //!
574 //! \sa \ref IntRegister() for important information about registering interrupt
575 //! handlers.
576 //
577 //*****************************************************************************
578 #ifndef DEPRECATED
579 __STATIC_INLINE void
I2SIntRegister(uint32_t ui32Base,void (* pfnHandler)(void))580 I2SIntRegister(uint32_t ui32Base, void (*pfnHandler)(void))
581 {
582 // Check the arguments.
583 ASSERT(I2SBaseValid(ui32Base));
584
585 // Register the interrupt handler.
586 IntRegister(INT_I2S_IRQ, pfnHandler);
587
588 // Enable the I2S interrupt.
589 IntEnable(INT_I2S_IRQ);
590 }
591 #endif
592
593 //*****************************************************************************
594 //
595 //! \brief Unregisters an interrupt handler for a I2S interrupt in the dynamic interrupt table.
596 //!
597 //! \deprecated This function will be removed in a future release.
598 //!
599 //! This function does the actual unregistering of the interrupt handler. It
600 //! clears the handler to be called when an I2S interrupt occurs. This
601 //! function also masks off the interrupt in the interrupt controller so that
602 //! the interrupt handler no longer is called.
603 //!
604 //! \param ui32Base is the base address of the I2S port.
605 //!
606 //! \return None
607 //!
608 //! \sa \ref IntRegister() for important information about registering interrupt
609 //! handlers.
610 //
611 //*****************************************************************************
612 #ifndef DEPRECATED
613 __STATIC_INLINE void
I2SIntUnregister(uint32_t ui32Base)614 I2SIntUnregister(uint32_t ui32Base)
615 {
616 // Check the arguments.
617 ASSERT(I2SBaseValid(ui32Base));
618
619 // Disable the interrupt.
620 IntDisable(INT_I2S_IRQ);
621
622 // Unregister the interrupt handler.
623 IntUnregister(INT_I2S_IRQ);
624 }
625 #endif
626
627 //*****************************************************************************
628 //
629 //! \brief Configure the sample stamp generator.
630 //!
631 //! \deprecated This function will be removed in a future release.
632 //!
633 //! Use this function to configure the sample stamp generator.
634 //!
635 //! \param ui32Base is the base address of the I2S module.
636 //! \param bInput enables triggering of the sample stamp generator on input.
637 //! \param bOutput enables triggering of the sample stamp generator on output.
638 //!
639 //! \return None
640 //
641 //*****************************************************************************
642 #ifndef DEPRECATED
643 extern void I2SSampleStampConfigure(uint32_t ui32Base, bool bInput,
644 bool bOutput);
645 #endif
646
647 //*****************************************************************************
648 //
649 //! \brief Enables individual I2S interrupt sources.
650 //!
651 //! This function enables the indicated I2S interrupt sources. Only the
652 //! sources that are enabled can be reflected to the processor interrupt;
653 //! disabled sources have no effect on the processor.
654 //!
655 //! \param ui32Base is the base address of the I2S port.
656 //! \param ui32IntFlags is the bit mask of the interrupt sources to be enabled.
657 //! The parameter is the bitwise OR of any of the following:
658 //! - \ref I2S_INT_DMA_IN
659 //! - \ref I2S_INT_DMA_OUT
660 //! - \ref I2S_INT_TIMEOUT
661 //! - \ref I2S_INT_BUS_ERR
662 //! - \ref I2S_INT_WCLK_ERR
663 //! - \ref I2S_INT_PTR_ERR
664 //! - \ref I2S_INT_ALL (covers all the above)
665 //!
666 //! \return None.
667 //
668 //*****************************************************************************
669 __STATIC_INLINE void
I2SIntEnable(uint32_t ui32Base,uint32_t ui32IntFlags)670 I2SIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags)
671 {
672 // Check the arguments.
673 ASSERT(I2SBaseValid(ui32Base));
674
675 // Enable the specified interrupts.
676 HWREG(I2S0_BASE + I2S_O_IRQMASK) |= ui32IntFlags;
677 }
678
679 //*****************************************************************************
680 //
681 //! \brief Disables individual I2S interrupt sources.
682 //!
683 //! This function disables the indicated I2S interrupt sources. Only the
684 //! sources that are enabled can be reflected to the processor interrupt;
685 //! disabled sources have no effect on the processor.
686 //!
687 //! \param ui32Base is the base address of the I2S port.
688 //! \param ui32IntFlags is the bit mask of the interrupt sources to be disabled.
689 //! The parameter is the bitwise OR of any of the following:
690 //! - \ref I2S_INT_DMA_IN
691 //! - \ref I2S_INT_DMA_OUT
692 //! - \ref I2S_INT_TIMEOUT
693 //! - \ref I2S_INT_BUS_ERR
694 //! - \ref I2S_INT_WCLK_ERR
695 //! - \ref I2S_INT_PTR_ERR
696 //! - \ref I2S_INT_ALL (covers all the above)
697 //!
698 //! \return None.
699 //
700 //*****************************************************************************
701 __STATIC_INLINE void
I2SIntDisable(uint32_t ui32Base,uint32_t ui32IntFlags)702 I2SIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags)
703 {
704 // Check the arguments.
705 ASSERT(I2SBaseValid(ui32Base));
706
707 // Disable the specified interrupts.
708 HWREG(I2S0_BASE + I2S_O_IRQMASK) &= ~ui32IntFlags;
709 }
710
711 //*****************************************************************************
712 //
713 //! \brief Gets the current interrupt status.
714 //!
715 //! This function returns the interrupt status for the specified I2S. Either
716 //! the raw interrupt status or the status of interrupts that are allowed to
717 //! reflect to the processor can be returned.
718 //!
719 //! \param ui32Base is the base address of the I2S port
720 //! \param bMasked selects between raw and masked interrupt status:
721 //! - \c false : Raw interrupt status is required.
722 //! - \c true : Masked interrupt status is required.
723 //!
724 //! \return Returns the current interrupt status as a vector of:
725 //! - \ref I2S_INT_DMA_IN
726 //! - \ref I2S_INT_DMA_OUT
727 //! - \ref I2S_INT_TIMEOUT
728 //! - \ref I2S_INT_BUS_ERR
729 //! - \ref I2S_INT_WCLK_ERR
730 //! - \ref I2S_INT_PTR_ERR
731 //
732 //*****************************************************************************
733 __STATIC_INLINE uint32_t
I2SIntStatus(uint32_t ui32Base,bool bMasked)734 I2SIntStatus(uint32_t ui32Base, bool bMasked)
735 {
736 uint32_t ui32Mask;
737
738 // Check the arguments.
739 ASSERT(I2SBaseValid(ui32Base));
740
741 // Return either the interrupt status or the raw interrupt status as
742 // requested.
743 if(bMasked)
744 {
745 ui32Mask = HWREG(I2S0_BASE + I2S_O_IRQFLAGS);
746 return(ui32Mask & HWREG(I2S0_BASE + I2S_O_IRQMASK));
747 }
748 else
749 {
750 return(HWREG(I2S0_BASE + I2S_O_IRQFLAGS));
751 }
752 }
753
754 //*****************************************************************************
755 //
756 //! \brief Clears I2S interrupt sources.
757 //!
758 //! The specified I2S interrupt sources are cleared, so that they no longer
759 //! assert. This function must be called in the interrupt handler to keep the
760 //! interrupt from being recognized again immediately upon exit.
761 //!
762 //! \note Due to write buffers and synchronizers in the system it may take several
763 //! clock cycles from a register write clearing an event in a module and until the
764 //! event is actually cleared in the NVIC of the system CPU. It is recommended to
765 //! clear the event source early in the interrupt service routine (ISR) to allow
766 //! the event clear to propagate to the NVIC before returning from the ISR.
767 //! At the same time, an early event clear allows new events of the same type to be
768 //! pended instead of ignored if the event is cleared later in the ISR.
769 //! It is the responsibility of the programmer to make sure that enough time has passed
770 //! before returning from the ISR to avoid false re-triggering of the cleared event.
771 //! A simple, although not necessarily optimal, way of clearing an event before
772 //! returning from the ISR is:
773 //! -# Write to clear event (interrupt source). (buffered write)
774 //! -# Dummy read from the event source module. (making sure the write has propagated)
775 //! -# Wait two system CPU clock cycles (user code or two NOPs). (allowing cleared event to propagate through any synchronizers)
776 //!
777 //! \param ui32Base is the base address of the I2S port.
778 //! \param ui32IntFlags is a bit mask of the interrupt sources to be cleared.
779 //! The parameter is the bitwise OR of any of the following:
780 //! - \ref I2S_INT_DMA_IN
781 //! - \ref I2S_INT_DMA_OUT
782 //! - \ref I2S_INT_TIMEOUT
783 //! - \ref I2S_INT_BUS_ERR
784 //! - \ref I2S_INT_WCLK_ERR
785 //! - \ref I2S_INT_PTR_ERR
786 //! - \ref I2S_INT_ALL (covers all the above)
787 //!
788 //! \return None
789 //
790 //*****************************************************************************
791 __STATIC_INLINE void
I2SIntClear(uint32_t ui32Base,uint32_t ui32IntFlags)792 I2SIntClear(uint32_t ui32Base, uint32_t ui32IntFlags)
793 {
794 // Check the arguments.
795 ASSERT(I2SBaseValid(ui32Base));
796
797 // Clear the requested interrupt sources.
798 HWREG(I2S0_BASE + I2S_O_IRQCLR) = ui32IntFlags;
799 }
800
801 //*****************************************************************************
802 //
803 //! \brief Enable the Sample Stamp generator.
804 //!
805 //! Use this function to enable the sample stamp generators.
806 //!
807 //! \note It is the user's responsibility to ensure that the sample stamp
808 //! generator is properly configured before it is enabled. It is the setting
809 //! of the Input and Output triggers configured using \ref I2SSampleStampConfigure()
810 //! that triggers the start point of the audio streams.
811 //!
812 //! \return None
813 //
814 //*****************************************************************************
815 __STATIC_INLINE void
I2SSampleStampEnable(uint32_t ui32Base)816 I2SSampleStampEnable(uint32_t ui32Base)
817 {
818 // Check the arguments.
819 ASSERT(I2SBaseValid(ui32Base));
820
821 // Set the enable bit.
822 HWREG(I2S0_BASE + I2S_O_STMPCTL) = I2S_STMPCTL_STMP_EN;
823 }
824
825 //*****************************************************************************
826 //
827 //! \brief Disable the Sample Stamp generator.
828 //!
829 //! Use this function to disable the sample stamp generators. When the sample
830 //! stamp generator is disabled, the clock counters are automatically cleared.
831 //!
832 //! \return None
833 //
834 //*****************************************************************************
835 __STATIC_INLINE void
I2SSampleStampDisable(uint32_t ui32Base)836 I2SSampleStampDisable(uint32_t ui32Base)
837 {
838 // Check the arguments.
839 ASSERT(I2SBaseValid(ui32Base));
840
841 // Clear the enable bit.
842 HWREG(I2S0_BASE + I2S_O_STMPCTL) = 0;
843
844 }
845
846 //*****************************************************************************
847 //
848 //! \brief Get the current value of a sample stamp counter.
849 //!
850 //! \param ui32Base is the base address of the I2S module.
851 //! \param ui32Channel is the sample stamp counter to sample
852 //!
853 //! \return Returns the current value of the selected sample stamp channel.
854 //
855 //*****************************************************************************
856 extern uint32_t I2SSampleStampGet(uint32_t ui32Base, uint32_t ui32Channel);
857
858 //*****************************************************************************
859 //
860 //! \brief Starts the I2S.
861 //!
862 //! I2S must be configured before it is started.
863 //!
864 //! \note Immediately after enabling the module the programmer must update
865 //! the DMA data pointer registers using \ref I2SInPointerSet() and
866 //! \ref I2SOutPointerSet() to ensure a new pointer is written before the DMA
867 //! transfer completes. Failure to update the pointer in time will result in
868 //! an \ref I2S_INT_PTR_ERR.
869 //!
870 //! \param ui32Base is the I2S module base address.
871 //! \param ui8FixDMALength is the length of the DMA buffer: this will allow
872 //! the DMA to read ui8FixDMALength between to pointer refreshes.
873 //!
874 //! \return None
875 //!
876 //! \sa \ref I2SStop()
877 //
878 //*****************************************************************************
I2SStart(uint32_t ui32Base,uint8_t ui8FixDMALength)879 __STATIC_INLINE void I2SStart(uint32_t ui32Base, uint8_t ui8FixDMALength)
880 {
881 // Check the arguments.
882 ASSERT(I2SBaseValid(ui32Base));
883
884 // Enable the I2S module.
885 HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = ui8FixDMALength;
886 }
887
888 //*****************************************************************************
889 //
890 //! \brief Stops the I2S module for operation.
891 //!
892 //! This function will immediately disable the I2S module. To ensure that
893 //! all buffer operations are completed before shutting down, the correct
894 //! procedure is:
895 //! 1. Do not update the data pointers using \ref I2SInPointerSet() and
896 //! \ref I2SOutPointerSet().
897 //! 2. Await that values returned by \ref I2SInPointerNextGet(),
898 //! \ref I2SOutPointerNextGet(), \ref I2SInPointerGet() and \ref I2SOutPointerGet()
899 //! are zero.
900 //! 3. Disable the I2S using \ref I2SStop() and clear the pointer
901 //! error using \ref I2SIntClear().
902 //! 4. Disable bit clock source (done externally).
903 //!
904 //! \param ui32Base is the I2S module base address.
905 //!
906 //! \return None
907 //!
908 //! \sa \ref I2SStart()
909 //
910 //*****************************************************************************
I2SStop(uint32_t ui32Base)911 __STATIC_INLINE void I2SStop(uint32_t ui32Base)
912 {
913 // Check the arguments.
914 ASSERT(I2SBaseValid(ui32Base));
915
916 // Disable the I2S module.
917 HWREG(I2S0_BASE + I2S_O_AIFDMACFG) = 0x00;
918 }
919
920 //*****************************************************************************
921 //
922 //! \brief Configure the serial format of the I2S module.
923 //!
924 //! The word length defines the size of the word transmitted on the data
925 //! lines. For single phased formats \c ui8BitsPerSample is the exact number
926 //! of bits per word. In dual phased format this is the maximum number of bits
927 //! per word.
928 //!
929 //! \param ui32Base is the I2S module base address.
930 //! \param ui8iDataDelay is the number of BCLK periods between the first WCLK
931 //! edge and the MSB of the first audio channel data transferred during
932 //! the phase.
933 //! \param ui8iMemory24Bits selects if the samples in memory are coded on 16 bits
934 //! or 24 bits. Possible values are:
935 //! - \ref I2S_MEM_LENGTH_16
936 //! - \ref I2S_MEM_LENGTH_24
937 //! \param ui8iSamplingEdge selects if sampling on falling or rising edges.
938 //! Possible values are:
939 //! - \ref I2S_NEG_EDGE
940 //! - \ref I2S_POS_EDGE
941 //! \param boolDualPhase must be set to true for dual phase and to false for
942 //! single phase and user-defined phase.
943 //! \param ui8BitsPerSample is the number of bits transmitted for each sample.
944 //! If this number does not match with the memory length selected
945 //! (16 bits or 24 bits), samples will be truncated or padded.
946 //! \param ui16transmissionDelay is the number of WCLK periods before the first
947 //! transmission.
948 //!
949 //! \return None
950 //!
951 //! \sa \ref I2SFrameConfigure()
952 //
953 //*****************************************************************************
954 __STATIC_INLINE void
I2SFormatConfigure(uint32_t ui32Base,uint8_t ui8iDataDelay,uint8_t ui8iMemory24Bits,uint8_t ui8iSamplingEdge,bool boolDualPhase,uint8_t ui8BitsPerSample,uint16_t ui16transmissionDelay)955 I2SFormatConfigure(uint32_t ui32Base,
956 uint8_t ui8iDataDelay,
957 uint8_t ui8iMemory24Bits,
958 uint8_t ui8iSamplingEdge,
959 bool boolDualPhase,
960 uint8_t ui8BitsPerSample,
961 uint16_t ui16transmissionDelay)
962 {
963 // Check the arguments.
964 ASSERT(I2SBaseValid(ui32Base));
965 ASSERT(ui8BitsPerSample <= 24); // Max. I2S_AIFFMTCFG_WORD_LEN
966 ASSERT(ui8BitsPerSample >= 8); // Min. I2S_AIFFMTCFG_WORD_LEN
967
968 // Setup register AIFFMTCFG Source.
969 HWREGH(I2S0_BASE + I2S_O_AIFFMTCFG) =
970 (ui8iDataDelay << I2S_AIFFMTCFG_DATA_DELAY_S) |
971 (ui8iMemory24Bits << I2S_AIFFMTCFG_MEM_LEN_24_S) |
972 (ui8iSamplingEdge << I2S_AIFFMTCFG_SMPL_EDGE_S ) |
973 (boolDualPhase << I2S_AIFFMTCFG_DUAL_PHASE_S) |
974 (ui8BitsPerSample << I2S_AIFFMTCFG_WORD_LEN_S );
975
976 // Number of WCLK periods before the first read / write
977 HWREGH(I2S0_BASE + I2S_O_STMPWPER) = ui16transmissionDelay;
978 }
979
980 //****************************************************************************
981 //
982 //! \brief Setup the two interfaces SD0 and SD1 (also called AD0 and AD1).
983 //!
984 //! This function sets interface's direction and activated channels.
985 //!
986 //! \param ui32Base is base address of the I2S module.
987 //! \param ui8StatusAD0 defines the usage of AD0
988 //! 0x00: AD0 is disabled
989 //! 0x01, AD0 is an input
990 //! 0x02, AD0 is an output
991 //! \param ui8ChanAD0 defines the channel mask for AD0.
992 //! Use a bitwise OR'ed combination of:
993 //! - \ref I2S_CHAN0_MASK
994 //! - \ref I2S_CHAN1_MASK
995 //! - \ref I2S_CHAN2_MASK
996 //! - \ref I2S_CHAN3_MASK
997 //! - \ref I2S_CHAN4_MASK
998 //! - \ref I2S_CHAN5_MASK
999 //! - \ref I2S_CHAN6_MASK
1000 //! - \ref I2S_CHAN7_MASK
1001 //! \param ui8StatusAD1 defines the usage of AD1
1002 //! 0x00: AD1 is disabled
1003 //! 0x10, AD1 is an input
1004 //! 0x20, AD1 is an output
1005 //! \param ui8ChanAD1 defines the channel mask for AD1.
1006 //! Use a bitwise OR'ed combination of:
1007 //! - \ref I2S_CHAN0_MASK
1008 //! - \ref I2S_CHAN1_MASK
1009 //! - \ref I2S_CHAN2_MASK
1010 //! - \ref I2S_CHAN3_MASK
1011 //! - \ref I2S_CHAN4_MASK
1012 //! - \ref I2S_CHAN5_MASK
1013 //! - \ref I2S_CHAN6_MASK
1014 //! - \ref I2S_CHAN7_MASK
1015 //!
1016 //! \return None
1017 //!
1018 //! \sa \ref I2SFormatConfigure()
1019 //
1020 //****************************************************************************
1021 __STATIC_INLINE void
I2SFrameConfigure(uint32_t ui32Base,uint8_t ui8StatusAD0,uint8_t ui8ChanAD0,uint8_t ui8StatusAD1,uint8_t ui8ChanAD1)1022 I2SFrameConfigure(uint32_t ui32Base,
1023 uint8_t ui8StatusAD0, uint8_t ui8ChanAD0,
1024 uint8_t ui8StatusAD1, uint8_t ui8ChanAD1)
1025 {
1026 // Check the arguments.
1027 ASSERT(I2SBaseValid(ui32Base));
1028
1029 // Configure input/output channels.
1030 HWREGB(I2S0_BASE + I2S_O_AIFDIRCFG) = (ui8StatusAD0 | ui8StatusAD1);
1031
1032 // Configure the valid channel mask.
1033 HWREGB(I2S0_BASE + I2S_O_AIFWMASK0) = ui8ChanAD0;
1034 HWREGB(I2S0_BASE + I2S_O_AIFWMASK1) = ui8ChanAD1;
1035 }
1036
1037 //****************************************************************************
1038 //
1039 //! \brief Configure the I2S frame clock (also called WCLK or WS).
1040 //!
1041 //! Configure WCLK clock to be either internal (master) or external (slave).
1042 //! Configure WCLK clock either normal or inverted.
1043 //!
1044 //! \note The bit clock configuration is done externally, but the internal/
1045 //! external setting must match what is chosen internally in the I2S module
1046 //! for the frame clock.
1047 //!
1048 //! \param ui32Base is the base address of the I2S module.
1049 //! \param boolMaster false: the device is a slave (external clock)
1050 //! true: the device is a master (internal clock)
1051 //! \param boolWCLKInvert false: WCLK is not inverted
1052 //! true: WCLK is internally inverted
1053 //!
1054 //! \return None
1055 //
1056 //****************************************************************************
1057 __STATIC_INLINE void
I2SWclkConfigure(uint32_t ui32Base,bool boolMaster,bool boolWCLKInvert)1058 I2SWclkConfigure(uint32_t ui32Base,
1059 bool boolMaster,
1060 bool boolWCLKInvert)
1061 {
1062 // if(boolMaster == 0) then ui8ClkSource = 1
1063 // if(boolMaster == 1) then ui8ClkSource = 2
1064 uint8_t ui8ClkSource = (uint8_t)boolMaster + 0x01;
1065
1066 // Check the arguments.
1067 ASSERT(I2SBaseValid(ui32Base));
1068 ASSERT(ui8ClkSource < I2S_AIFWCLKSRC_WCLK_SRC_RESERVED);
1069
1070 // Setup register WCLK Source.
1071 HWREGB(I2S0_BASE + I2S_O_AIFWCLKSRC) =
1072 ((ui8ClkSource << I2S_AIFWCLKSRC_WCLK_SRC_S) |
1073 (boolWCLKInvert << I2S_AIFWCLKSRC_WCLK_INV_S ));
1074 }
1075
1076 //****************************************************************************
1077 //
1078 //! \brief Set the input buffer pointer.
1079 //!
1080 //! The next pointer should always be written while the DMA is using the
1081 //! previous written pointer. If not written in time an \ref I2S_INT_PTR_ERR
1082 //! will occur and all inputs and outputs will be disabled.
1083 //! This function relies on pointer is pointing to a valid address.
1084 //!
1085 //! \note It is recommended that the pointer update is done in an interrupt context
1086 //! to ensure that the update is performed before the buffer is full.
1087 //!
1088 //! \param ui32Base is the base address of the I2S module.
1089 //! \param ui32NextPointer is the adress of the data
1090 //!
1091 //! \return None
1092 //!
1093 //! \sa \ref I2SOutPointerSet()
1094 //
1095 //****************************************************************************
1096 __STATIC_INLINE void
I2SInPointerSet(uint32_t ui32Base,uint32_t ui32NextPointer)1097 I2SInPointerSet(uint32_t ui32Base, uint32_t ui32NextPointer)
1098 {
1099 // Check the arguments.
1100 ASSERT(I2SBaseValid(ui32Base));
1101
1102 HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT) = ui32NextPointer;
1103 }
1104
1105 //****************************************************************************
1106 //
1107 //! \brief Set the output buffer pointer.
1108 //!
1109 //! The next pointer should always be written while the DMA is using the
1110 //! previous written pointer. If not written in time an \ref I2S_INT_PTR_ERR
1111 //! will occur and all inputs and outputs will be disabled.
1112 //! This function relies on pointer is pointing to a valid address.
1113 //!
1114 //! \note It is recommended that the pointer update is done in an interrupt context
1115 //! to ensure that the update is performed before the buffer is full.
1116 //!
1117 //! \param ui32Base is the base address of the I2S module.
1118 //! \param ui32NextPointer is the adress of the data
1119 //!
1120 //! \return None
1121 //!
1122 //! \sa \ref I2SInPointerSet()
1123 //
1124 //****************************************************************************
1125 __STATIC_INLINE void
I2SOutPointerSet(uint32_t ui32Base,uint32_t ui32NextPointer)1126 I2SOutPointerSet(uint32_t ui32Base, uint32_t ui32NextPointer)
1127 {
1128 // Check the arguments.
1129 ASSERT(I2SBaseValid(ui32Base));
1130
1131 HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT) = ui32NextPointer;
1132 }
1133
1134 //****************************************************************************
1135 //
1136 //! \brief Get value stored in PTR NEXT IN register
1137 //!
1138 //! \param ui32Base is the base address of the I2S module.
1139 //!
1140 //! \return the value of PTR NEXT IN.
1141 //
1142 //****************************************************************************
1143 __STATIC_INLINE uint32_t
I2SInPointerNextGet(uint32_t ui32Base)1144 I2SInPointerNextGet(uint32_t ui32Base)
1145 {
1146 // Check the arguments.
1147 ASSERT(I2SBaseValid(ui32Base));
1148
1149 return (HWREG(I2S0_BASE + I2S_O_AIFINPTRNEXT));
1150 }
1151
1152
1153 //****************************************************************************
1154 //
1155 //! \brief Get value stored in PTR NEXT OUT register
1156 //!
1157 //! \param ui32Base is the base address of the I2S module.
1158 //!
1159 //! \return the value of PTR NEXT OUT.
1160 //
1161 //****************************************************************************
1162 __STATIC_INLINE uint32_t
I2SOutPointerNextGet(uint32_t ui32Base)1163 I2SOutPointerNextGet(uint32_t ui32Base)
1164 {
1165 // Check the arguments.
1166 ASSERT(I2SBaseValid(ui32Base));
1167
1168 return (HWREG(I2S0_BASE + I2S_O_AIFOUTPTRNEXT));
1169 }
1170
1171 //****************************************************************************
1172 //
1173 //! \brief Get value stored in PTR IN register
1174 //!
1175 //! \param ui32Base is the base address of the I2S module.
1176 //!
1177 //! \return the value of PTR IN.
1178 //
1179 //****************************************************************************
1180 __STATIC_INLINE uint32_t
I2SInPointerGet(uint32_t ui32Base)1181 I2SInPointerGet(uint32_t ui32Base)
1182 {
1183 // Check the arguments.
1184 ASSERT(I2SBaseValid(ui32Base));
1185
1186 return (HWREG(I2S0_BASE + I2S_O_AIFINPTR));
1187 }
1188
1189 //****************************************************************************
1190 //
1191 //! \brief Get value stored in PTR OUT register
1192 //!
1193 //! \param ui32Base is the base address of the I2S module.
1194 //!
1195 //! \return the value of PTR OUT.
1196 //
1197 //****************************************************************************
1198 __STATIC_INLINE uint32_t
I2SOutPointerGet(uint32_t ui32Base)1199 I2SOutPointerGet(uint32_t ui32Base)
1200 {
1201 // Check the arguments.
1202 ASSERT(I2SBaseValid(ui32Base));
1203
1204 return (HWREG(I2S0_BASE + I2S_O_AIFOUTPTR));
1205 }
1206
1207 //*****************************************************************************
1208 //
1209 //! \brief Configure the IN sample stamp generator.
1210 //!
1211 //! Use this function to configure the sample stamp generator.
1212 //!
1213 //! \param ui32Base is the base address of the I2S module.
1214 //! \param ui16TrigValue value used to set the trigger.
1215 //!
1216 //! \return None
1217 //
1218 //*****************************************************************************
1219 __STATIC_INLINE void
I2SSampleStampInConfigure(uint32_t ui32Base,uint16_t ui16TrigValue)1220 I2SSampleStampInConfigure(uint32_t ui32Base, uint16_t ui16TrigValue)
1221 {
1222 // Check the arguments.
1223 ASSERT(I2SBaseValid(ui32Base));
1224
1225 // Setup the sample stamp trigger for input streams.
1226 HWREGH(I2S0_BASE + I2S_O_STMPINTRIG) = ui16TrigValue;
1227 }
1228
1229 //*****************************************************************************
1230 //
1231 //! \brief Configure the OUT sample stamp generator.
1232 //!
1233 //! Use this function to configure the sample stamp generator.
1234 //!
1235 //! \param ui32Base is the base address of the I2S module.
1236 //! \param ui16TrigValue value used to set the trigger.
1237 //!
1238 //! \return None
1239 //
1240 //*****************************************************************************
1241 __STATIC_INLINE void
I2SSampleStampOutConfigure(uint32_t ui32Base,uint16_t ui16TrigValue)1242 I2SSampleStampOutConfigure(uint32_t ui32Base, uint16_t ui16TrigValue)
1243 {
1244 // Check the arguments.
1245 ASSERT(I2SBaseValid(ui32Base));
1246
1247 // Setup the sample stamp trigger for output streams.
1248 HWREGH(I2S0_BASE + I2S_O_STMPOUTTRIG) = ui16TrigValue;
1249 }
1250
1251 //*****************************************************************************
1252 //
1253 //! \brief Add the specified value to the WCLK count.
1254 //!
1255 //! \param ui32Base is the base address of the I2S module.
1256 //! \param i16Value is the offset to add to the counter (this value can be negative)
1257 //!
1258 //! \return None
1259 //
1260 //*****************************************************************************
1261 __STATIC_INLINE void
I2SWclkCounterConfigure(uint32_t ui32Base,int16_t i16Value)1262 I2SWclkCounterConfigure(uint32_t ui32Base, int16_t i16Value)
1263 {
1264 uint16_t ui16MinusValue;
1265
1266 // Check the arguments.
1267 ASSERT(I2SBaseValid(ui32Base));
1268
1269 if (i16Value >= 0)
1270 {
1271 HWREGH(I2S0_BASE + I2S_O_STMPWADD) = i16Value;
1272 }
1273 else
1274 {
1275 ui16MinusValue = (uint16_t)(-i16Value);
1276 HWREGH(I2S0_BASE + I2S_O_STMPWADD) = HWREGH(I2S0_BASE + I2S_O_STMPWPER) - ui16MinusValue;
1277 }
1278 }
1279
1280 //*****************************************************************************
1281 //
1282 //! \brief Reset the WCLK count.
1283 //!
1284 //! \param ui32Base is the base address of the I2S module.
1285 //!
1286 //! \return None
1287 //
1288 //*****************************************************************************
1289 __STATIC_INLINE void
I2SWclkCounterReset(uint32_t ui32Base)1290 I2SWclkCounterReset(uint32_t ui32Base)
1291 {
1292 // Check the arguments.
1293 ASSERT(I2SBaseValid(ui32Base));
1294
1295 HWREGH(I2S0_BASE + I2S_O_STMPWSET) = 0;
1296 }
1297
1298 //*****************************************************************************
1299 //
1300 // Support for DriverLib in ROM:
1301 // Redirect to implementation in ROM when available.
1302 //
1303 //*****************************************************************************
1304 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
1305 #include "../driverlib/rom.h"
1306 #ifdef ROM_I2SEnable
1307 #undef I2SEnable
1308 #define I2SEnable ROM_I2SEnable
1309 #endif
1310 #ifdef ROM_I2SAudioFormatConfigure
1311 #undef I2SAudioFormatConfigure
1312 #define I2SAudioFormatConfigure ROM_I2SAudioFormatConfigure
1313 #endif
1314 #ifdef ROM_I2SChannelConfigure
1315 #undef I2SChannelConfigure
1316 #define I2SChannelConfigure ROM_I2SChannelConfigure
1317 #endif
1318 #ifdef ROM_I2SBufferConfig
1319 #undef I2SBufferConfig
1320 #define I2SBufferConfig ROM_I2SBufferConfig
1321 #endif
1322 #ifdef ROM_I2SPointerUpdate
1323 #undef I2SPointerUpdate
1324 #define I2SPointerUpdate ROM_I2SPointerUpdate
1325 #endif
1326 #ifdef ROM_I2SPointerSet
1327 #undef I2SPointerSet
1328 #define I2SPointerSet ROM_I2SPointerSet
1329 #endif
1330 #ifdef ROM_I2SSampleStampConfigure
1331 #undef I2SSampleStampConfigure
1332 #define I2SSampleStampConfigure ROM_I2SSampleStampConfigure
1333 #endif
1334 #ifdef ROM_I2SSampleStampGet
1335 #undef I2SSampleStampGet
1336 #define I2SSampleStampGet ROM_I2SSampleStampGet
1337 #endif
1338 #endif
1339
1340 //*****************************************************************************
1341 //
1342 // Mark the end of the C bindings section for C++ compilers.
1343 //
1344 //*****************************************************************************
1345 #ifdef __cplusplus
1346 }
1347 #endif
1348
1349 #endif // __I2S_H__
1350
1351 //****************************************************************************
1352 //
1353 //! Close the Doxygen group.
1354 //! @}
1355 //! @}
1356 //
1357 //****************************************************************************
1358