1 /******************************************************************************
2 *  Filename:       aux_tdc.h
3 *  Revised:        2020-02-14 11:30:20 +0100 (Fri, 14 Feb 2020)
4 *  Revision:       56760
5 *
6 *  Description:    Defines and prototypes for the AUX Time-to-Digital Converter
7 *
8 *  Copyright (c) 2015 - 2020, Texas Instruments Incorporated
9 *  All rights reserved.
10 *
11 *  Redistribution and use in source and binary forms, with or without
12 *  modification, are permitted provided that the following conditions are met:
13 *
14 *  1) Redistributions of source code must retain the above copyright notice,
15 *     this list of conditions and the following disclaimer.
16 *
17 *  2) Redistributions in binary form must reproduce the above copyright notice,
18 *     this list of conditions and the following disclaimer in the documentation
19 *     and/or other materials provided with the distribution.
20 *
21 *  3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 *     be used to endorse or promote products derived from this software without
23 *     specific prior written permission.
24 *
25 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 *  POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38 
39 //*****************************************************************************
40 //
41 //! \addtogroup aux_group
42 //! @{
43 //! \addtogroup auxtdc_api
44 //! @{
45 //
46 //*****************************************************************************
47 
48 #ifndef __AUX_TDC_H__
49 #define __AUX_TDC_H__
50 
51 //*****************************************************************************
52 //
53 // If building with a C++ compiler, make all of the definitions in this header
54 // have a C binding.
55 //
56 //*****************************************************************************
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61 
62 #include <stdbool.h>
63 #include <stdint.h>
64 #include "../inc/hw_types.h"
65 #include "../inc/hw_memmap.h"
66 #include "../inc/hw_ints.h"
67 #include "../inc/hw_aux_tdc.h"
68 #include "debug.h"
69 
70 //*****************************************************************************
71 //
72 // Support for DriverLib in ROM:
73 // This section renames all functions that are not "static inline", so that
74 // calling these functions will default to implementation in flash. At the end
75 // of this file a second renaming will change the defaults to implementation in
76 // ROM for available functions.
77 //
78 // To force use of the implementation in flash, e.g. for debugging:
79 // - Globally: Define DRIVERLIB_NOROM at project level
80 // - Per function: Use prefix "NOROM_" when calling the function
81 //
82 //*****************************************************************************
83 #if !defined(DOXYGEN)
84     #define AUXTDCConfigSet                 NOROM_AUXTDCConfigSet
85     #define AUXTDCMeasurementDone           NOROM_AUXTDCMeasurementDone
86 #endif
87 
88 //*****************************************************************************
89 //
90 // Defines for the status of a AUX TDC measurement.
91 //
92 //*****************************************************************************
93 #define AUX_TDC_BUSY            0x00000001
94 #define AUX_TDC_TIMEOUT         0x00000002
95 #define AUX_TDC_DONE            0x00000004
96 
97 //*****************************************************************************
98 //
99 // Defines for the control of a AUX TDC.
100 //
101 //*****************************************************************************
102 #define AUX_TDC_RUNSYNC         0x00000001
103 #define AUX_TDC_RUN             0x00000002
104 #define AUX_TDC_ABORT           0x00000003
105 
106 //*****************************************************************************
107 //
108 // Defines for possible states of the TDC internal state machine.
109 //
110 //*****************************************************************************
111 #define AUXTDC_WAIT_START         (AUX_TDC_STAT_STATE_WAIT_START)
112 #define AUXTDC_WAIT_START_CNTEN   (AUX_TDC_STAT_STATE_WAIT_START_STOP_CNT_EN)
113 #define AUXTDC_IDLE               (AUX_TDC_STAT_STATE_IDLE)
114 #define AUXTDC_CLRCNT             (AUX_TDC_STAT_STATE_CLR_CNT)
115 #define AUXTDC_WAIT_STOP          (AUX_TDC_STAT_STATE_WAIT_STOP)
116 #define AUXTDC_WAIT_STOP_CNTDOWN  (AUX_TDC_STAT_STATE_WAIT_STOP_CNTDWN)
117 #define AUXTDC_GETRESULTS         (AUX_TDC_STAT_STATE_GET_RESULT)
118 #define AUXTDC_POR                (AUX_TDC_STAT_STATE_POR)
119 #define AUXTDC_WAIT_CLRCNT_DONE   (AUX_TDC_STAT_STATE_WAIT_CLR_CNT_DONE)
120 #define AUXTDC_START_FALL         (AUX_TDC_STAT_STATE_START_FALL)
121 #define AUXTDC_FORCE_STOP         (AUX_TDC_STAT_STATE_FORCE_STOP)
122 
123 //*****************************************************************************
124 //
125 // Defines for controlling the AUX TDC. Values can be passed to AUXTDCConfigSet().
126 //
127 //*****************************************************************************
128 #define AUXTDC_STOPPOL_RIS                (AUX_TDC_TRIGSRC_STOP_POL_HIGH) // Rising edge polarity for stop event
129 #define AUXTDC_STOPPOL_FALL               (AUX_TDC_TRIGSRC_STOP_POL_LOW)  // Falling edge polarity for stop event
130 
131 #define AUXTDC_STOP_AUXIO0                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO0)
132 #define AUXTDC_STOP_AUXIO1                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO1)
133 #define AUXTDC_STOP_AUXIO2                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO2)
134 #define AUXTDC_STOP_AUXIO3                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO3)
135 #define AUXTDC_STOP_AUXIO4                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO4)
136 #define AUXTDC_STOP_AUXIO5                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO5)
137 #define AUXTDC_STOP_AUXIO6                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO6)
138 #define AUXTDC_STOP_AUXIO7                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO7)
139 #define AUXTDC_STOP_AUXIO8                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO8)
140 #define AUXTDC_STOP_AUXIO9                (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO9)
141 #define AUXTDC_STOP_AUXIO10               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO10)
142 #define AUXTDC_STOP_AUXIO11               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO11)
143 #define AUXTDC_STOP_AUXIO12               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO12)
144 #define AUXTDC_STOP_AUXIO13               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO13)
145 #define AUXTDC_STOP_AUXIO14               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO14)
146 #define AUXTDC_STOP_AUXIO15               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO15)
147 #define AUXTDC_STOP_AUXIO16               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO16)
148 #define AUXTDC_STOP_AUXIO17               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO17)
149 #define AUXTDC_STOP_AUXIO18               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO18)
150 #define AUXTDC_STOP_AUXIO19               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO19)
151 #define AUXTDC_STOP_AUXIO20               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO20)
152 #define AUXTDC_STOP_AUXIO21               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO21)
153 #define AUXTDC_STOP_AUXIO22               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO22)
154 #define AUXTDC_STOP_AUXIO23               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO23)
155 #define AUXTDC_STOP_AUXIO24               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO24)
156 #define AUXTDC_STOP_AUXIO25               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO25)
157 #define AUXTDC_STOP_AUXIO26               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO26)
158 #define AUXTDC_STOP_AUXIO27               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO27)
159 #define AUXTDC_STOP_AUXIO28               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO28)
160 #define AUXTDC_STOP_AUXIO29               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO29)
161 #define AUXTDC_STOP_AUXIO30               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO30)
162 #define AUXTDC_STOP_AUXIO31               (AUX_TDC_TRIGSRC_STOP_SRC_AUXIO31)
163 #define AUXTDC_STOP_MANUAL_EV             (AUX_TDC_TRIGSRC_STOP_SRC_MANUAL_EV)
164 #define AUXTDC_STOP_AON_RTC_CH2_DLY       (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2_DLY)
165 #define AUXTDC_STOP_AON_RTC_4KHZ          (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_4KHZ)
166 #define AUXTDC_STOP_AON_BATMON_BAT_UPD    (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_BAT_UPD)
167 #define AUXTDC_STOP_AON_BATMON_TEMP_UPD   (AUX_TDC_TRIGSRC_STOP_SRC_AON_BATMON_TEMP_UPD)
168 #define AUXTDC_STOP_SCLK_LF               (AUX_TDC_TRIGSRC_STOP_SRC_SCLK_LF)
169 #define AUXTDC_STOP_PWR_DWN               (AUX_TDC_TRIGSRC_STOP_SRC_PWR_DWN)
170 #define AUXTDC_STOP_MCU_ACTIVE            (AUX_TDC_TRIGSRC_STOP_SRC_MCU_ACTIVE)
171 #define AUXTDC_STOP_VDDR_RECHARGE         (AUX_TDC_TRIGSRC_STOP_SRC_VDDR_RECHARGE)
172 #define AUXTDC_STOP_TIMER2_EV0            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV0)
173 #define AUXTDC_STOP_TIMER2_EV1            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV1)
174 #define AUXTDC_STOP_TIMER2_EV2            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV2)
175 #define AUXTDC_STOP_TIMER2_EV3            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_EV3)
176 #define AUXTDC_STOP_TIMER2_PULSE          (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER2_PULSE)
177 #define AUXTDC_STOP_TDC_DONE              (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_DONE)
178 #define AUXTDC_STOP_ADC_IRQ               (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_IRQ)
179 #define AUXTDC_STOP_ADC_FIFO_NOT_EMPTY    (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_NOT_EMPTY)
180 #define AUXTDC_STOP_NO_EVENT              (AUX_TDC_TRIGSRC_STOP_SRC_NO_EVENT)
181 #define AUXTDC_STOP_ADC_DONE              (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_DONE)
182 #define AUXTDC_STOP_ADC_FIFO_ALMOST_FULL  (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ADC_FIFO_ALMOST_FULL)
183 #define AUXTDC_STOP_ISRC_RESET            (AUX_TDC_TRIGSRC_STOP_SRC_AUX_ISRC_RESET_N)
184 #define AUXTDC_STOP_OBSMUX0               (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX0)
185 #define AUXTDC_STOP_OBSMUX1               (AUX_TDC_TRIGSRC_STOP_SRC_MCU_OBSMUX1)
186 #define AUXTDC_STOP_SMPH_AUTOTAKE_DONE    (AUX_TDC_TRIGSRC_STOP_SRC_AUX_SMPH_AUTOTAKE_DONE)
187 #define AUXTDC_STOP_TDC_PRE               (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TDC_PRE)
188 #define AUXTDC_STOP_TIMER0_EV             (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER0_EV)
189 #define AUXTDC_STOP_TIMER1_EV             (AUX_TDC_TRIGSRC_STOP_SRC_AUX_TIMER1_EV)
190 #define AUXTDC_STOP_AON_RTC_CH2           (AUX_TDC_TRIGSRC_STOP_SRC_AON_RTC_CH2)
191 #define AUXTDC_STOP_AUX_COMPA             (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPA)
192 #define AUXTDC_STOP_AUX_COMPB             (AUX_TDC_TRIGSRC_STOP_SRC_AUX_COMPB)
193 #define AUXTDC_STOP_ACLK_REF              (AUX_TDC_TRIGSRC_STOP_SRC_ACLK_REF)
194 #define AUXTDC_STOP_MCU_EV                (AUX_TDC_TRIGSRC_STOP_SRC_MCU_EV)
195 
196 #define AUXTDC_STARTPOL_RIS               (AUX_TDC_TRIGSRC_START_POL_HIGH) // Rising edge polarity for start event
197 #define AUXTDC_STARTPOL_FALL              (AUX_TDC_TRIGSRC_START_POL_LOW)  // Falling edge polarity for start event
198 
199 #define AUXTDC_START_AUXIO0               (AUX_TDC_TRIGSRC_START_SRC_AUXIO0)
200 #define AUXTDC_START_AUXIO1               (AUX_TDC_TRIGSRC_START_SRC_AUXIO1)
201 #define AUXTDC_START_AUXIO2               (AUX_TDC_TRIGSRC_START_SRC_AUXIO2)
202 #define AUXTDC_START_AUXIO3               (AUX_TDC_TRIGSRC_START_SRC_AUXIO3)
203 #define AUXTDC_START_AUXIO4               (AUX_TDC_TRIGSRC_START_SRC_AUXIO4)
204 #define AUXTDC_START_AUXIO5               (AUX_TDC_TRIGSRC_START_SRC_AUXIO5)
205 #define AUXTDC_START_AUXIO6               (AUX_TDC_TRIGSRC_START_SRC_AUXIO6)
206 #define AUXTDC_START_AUXIO7               (AUX_TDC_TRIGSRC_START_SRC_AUXIO7)
207 #define AUXTDC_START_AUXIO8               (AUX_TDC_TRIGSRC_START_SRC_AUXIO8)
208 #define AUXTDC_START_AUXIO9               (AUX_TDC_TRIGSRC_START_SRC_AUXIO9)
209 #define AUXTDC_START_AUXIO10              (AUX_TDC_TRIGSRC_START_SRC_AUXIO10)
210 #define AUXTDC_START_AUXIO11              (AUX_TDC_TRIGSRC_START_SRC_AUXIO11)
211 #define AUXTDC_START_AUXIO12              (AUX_TDC_TRIGSRC_START_SRC_AUXIO12)
212 #define AUXTDC_START_AUXIO13              (AUX_TDC_TRIGSRC_START_SRC_AUXIO13)
213 #define AUXTDC_START_AUXIO14              (AUX_TDC_TRIGSRC_START_SRC_AUXIO14)
214 #define AUXTDC_START_AUXIO15              (AUX_TDC_TRIGSRC_START_SRC_AUXIO15)
215 #define AUXTDC_START_AUXIO16              (AUX_TDC_TRIGSRC_START_SRC_AUXIO16)
216 #define AUXTDC_START_AUXIO17              (AUX_TDC_TRIGSRC_START_SRC_AUXIO17)
217 #define AUXTDC_START_AUXIO18              (AUX_TDC_TRIGSRC_START_SRC_AUXIO18)
218 #define AUXTDC_START_AUXIO19              (AUX_TDC_TRIGSRC_START_SRC_AUXIO19)
219 #define AUXTDC_START_AUXIO20              (AUX_TDC_TRIGSRC_START_SRC_AUXIO20)
220 #define AUXTDC_START_AUXIO21              (AUX_TDC_TRIGSRC_START_SRC_AUXIO21)
221 #define AUXTDC_START_AUXIO22              (AUX_TDC_TRIGSRC_START_SRC_AUXIO22)
222 #define AUXTDC_START_AUXIO23              (AUX_TDC_TRIGSRC_START_SRC_AUXIO23)
223 #define AUXTDC_START_AUXIO24              (AUX_TDC_TRIGSRC_START_SRC_AUXIO24)
224 #define AUXTDC_START_AUXIO25              (AUX_TDC_TRIGSRC_START_SRC_AUXIO25)
225 #define AUXTDC_START_AUXIO26              (AUX_TDC_TRIGSRC_START_SRC_AUXIO26)
226 #define AUXTDC_START_AUXIO27              (AUX_TDC_TRIGSRC_START_SRC_AUXIO27)
227 #define AUXTDC_START_AUXIO28              (AUX_TDC_TRIGSRC_START_SRC_AUXIO28)
228 #define AUXTDC_START_AUXIO29              (AUX_TDC_TRIGSRC_START_SRC_AUXIO29)
229 #define AUXTDC_START_AUXIO30              (AUX_TDC_TRIGSRC_START_SRC_AUXIO30)
230 #define AUXTDC_START_AUXIO31              (AUX_TDC_TRIGSRC_START_SRC_AUXIO31)
231 #define AUXTDC_START_MANUAL_EV            (AUX_TDC_TRIGSRC_START_SRC_MANUAL_EV)
232 #define AUXTDC_START_AON_RTC_CH2_DLY      (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2_DLY)
233 #define AUXTDC_START_AON_RTC_4KHZ         (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_4KHZ)
234 #define AUXTDC_START_AON_BATMON_BAT_UPD   (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_BAT_UPD)
235 #define AUXTDC_START_AON_BATMON_TEMP_UPD  (AUX_TDC_TRIGSRC_START_SRC_AON_BATMON_TEMP_UPD)
236 #define AUXTDC_START_SCLK_LF              (AUX_TDC_TRIGSRC_START_SRC_SCLK_LF)
237 #define AUXTDC_START_PWR_DWN              (AUX_TDC_TRIGSRC_START_SRC_PWR_DWN)
238 #define AUXTDC_START_MCU_ACTIVE           (AUX_TDC_TRIGSRC_START_SRC_MCU_ACTIVE)
239 #define AUXTDC_START_VDDR_RECHARGE        (AUX_TDC_TRIGSRC_START_SRC_VDDR_RECHARGE)
240 #define AUXTDC_START_TIMER2_EV0           (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV0)
241 #define AUXTDC_START_TIMER2_EV1           (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV1)
242 #define AUXTDC_START_TIMER2_EV2           (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV2)
243 #define AUXTDC_START_TIMER2_EV3           (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_EV3)
244 #define AUXTDC_START_TIMER2_PULSE         (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER2_PULSE)
245 #define AUXTDC_START_TDC_DONE             (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_DONE)
246 #define AUXTDC_START_ADC_IRQ              (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_IRQ)
247 #define AUXTDC_START_ADC_FIFO_NOT_EMPTY   (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_NOT_EMPTY)
248 #define AUXTDC_START_NO_EVENT             (AUX_TDC_TRIGSRC_START_SRC_NO_EVENT)
249 #define AUXTDC_START_ADC_DONE             (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_DONE)
250 #define AUXTDC_START_ADC_FIFO_ALMOST_FULL (AUX_TDC_TRIGSRC_START_SRC_AUX_ADC_FIFO_ALMOST_FULL)
251 #define AUXTDC_START_ISRC_RESET           (AUX_TDC_TRIGSRC_START_SRC_AUX_ISRC_RESET_N)
252 #define AUXTDC_START_OBSMUX0              (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX0)
253 #define AUXTDC_START_OBSMUX1              (AUX_TDC_TRIGSRC_START_SRC_MCU_OBSMUX1)
254 #define AUXTDC_START_SMPH_AUTOTAKE_DONE   (AUX_TDC_TRIGSRC_START_SRC_AUX_SMPH_AUTOTAKE_DONE)
255 #define AUXTDC_START_TDC_PRE              (AUX_TDC_TRIGSRC_START_SRC_AUX_TDC_PRE)
256 #define AUXTDC_START_TIMER0_EV            (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER0_EV)
257 #define AUXTDC_START_TIMER1_EV            (AUX_TDC_TRIGSRC_START_SRC_AUX_TIMER1_EV)
258 #define AUXTDC_START_AON_RTC_CH2          (AUX_TDC_TRIGSRC_START_SRC_AON_RTC_CH2)
259 #define AUXTDC_START_AUX_COMPA            (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPA)
260 #define AUXTDC_START_AUX_COMPB            (AUX_TDC_TRIGSRC_START_SRC_AUX_COMPB)
261 #define AUXTDC_START_ACLK_REF             (AUX_TDC_TRIGSRC_START_SRC_ACLK_REF)
262 #define AUXTDC_START_MCU_EV               (AUX_TDC_TRIGSRC_START_SRC_MCU_EV)
263 
264 //*****************************************************************************
265 //
266 // Defines for the possible saturation values set using AUXTDCLimitSet().
267 //
268 //*****************************************************************************
269 #define AUXTDC_SAT_4096         (AUX_TDC_SATCFG_LIMIT_R12)
270 #define AUXTDC_SAT_8192         (AUX_TDC_SATCFG_LIMIT_R13)
271 #define AUXTDC_SAT_16384        (AUX_TDC_SATCFG_LIMIT_R14)
272 #define AUXTDC_SAT_32768        (AUX_TDC_SATCFG_LIMIT_R15)
273 #define AUXTDC_SAT_65536        (AUX_TDC_SATCFG_LIMIT_R16)
274 #define AUXTDC_SAT_131072       (AUX_TDC_SATCFG_LIMIT_R17)
275 #define AUXTDC_SAT_262144       (AUX_TDC_SATCFG_LIMIT_R18)
276 #define AUXTDC_SAT_524288       (AUX_TDC_SATCFG_LIMIT_R19)
277 #define AUXTDC_SAT_1048576      (AUX_TDC_SATCFG_LIMIT_R20)
278 #define AUXTDC_SAT_2097152      (AUX_TDC_SATCFG_LIMIT_R21)
279 #define AUXTDC_SAT_4194304      (AUX_TDC_SATCFG_LIMIT_R22)
280 #define AUXTDC_SAT_8388608      (AUX_TDC_SATCFG_LIMIT_R23)
281 #define AUXTDC_SAT_16777216     (AUX_TDC_SATCFG_LIMIT_R24)
282 #define AUXTDC_NUM_SAT_VALS     16
283 
284 //*****************************************************************************
285 //
286 // API Functions and prototypes
287 //
288 //*****************************************************************************
289 
290 #ifdef DRIVERLIB_DEBUG
291 //*****************************************************************************
292 //
293 //! \internal
294 //! \brief Checks an AUX TDC base address.
295 //!
296 //! This function determines if a AUX TDC port base address is valid.
297 //!
298 //! \param ui32Base is the base address of the AUX TDC port.
299 //!
300 //! \return Returns \c true if the base address is valid and \c false
301 //! otherwise.
302 //
303 //*****************************************************************************
304 static bool
AUXTDCBaseValid(uint32_t ui32Base)305 AUXTDCBaseValid(uint32_t ui32Base)
306 {
307     return(ui32Base == AUX_TDC_BASE);
308 }
309 #endif
310 
311 //*****************************************************************************
312 //
313 //! \brief Get the status of the AUX TDC internal state machine.
314 //!
315 //! This function will return the current state of the AUX TDC internal state
316 //! machine.
317 //! \param ui32Base is base address of the AUX TDC
318 //!
319 //! \return Returns the current state of the state machine.
320 //! Possible states for the state machine are:
321 //! - \ref AUXTDC_WAIT_START
322 //! - \ref AUXTDC_WAIT_START_CNTEN
323 //! - \ref AUXTDC_IDLE
324 //! - \ref AUXTDC_CLRCNT
325 //! - \ref AUXTDC_WAIT_STOP
326 //! - \ref AUXTDC_WAIT_STOP_CNTDOWN
327 //! - \ref AUXTDC_GETRESULTS
328 //! - \ref AUXTDC_POR
329 //! - \ref AUXTDC_WAIT_CLRCNT_DONE
330 //! - \ref AUXTDC_START_FALL
331 //! - \ref AUXTDC_FORCE_STOP.
332 //
333 //*****************************************************************************
334 __STATIC_INLINE uint32_t
AUXTDCStatusGet(uint32_t ui32Base)335 AUXTDCStatusGet(uint32_t ui32Base)
336 {
337     // Check the arguments.
338     ASSERT(AUXTDCBaseValid(ui32Base));
339 
340     // Return the status value for the correct ADI Slave.
341     return((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) >>
342            AUX_TDC_STAT_STATE_S);
343 }
344 
345 //*****************************************************************************
346 //
347 //! \brief Configure the operation of the AUX TDC.
348 //!
349 //! Use this function to configure the start and stop event for the AUX TDC.
350 //!
351 //! The \c ui32StartCondition must be a bitwise OR of the start event and the
352 //! polarity of the start event. The start events are:
353 //! - \ref AUXTDC_START_AUXIO0
354 //! - \ref AUXTDC_START_AUXIO1
355 //! - \ref AUXTDC_START_AUXIO2
356 //! - \ref AUXTDC_START_AUXIO3
357 //! - \ref AUXTDC_START_AUXIO4
358 //! - \ref AUXTDC_START_AUXIO5
359 //! - \ref AUXTDC_START_AUXIO6
360 //! - \ref AUXTDC_START_AUXIO7
361 //! - \ref AUXTDC_START_AUXIO8
362 //! - \ref AUXTDC_START_AUXIO9
363 //! - \ref AUXTDC_START_AUXIO10
364 //! - \ref AUXTDC_START_AUXIO11
365 //! - \ref AUXTDC_START_AUXIO12
366 //! - \ref AUXTDC_START_AUXIO13
367 //! - \ref AUXTDC_START_AUXIO14
368 //! - \ref AUXTDC_START_AUXIO15
369 //! - \ref AUXTDC_START_AUXIO16
370 //! - \ref AUXTDC_START_AUXIO17
371 //! - \ref AUXTDC_START_AUXIO18
372 //! - \ref AUXTDC_START_AUXIO19
373 //! - \ref AUXTDC_START_AUXIO20
374 //! - \ref AUXTDC_START_AUXIO21
375 //! - \ref AUXTDC_START_AUXIO22
376 //! - \ref AUXTDC_START_AUXIO23
377 //! - \ref AUXTDC_START_AUXIO24
378 //! - \ref AUXTDC_START_AUXIO25
379 //! - \ref AUXTDC_START_AUXIO26
380 //! - \ref AUXTDC_START_AUXIO27
381 //! - \ref AUXTDC_START_AUXIO28
382 //! - \ref AUXTDC_START_AUXIO29
383 //! - \ref AUXTDC_START_AUXIO30
384 //! - \ref AUXTDC_START_AUXIO31
385 //! - \ref AUXTDC_START_MANUAL_EV
386 //! - \ref AUXTDC_START_AON_RTC_CH2_DLY
387 //! - \ref AUXTDC_START_AON_RTC_4KHZ
388 //! - \ref AUXTDC_START_AON_BATMON_BAT_UPD
389 //! - \ref AUXTDC_START_AON_BATMON_TEMP_UPD
390 //! - \ref AUXTDC_START_SCLK_LF
391 //! - \ref AUXTDC_START_PWR_DWN
392 //! - \ref AUXTDC_START_MCU_ACTIVE
393 //! - \ref AUXTDC_START_VDDR_RECHARGE
394 //! - \ref AUXTDC_START_TIMER2_EV0
395 //! - \ref AUXTDC_START_TIMER2_EV1
396 //! - \ref AUXTDC_START_TIMER2_EV2
397 //! - \ref AUXTDC_START_TIMER2_EV3
398 //! - \ref AUXTDC_START_TIMER2_PULSE
399 //! - \ref AUXTDC_START_TDC_DONE
400 //! - \ref AUXTDC_START_ADC_IRQ
401 //! - \ref AUXTDC_START_ADC_FIFO_NOT_EMPTY
402 //! - \ref AUXTDC_START_NO_EVENT
403 //! - \ref AUXTDC_START_ADC_DONE
404 //! - \ref AUXTDC_START_ADC_FIFO_ALMOST_FULL
405 //! - \ref AUXTDC_START_ISRC_RESET
406 //! - \ref AUXTDC_START_OBSMUX0
407 //! - \ref AUXTDC_START_OBSMUX1
408 //! - \ref AUXTDC_START_SMPH_AUTOTAKE_DONE
409 //! - \ref AUXTDC_START_TDC_PRE
410 //! - \ref AUXTDC_START_TIMER0_EV
411 //! - \ref AUXTDC_START_TIMER1_EV
412 //! - \ref AUXTDC_START_AON_RTC_CH2
413 //! - \ref AUXTDC_START_AUX_COMPA
414 //! - \ref AUXTDC_START_AUX_COMPB
415 //! - \ref AUXTDC_START_ACLK_REF
416 //! - \ref AUXTDC_START_MCU_EV
417 //!
418 //! The polarity of the start event is either rising \ref AUXTDC_STARTPOL_RIS
419 //! or falling \ref AUXTDC_STARTPOL_FALL.
420 //!
421 //! The \c ui32StopCondition must be a bitwise OR of the stop event and the
422 //! polarity of the stop event. The stop events are:
423 //! - \ref AUXTDC_STOP_AUXIO0
424 //! - \ref AUXTDC_STOP_AUXIO1
425 //! - \ref AUXTDC_STOP_AUXIO2
426 //! - \ref AUXTDC_STOP_AUXIO3
427 //! - \ref AUXTDC_STOP_AUXIO4
428 //! - \ref AUXTDC_STOP_AUXIO5
429 //! - \ref AUXTDC_STOP_AUXIO6
430 //! - \ref AUXTDC_STOP_AUXIO7
431 //! - \ref AUXTDC_STOP_AUXIO8
432 //! - \ref AUXTDC_STOP_AUXIO9
433 //! - \ref AUXTDC_STOP_AUXIO10
434 //! - \ref AUXTDC_STOP_AUXIO11
435 //! - \ref AUXTDC_STOP_AUXIO12
436 //! - \ref AUXTDC_STOP_AUXIO13
437 //! - \ref AUXTDC_STOP_AUXIO14
438 //! - \ref AUXTDC_STOP_AUXIO15
439 //! - \ref AUXTDC_STOP_AUXIO16
440 //! - \ref AUXTDC_STOP_AUXIO17
441 //! - \ref AUXTDC_STOP_AUXIO18
442 //! - \ref AUXTDC_STOP_AUXIO19
443 //! - \ref AUXTDC_STOP_AUXIO20
444 //! - \ref AUXTDC_STOP_AUXIO21
445 //! - \ref AUXTDC_STOP_AUXIO22
446 //! - \ref AUXTDC_STOP_AUXIO23
447 //! - \ref AUXTDC_STOP_AUXIO24
448 //! - \ref AUXTDC_STOP_AUXIO25
449 //! - \ref AUXTDC_STOP_AUXIO26
450 //! - \ref AUXTDC_STOP_AUXIO27
451 //! - \ref AUXTDC_STOP_AUXIO28
452 //! - \ref AUXTDC_STOP_AUXIO29
453 //! - \ref AUXTDC_STOP_AUXIO30
454 //! - \ref AUXTDC_STOP_AUXIO31
455 //! - \ref AUXTDC_STOP_MANUAL_EV
456 //! - \ref AUXTDC_STOP_AON_RTC_CH2_DLY
457 //! - \ref AUXTDC_STOP_AON_RTC_4KHZ
458 //! - \ref AUXTDC_STOP_AON_BATMON_BAT_UPD
459 //! - \ref AUXTDC_STOP_AON_BATMON_TEMP_UPD
460 //! - \ref AUXTDC_STOP_SCLK_LF
461 //! - \ref AUXTDC_STOP_PWR_DWN
462 //! - \ref AUXTDC_STOP_MCU_ACTIVE
463 //! - \ref AUXTDC_STOP_VDDR_RECHARGE
464 //! - \ref AUXTDC_STOP_TIMER2_EV0
465 //! - \ref AUXTDC_STOP_TIMER2_EV1
466 //! - \ref AUXTDC_STOP_TIMER2_EV2
467 //! - \ref AUXTDC_STOP_TIMER2_EV3
468 //! - \ref AUXTDC_STOP_TIMER2_PULSE
469 //! - \ref AUXTDC_STOP_TDC_DONE
470 //! - \ref AUXTDC_STOP_ADC_IRQ
471 //! - \ref AUXTDC_STOP_ADC_FIFO_NOT_EMPTY
472 //! - \ref AUXTDC_STOP_NO_EVENT
473 //! - \ref AUXTDC_STOP_ADC_DONE
474 //! - \ref AUXTDC_STOP_ADC_FIFO_ALMOST_FULL
475 //! - \ref AUXTDC_STOP_ISRC_RESET
476 //! - \ref AUXTDC_STOP_OBSMUX0
477 //! - \ref AUXTDC_STOP_OBSMUX1
478 //! - \ref AUXTDC_STOP_SMPH_AUTOTAKE_DONE
479 //! - \ref AUXTDC_STOP_TDC_PRE
480 //! - \ref AUXTDC_STOP_TIMER0_EV
481 //! - \ref AUXTDC_STOP_TIMER1_EV
482 //! - \ref AUXTDC_STOP_AON_RTC_CH2
483 //! - \ref AUXTDC_STOP_AUX_COMPA
484 //! - \ref AUXTDC_STOP_AUX_COMPB
485 //! - \ref AUXTDC_STOP_ACLK_REF
486 //! - \ref AUXTDC_STOP_MCU_EV
487 //!
488 //! The polarity of the stop event is either rising \ref AUXTDC_STOPPOL_RIS
489 //! or falling \ref AUXTDC_STOPPOL_FALL.
490 //!
491 //! \note The AUX TDC should only be configured when the AUX TDC is in the Idle
492 //! state. To ensure that software does not lock up, it is recommended to
493 //! ensure that the AUX TDC is actually in idle when calling \ref AUXTDCConfigSet().
494 //! This can be tested using \ref AUXTDCIdle().
495 //!
496 //! \param ui32Base is base address of the AUX TDC.
497 //! \param ui32StartCondition is AUX TDC a bitwise OR of a start event and polarity.
498 //! \param ui32StopCondition is AUX TDC a bitwise OR of a stop event and polarity.
499 //!
500 //! \return None
501 //!
502 //! \sa \ref AUXTDCConfigSet(), \ref AUXTDCIdle()
503 //
504 //*****************************************************************************
505 extern void AUXTDCConfigSet(uint32_t ui32Base, uint32_t ui32StartCondition,
506                             uint32_t ui32StopCondition);
507 
508 //*****************************************************************************
509 //
510 //! \brief Check if the AUX TDC is in idle mode.
511 //!
512 //! This function can be used to check whether the AUX TDC internal state
513 //! machine is in idle mode. This is required before setting the polarity
514 //! of the start and stop event.
515 //!
516 //! \param ui32Base is the base address of the AUX TDC.
517 //!
518 //! \return Returns \c true if state machine is in idle and returns \c false
519 //! if the state machine is in any other state.
520 //
521 //*****************************************************************************
522 __STATIC_INLINE bool
AUXTDCIdle(uint32_t ui32Base)523 AUXTDCIdle(uint32_t ui32Base)
524 {
525     // Check the arguments.
526     ASSERT(AUXTDCBaseValid(ui32Base));
527 
528     // Check if the AUX TDC is in the Idle state.
529     return (((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
530              AUX_TDC_STAT_STATE_IDLE) ? true : false);
531 }
532 
533 //*****************************************************************************
534 //
535 //! \brief Enable the AUX TDC for a measurement.
536 //!
537 //! This function is used for arming the AUX TDC to begin a measurement as
538 //! soon as the start condition is met. There are two run modes:
539 //! - \ref AUX_TDC_RUNSYNC will wait for a falling event of the start pulse before
540 //!   starting measurement on next rising edge of start. This guarantees an edge
541 //!   triggered start and is recommended for frequency measurements. If the
542 //!   first falling edge is close to the start command it may be missed, but
543 //!   the TDC shall catch later falling edges and in any case guarantee a
544 //!   measurement start synchronous to the rising edge of the start event.
545 //! - The \ref AUX_TDC_RUN is asynchronous start and asynchronous stop mode. Using
546 //!   this a TDC measurement may start immediately if start is high and hence it
547 //!   may not give precise edge to edge measurements. This mode is only
548 //!   recommended when start pulse is guaranteed to arrive at least 7 clock
549 //!   periods after command.
550 //!
551 //! \note The AUX TDC should be configured and in Idle mode before calling this
552 //! function.
553 //!
554 //! \param ui32Base is the base address of the AUX TDC.
555 //! \param ui32RunMode is the run mode for the AUX TDC.
556 //! - \ref AUX_TDC_RUNSYNC : Synchronous run mode.
557 //! - \ref AUX_TDC_RUN : Asynchronous run mode.
558 //!
559 //! \return None
560 //
561 //*****************************************************************************
562 __STATIC_INLINE void
AUXTDCEnable(uint32_t ui32Base,uint32_t ui32RunMode)563 AUXTDCEnable(uint32_t ui32Base, uint32_t ui32RunMode)
564 {
565     // Check the arguments.
566     ASSERT(AUXTDCBaseValid(ui32Base));
567     ASSERT((ui32RunMode == AUX_TDC_RUN) ||
568            (ui32RunMode == AUX_TDC_RUNSYNC));
569 
570     // Enable the AUX TDC.
571     HWREG(ui32Base + AUX_TDC_O_CTL) = ui32RunMode;
572 }
573 
574 //*****************************************************************************
575 //
576 //! \brief Force the AUX TDC back to Idle mode.
577 //!
578 //! This function will force the AUX TDC in Idle mode. The internal state
579 //! machine will not go directly to Idle mode, so it is left to the programmer to
580 //! ensure that the state machine is in Idle mode before doing any new
581 //! configuration. This can be checked using \ref AUXTDCIdle().
582 //!
583 //! \param ui32Base is the base address of the AUX TDC.
584 //!
585 //! \return None
586 //!
587 //! \sa \ref AUXTDCIdle()
588 //
589 //*****************************************************************************
590 __STATIC_INLINE void
AUXTDCIdleForce(uint32_t ui32Base)591 AUXTDCIdleForce(uint32_t ui32Base)
592 {
593     // Check the arguments
594     ASSERT(AUXTDCBaseValid(ui32Base));
595 
596     // Abort operation of AUX TDC and force into Idle mode.
597     HWREG(ui32Base + AUX_TDC_O_CTL) = AUX_TDC_CTL_CMD_ABORT;
598 }
599 
600 //*****************************************************************************
601 //
602 //! \brief Check if the AUX TDC is done measuring.
603 //!
604 //! This function can be used to check whether the AUX TDC has finished a
605 //! measurement. The AUX TDC may have completed a measurement for two reasons.
606 //! Either it finish successfully \ref AUX_TDC_DONE or it failed due to a timeout
607 //! \ref AUX_TDC_TIMEOUT. If the AUX TDC is still measuring it this function
608 //! will return \ref AUX_TDC_BUSY.
609 //!
610 //! \param ui32Base is the base address of the AUX TDC.
611 //!
612 //! \return Returns the current status of a measurement:
613 //! - \ref AUX_TDC_DONE : An AUX TDC measurement finished successfully.
614 //! - \ref AUX_TDC_TIMEOUT : An AUX TDC measurement failed due to timeout.
615 //! - \ref AUX_TDC_BUSY : An AUX TDC measurement is being performed.
616 //
617 //*****************************************************************************
618 extern uint32_t AUXTDCMeasurementDone(uint32_t ui32Base);
619 
620 //*****************************************************************************
621 //
622 //! \brief Get the value of the latest measurement.
623 //!
624 //! This function is used for retrieving the value of the latest measurement
625 //! performed by the AUX TDC.
626 //!
627 //! \param ui32Base is the base address of the AUX TDC.
628 //!
629 //! \return Returns the result of the latest measurement.
630 //
631 //*****************************************************************************
632 __STATIC_INLINE uint32_t
AUXTDCMeasurementGet(uint32_t ui32Base)633 AUXTDCMeasurementGet(uint32_t ui32Base)
634 {
635     // Check the arguments.
636     ASSERT(AUXTDCBaseValid(ui32Base));
637 
638     // Return the measurement.
639     return (HWREG(ui32Base + AUX_TDC_O_RESULT));
640 }
641 
642 //*****************************************************************************
643 //
644 //! \brief Set the saturation limit of the measurement.
645 //!
646 //! This function is used to set a saturation limit for the event accumulation
647 //! register. The saturation limit is defined as a bit width of the
648 //! accumulation register and therefore increases in power of 2.
649 //!
650 //! \param ui32Base is base address of the AUX TDC.
651 //! \param ui32Limit is the saturation limit.
652 //! - \ref AUXTDC_SAT_4096
653 //! - \ref AUXTDC_SAT_8192
654 //! - \ref AUXTDC_SAT_16384
655 //! - \ref AUXTDC_SAT_32768
656 //! - \ref AUXTDC_SAT_65536
657 //! - \ref AUXTDC_SAT_131072
658 //! - \ref AUXTDC_SAT_262144
659 //! - \ref AUXTDC_SAT_524288
660 //! - \ref AUXTDC_SAT_1048576
661 //! - \ref AUXTDC_SAT_2097152
662 //! - \ref AUXTDC_SAT_4194304
663 //! - \ref AUXTDC_SAT_8388608
664 //! - \ref AUXTDC_SAT_16777216 (default)
665 //!
666 //! \return None
667 //!
668 //! \note The actual value of the accumulation register might increase slightly beyond
669 //! the saturation value before the saturation takes effect.
670 //!
671 //! \sa \ref AUXTDCLimitGet()
672 //
673 //*****************************************************************************
674 __STATIC_INLINE void
AUXTDCLimitSet(uint32_t ui32Base,uint32_t ui32Limit)675 AUXTDCLimitSet(uint32_t ui32Base, uint32_t ui32Limit)
676 {
677     // Check the arguments.
678     ASSERT(AUXTDCBaseValid(ui32Base));
679     ASSERT(ui32Limit < AUXTDC_NUM_SAT_VALS);
680 
681     // Set the saturation limit.
682     HWREG(ui32Base + AUX_TDC_O_SATCFG) = ui32Limit;
683 }
684 
685 //*****************************************************************************
686 //
687 //! \brief Get the saturation limit of the measurement.
688 //!
689 //! This function is used to retrieve the current saturation for the
690 //! accumulator register.
691 //!
692 //! \param ui32Base is base address of the AUX TDC.
693 //!
694 //! \return Returns the saturation limit.
695 //! - \ref AUXTDC_SAT_4096
696 //! - \ref AUXTDC_SAT_8192
697 //! - \ref AUXTDC_SAT_16384
698 //! - \ref AUXTDC_SAT_32768
699 //! - \ref AUXTDC_SAT_65536
700 //! - \ref AUXTDC_SAT_131072
701 //! - \ref AUXTDC_SAT_262144
702 //! - \ref AUXTDC_SAT_524288
703 //! - \ref AUXTDC_SAT_1048576
704 //! - \ref AUXTDC_SAT_2097152
705 //! - \ref AUXTDC_SAT_4194304
706 //! - \ref AUXTDC_SAT_8388608
707 //! - \ref AUXTDC_SAT_16777216
708 //!
709 //! \sa \ref AUXTDCLimitSet()
710 //
711 //*****************************************************************************
712 __STATIC_INLINE uint32_t
AUXTDCLimitGet(uint32_t ui32Base)713 AUXTDCLimitGet(uint32_t ui32Base)
714 {
715     // Check the arguments.
716     ASSERT(AUXTDCBaseValid(ui32Base));
717 
718     // Return the saturation limit.
719     return (HWREG(ui32Base + AUX_TDC_O_SATCFG));
720 }
721 
722 //*****************************************************************************
723 //
724 //! \brief Enables the counter if possible.
725 //!
726 //! This function can be used to enable the AUX TDC stop/compare event counter.
727 //! The counter can be used to measure multiple periods of a clock signal.
728 //! For each stop/compare event the counter will be decremented by one and
729 //! the measurement will continue running until the value of the counter
730 //! reaches 0. The current value of the counter can be read using
731 //! \ref AUXTDCCounterGet(). The reset value of the counter can be set using
732 //! \ref AUXTDCCounterSet().
733 //!
734 //! \param ui32Base is base address of the AUX TDC.
735 //!
736 //! \return Returns \c true if the counter was successfully enabled. If the
737 //! AUX TDC is not in Idle mode, the counter can not be enabled, and the
738 //! return value will be \c false.
739 //!
740 //! \sa \ref AUXTDCCounterGet(), \ref AUXTDCCounterSet()
741 //
742 //*****************************************************************************
743 __STATIC_INLINE bool
AUXTDCCounterEnable(uint32_t ui32Base)744 AUXTDCCounterEnable(uint32_t ui32Base)
745 {
746     // Check the arguments.
747     ASSERT(AUXTDCBaseValid(ui32Base));
748 
749     // Check if the AUX TDC is in idle mode. If not in Idle mode, the counter
750     // will not be enabled.
751     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
752             AUX_TDC_STAT_STATE_IDLE))
753     {
754         return false;
755     }
756 
757     // Enable the counter.
758     HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = AUX_TDC_TRIGCNTCFG_EN;
759 
760     // Counter successfully enabled.
761     return true;
762 }
763 
764 //*****************************************************************************
765 //
766 //! \brief Disables the counter if possible.
767 //!
768 //! This function can be used to disable the AUX TDC stop/compare event counter.
769 //!
770 //! \param ui32Base is base address of the AUX TDC.
771 //!
772 //! \return Returns \c true if the counter was successfully disabled. If the
773 //! AUX TDC is not in Idle mode, the counter can not be disabled, and the
774 //! return value will be \c false.
775 //!
776 //! \sa \ref AUXTDCCounterEnable() for more information on how to use the counter.
777 //
778 //*****************************************************************************
779 __STATIC_INLINE bool
AUXTDCCounterDisable(uint32_t ui32Base)780 AUXTDCCounterDisable(uint32_t ui32Base)
781 {
782     // Check the arguments.
783     ASSERT(AUXTDCBaseValid(ui32Base));
784 
785     // Check if the AUX TDC is in Idle mode. If not in Idle mode, the counter
786     // will not be disabled.
787     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
788             AUX_TDC_STAT_STATE_IDLE))
789     {
790         return false;
791     }
792 
793     // Disable the counter.
794     HWREG(ui32Base + AUX_TDC_O_TRIGCNTCFG) = 0;
795 
796     // Counter successfully disabled.
797     return true;
798 }
799 
800 //*****************************************************************************
801 //
802 //! \brief Set the reset number of counter compare/stop event to ignore before taking
803 //! a measurement.
804 //!
805 //! This function loads the reset value of the counter with the specified
806 //! number of events to ignore. A reset in this context means the counter
807 //! has been disabled and then enabled.
808 //!
809 //! \param ui32Base is base address of the AUX TDC.
810 //! \param ui32Events is the number of compare/stop events to load into the
811 //! counter.
812 //!
813 //! \return Returns \c true if the counter was successfully updated. If the
814 //! AUX TDC is not in Idle mode, the counter can not be updated, and the
815 //! return value will be \c false.
816 //!
817 //! \sa \ref AUXTDCCounterEnable()
818 //
819 //*****************************************************************************
820 __STATIC_INLINE bool
AUXTDCCounterSet(uint32_t ui32Base,uint32_t ui32Events)821 AUXTDCCounterSet(uint32_t ui32Base, uint32_t ui32Events)
822 {
823     // Check the arguments.
824     ASSERT(AUXTDCBaseValid(ui32Base));
825 
826     // Check if the AUX TDC is in idle mode. If not in idle mode, the counter
827     // will not be disabled.
828     if(!((HWREG(ui32Base + AUX_TDC_O_STAT) & AUX_TDC_STAT_STATE_M) ==
829             AUX_TDC_STAT_STATE_IDLE))
830     {
831         return false;
832     }
833 
834     // Update the reset counter value.
835     HWREG(ui32Base + AUX_TDC_O_TRIGCNTLOAD) = ui32Events;
836 
837     // Counter successfully updated.
838     return true;
839 }
840 
841 //*****************************************************************************
842 //
843 //! \brief Get the current number of counter compare/stop event to ignore before
844 //! taking a measurement.
845 //!
846 //! This function returns the current value of compare/stop events before
847 //! a measurement is registered. This value is decremented by one for each
848 //! registered compare/stop event and will always be less than or equal the
849 //! reset value of the counter set using \ref AUXTDCCounterSet().
850 //!
851 //! \param ui32Base is base address of the AUX TDC.
852 //!
853 //! \return Returns the current value of compare/stop events ignored before a
854 //! measurement is performed.
855 //!
856 //! \sa \ref AUXTDCCounterEnable().
857 //
858 //*****************************************************************************
859 __STATIC_INLINE uint32_t
AUXTDCCounterGet(uint32_t ui32Base)860 AUXTDCCounterGet(uint32_t ui32Base)
861 {
862     // Check the arguments.
863     ASSERT(AUXTDCBaseValid(ui32Base));
864 
865     // Return the current counter value.
866     return (HWREG(ui32Base + AUX_TDC_O_TRIGCNT));
867 }
868 
869 //*****************************************************************************
870 //
871 // Support for DriverLib in ROM:
872 // Redirect to implementation in ROM when available.
873 //
874 //*****************************************************************************
875 #if !defined(DRIVERLIB_NOROM) && !defined(DOXYGEN)
876     #include "../driverlib/rom.h"
877     #ifdef ROM_AUXTDCConfigSet
878         #undef  AUXTDCConfigSet
879         #define AUXTDCConfigSet                 ROM_AUXTDCConfigSet
880     #endif
881     #ifdef ROM_AUXTDCMeasurementDone
882         #undef  AUXTDCMeasurementDone
883         #define AUXTDCMeasurementDone           ROM_AUXTDCMeasurementDone
884     #endif
885 #endif
886 
887 //*****************************************************************************
888 //
889 // Mark the end of the C bindings section for C++ compilers.
890 //
891 //*****************************************************************************
892 #ifdef __cplusplus
893 }
894 #endif
895 
896 #endif // __AUX_TDC_H__
897 
898 //*****************************************************************************
899 //
900 //! Close the Doxygen group.
901 //! @}
902 //! @}
903 //
904 //*****************************************************************************
905