1 /******************************************************************************
2 * Filename: aon_pmctl.h
3 * Revised: 2020-08-19 12:18:33 +0200 (Wed, 19 Aug 2020)
4 * Revision: 58172
5 *
6 * Description: Defines and prototypes for the AON Power-Management Controller
7 *
8 * Copyright (c) 2015 - 2020, Texas Instruments Incorporated
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are met:
13 *
14 * 1) Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 *
17 * 2) Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 *
21 * 3) Neither the name of the ORGANIZATION nor the names of its contributors may
22 * be used to endorse or promote products derived from this software without
23 * specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
29 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 *
37 ******************************************************************************/
38
39 //*****************************************************************************
40 //
41 //! \addtogroup aon_group
42 //! @{
43 //! \addtogroup aonpmctl_api
44 //! @{
45 //
46 //*****************************************************************************
47
48 #ifndef __AON_PMCTL_H__
49 #define __AON_PMCTL_H__
50
51 //*****************************************************************************
52 //
53 // If building with a C++ compiler, make all of the definitions in this header
54 // have a C binding.
55 //
56 //*****************************************************************************
57 #ifdef __cplusplus
58 extern "C"
59 {
60 #endif
61
62 #include <stdbool.h>
63 #include <stdint.h>
64 #include "../inc/hw_types.h"
65 #include "../inc/hw_memmap.h"
66 #include "../inc/hw_aon_pmctl.h"
67 #include "debug.h"
68
69 //*****************************************************************************
70 //
71 // Defines that can be be used to enable/disable the retention on the SRAM
72 // banks during power off of the MCU BUS domain. The defines can be passed to
73 // AONPMCTLMcuSRamConfig) .
74 //
75 //*****************************************************************************
76 #define MCU_RAM_RET_NONE AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_NONE
77 #define MCU_RAM_RET_LVL1 AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL1
78 #define MCU_RAM_RET_LVL2 AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL2
79 #define MCU_RAM_RET_LVL3 AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL3
80 #define MCU_RAM_RET_FULL AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_FULL
81
82 //*****************************************************************************
83 //
84 // Defines for all the different power modes available through
85 // AONPMCTLPowerStatusGet() .
86 //
87 //*****************************************************************************
88 #define AONPMCTL_JTAG_POWER_ON AON_PMCTL_PWRSTAT_JTAG_PD_ON
89
90 //*****************************************************************************
91 //
92 // API Functions and prototypes
93 //
94 //*****************************************************************************
95
96 //*****************************************************************************
97 //
98 //! \brief Configure the retention on the block SRAM in the MCU BUS domain.
99 //!
100 //! MCU SRAM is partitioned into 5 banks of 16 KB each. The SRAM supports
101 //! retention on all 5 banks during MCU BUS domain power off. The retention
102 //! on the SRAM can be turned on and off. Use this function to enable the
103 //! retention on the banks.
104 //!
105 //! If a group of banks is not represented in the parameter \c ui32Retention
106 //! then the retention will be disabled for that bank group during MCU BUS
107 //! domain power off.
108 //!
109 //! \note Retention on all SRAM banks is enabled by default. Configuration of
110 //! individual SRAM banks is not supported. Configuration is only supported
111 //! on bank group level.
112 //!
113 //! \param ui32Retention defines which groups of SRAM banks to enable/disable
114 //! retention on:
115 //! - \ref MCU_RAM_RET_NONE Retention is disabled
116 //! - \ref MCU_RAM_RET_LVL1 Retention on for banks 0 and 1
117 //! - \ref MCU_RAM_RET_LVL2 Retention on for banks 0, 1 and 2
118 //! - \ref MCU_RAM_RET_LVL3 Retention on for banks 0, 1, 2 and 3
119 //! - \ref MCU_RAM_RET_FULL Retention on for all five banks
120 //!
121 //! \return None
122 //
123 //*****************************************************************************
124 __STATIC_INLINE void
AONPMCTLMcuSRamRetConfig(uint32_t ui32Retention)125 AONPMCTLMcuSRamRetConfig(uint32_t ui32Retention)
126 {
127 uint32_t ui32Reg;
128
129 // Check the arguments.
130 ASSERT((ui32Retention == MCU_RAM_RET_NONE) ||
131 (ui32Retention == MCU_RAM_RET_LVL1) ||
132 (ui32Retention == MCU_RAM_RET_LVL2) ||
133 (ui32Retention == MCU_RAM_RET_LVL3) ||
134 (ui32Retention == MCU_RAM_RET_FULL));
135
136 // Configure the retention.
137 ui32Reg = HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) & ~AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_M;
138 ui32Reg |= ui32Retention;
139 HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) = ui32Reg;
140 }
141
142 //*****************************************************************************
143 //
144 //! \brief Get the power status of the Always On (AON) domain.
145 //!
146 //! This function reports the power management status in AON.
147 //!
148 //! \return Returns the current power status of the device as a bitwise OR'ed
149 //! combination of these values:
150 //! - \ref AONPMCTL_JTAG_POWER_ON
151 //
152 //*****************************************************************************
153 __STATIC_INLINE uint32_t
AONPMCTLPowerStatusGet(void)154 AONPMCTLPowerStatusGet(void)
155 {
156 // Return the power status.
157 return (HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRSTAT));
158 }
159
160
161 //*****************************************************************************
162 //
163 //! \brief Request power off of the JTAG domain.
164 //!
165 //! The JTAG domain is automatically powered up on if a debugger is connected.
166 //! If a debugger is not connected this function can be used to power off the
167 //! JTAG domain.
168 //!
169 //! \note Achieving the lowest power modes (shutdown/powerdown) requires the
170 //! JTAG domain to be turned off. In general the JTAG domain should never be
171 //! powered in production code.
172 //!
173 //! \return None
174 //
175 //*****************************************************************************
176 __STATIC_INLINE void
AONPMCTLJtagPowerOff(void)177 AONPMCTLJtagPowerOff(void)
178 {
179 // Request the power off of the JTAG domain
180 HWREG(AON_PMCTL_BASE + AON_PMCTL_O_JTAGCFG) = 0;
181 }
182
183
184 //*****************************************************************************
185 //
186 // Mark the end of the C bindings section for C++ compilers.
187 //
188 //*****************************************************************************
189 #ifdef __cplusplus
190 }
191 #endif
192
193 #endif // __AON_PMCTL_H__
194
195 //*****************************************************************************
196 //
197 //! Close the Doxygen group.
198 //! @}
199 //! @}
200 //
201 //*****************************************************************************
202