1 /* 2 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 8 * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 11 * Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the 14 * distribution. 15 * 16 * Neither the name of Texas Instruments Incorporated nor the names of 17 * its contributors may be used to endorse or promote products derived 18 * from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 * 32 */ 33 //***************************************************************************** 34 // 35 // aes.h 36 // 37 // Defines and Macros for the AES module. 38 // 39 //***************************************************************************** 40 41 #ifndef __DRIVERLIB_AES_H__ 42 #define __DRIVERLIB_AES_H__ 43 44 //***************************************************************************** 45 // 46 // If building with a C++ compiler, make all of the definitions in this header 47 // have a C binding. 48 // 49 //***************************************************************************** 50 #ifdef __cplusplus 51 extern "C" 52 { 53 #endif 54 55 //***************************************************************************** 56 // 57 // The following defines are used to specify the operation direction in the 58 // ui32Config argument in the AESConfig function. Only one is permitted. 59 // 60 //***************************************************************************** 61 #define AES_CFG_DIR_ENCRYPT 0x00000004 62 #define AES_CFG_DIR_DECRYPT 0x00000000 63 64 //***************************************************************************** 65 // 66 // The following defines are used to specify the key size in the ui32Config 67 // argument in the AESConfig function. Only one is permitted. 68 // 69 //***************************************************************************** 70 #define AES_CFG_KEY_SIZE_128BIT 0x00000008 71 #define AES_CFG_KEY_SIZE_192BIT 0x00000010 72 #define AES_CFG_KEY_SIZE_256BIT 0x00000018 73 74 //***************************************************************************** 75 // 76 // The following defines are used to specify the mode of operation in the 77 // ui32Config argument in the AESConfig function. Only one is permitted. 78 // 79 //***************************************************************************** 80 #define AES_CFG_MODE_M 0x2007fe60 81 #define AES_CFG_MODE_ECB 0x00000000 82 #define AES_CFG_MODE_CBC 0x00000020 83 #define AES_CFG_MODE_CTR 0x00000040 84 #define AES_CFG_MODE_ICM 0x00000200 85 #define AES_CFG_MODE_CFB 0x00000400 86 #define AES_CFG_MODE_XTS_TWEAKJL \ 87 0x00000800 88 #define AES_CFG_MODE_XTS_K2IJL \ 89 0x00001000 90 #define AES_CFG_MODE_XTS_K2ILJ0 \ 91 0x00001800 92 #define AES_CFG_MODE_F8 0x00002000 93 #define AES_CFG_MODE_F9 0x20004000 94 #define AES_CFG_MODE_CBCMAC 0x20008000 95 #define AES_CFG_MODE_GCM_HLY0ZERO \ 96 0x20010040 97 #define AES_CFG_MODE_GCM_HLY0CALC \ 98 0x20020040 99 #define AES_CFG_MODE_GCM_HY0CALC \ 100 0x20030040 101 #define AES_CFG_MODE_CCM 0x20040040 102 103 //***************************************************************************** 104 // 105 // The following defines are used to specify the counter width in the 106 // ui32Config argument in the AESConfig function. It is only required to 107 // be defined when using CTR, CCM, or GCM modes. Only one length is permitted. 108 // 109 //***************************************************************************** 110 #define AES_CFG_CTR_WIDTH_32 0x00000000 111 #define AES_CFG_CTR_WIDTH_64 0x00000080 112 #define AES_CFG_CTR_WIDTH_96 0x00000100 113 #define AES_CFG_CTR_WIDTH_128 0x00000180 114 115 //***************************************************************************** 116 // 117 // The following defines are used to define the width of the length field for 118 // CCM operation through the ui32Config argument in the AESConfig function. 119 // This value is also known as L. Only one is permitted. 120 // 121 //***************************************************************************** 122 #define AES_CFG_CCM_L_2 0x00080000 123 #define AES_CFG_CCM_L_4 0x00180000 124 #define AES_CFG_CCM_L_8 0x00380000 125 126 //***************************************************************************** 127 // 128 // The following defines are used to define the length of the authentication 129 // field for CCM operations through the ui32Config argument in the AESConfig 130 // function. This value is also known as M. Only one is permitted. 131 // 132 //***************************************************************************** 133 #define AES_CFG_CCM_M_4 0x00400000 134 #define AES_CFG_CCM_M_6 0x00800000 135 #define AES_CFG_CCM_M_8 0x00c00000 136 #define AES_CFG_CCM_M_10 0x01000000 137 #define AES_CFG_CCM_M_12 0x01400000 138 #define AES_CFG_CCM_M_14 0x01800000 139 #define AES_CFG_CCM_M_16 0x01c00000 140 141 //***************************************************************************** 142 // 143 // Interrupt flags for use with the AESIntEnable, AESIntDisable, and 144 // AESIntStatus functions. 145 // 146 //***************************************************************************** 147 #define AES_INT_CONTEXT_IN 0x00000001 148 #define AES_INT_CONTEXT_OUT 0x00000008 149 #define AES_INT_DATA_IN 0x00000002 150 #define AES_INT_DATA_OUT 0x00000004 151 #define AES_INT_DMA_CONTEXT_IN 0x00010000 152 #define AES_INT_DMA_CONTEXT_OUT 0x00020000 153 #define AES_INT_DMA_DATA_IN 0x00040000 154 #define AES_INT_DMA_DATA_OUT 0x00080000 155 156 //***************************************************************************** 157 // 158 // Defines used when enabling and disabling DMA requests in the 159 // AESEnableDMA and AESDisableDMA functions. 160 // 161 //***************************************************************************** 162 #define AES_DMA_DATA_IN 0x00000040 163 #define AES_DMA_DATA_OUT 0x00000020 164 #define AES_DMA_CONTEXT_IN 0x00000080 165 #define AES_DMA_CONTEXT_OUT 0x00000100 166 167 //***************************************************************************** 168 // 169 // Function prototypes. 170 // 171 //***************************************************************************** 172 extern void AESConfigSet(uint32_t ui32Base, uint32_t ui32Config); 173 extern void AESKey1Set(uint32_t ui32Base, uint8_t *pui8Key, 174 uint32_t ui32Keysize); 175 extern void AESKey2Set(uint32_t ui32Base, uint8_t *pui8Key, 176 uint32_t ui32Keysize); 177 extern void AESKey3Set(uint32_t ui32Base, uint8_t *pui8Key); 178 extern void AESIVSet(uint32_t ui32Base, uint8_t *pui8IVdata); 179 extern void AESIVGet(uint32_t ui32Base, uint8_t *pui8IVdata); 180 extern void AESTagRead(uint32_t ui32Base, uint8_t *pui8TagData); 181 extern void AESDataLengthSet(uint32_t ui32Base, uint64_t ui64Length); 182 extern void AESAuthDataLengthSet(uint32_t ui32Base, uint32_t ui32Length); 183 extern bool AESDataReadNonBlocking(uint32_t ui32Base, uint8_t *pui8Dest, 184 uint8_t ui8Length); 185 extern void AESDataRead(uint32_t ui32Base, uint8_t *pui8Dest, 186 uint8_t ui8Length); 187 extern bool AESDataWriteNonBlocking(uint32_t ui32Base, uint8_t *pui8Src, 188 uint8_t ui8Length); 189 extern void AESDataWrite(uint32_t ui32Base, uint8_t *pui8Src, 190 uint8_t ui8Length); 191 extern bool AESDataProcess(uint32_t ui32Base, uint8_t *pui8Src, 192 uint8_t *pui8Dest, 193 uint32_t ui32Length); 194 extern bool AESDataMAC(uint32_t ui32Base, uint8_t *pui8Src, 195 uint32_t ui32Length, 196 uint8_t *pui8Tag); 197 extern bool AESDataProcessAE(uint32_t ui32Base, uint8_t *pui8Src, 198 uint8_t *pui8Dest, uint32_t ui32Length, 199 uint8_t *pui8AuthSrc, uint32_t ui32AuthLength, 200 uint8_t *pui8Tag); 201 extern uint32_t AESIntStatus(uint32_t ui32Base, bool bMasked); 202 extern void AESIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags); 203 extern void AESIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags); 204 extern void AESIntClear(uint32_t ui32Base, uint32_t ui32IntFlags); 205 extern void AESIntRegister(uint32_t ui32Base, void(*pfnHandler)(void)); 206 extern void AESIntUnregister(uint32_t ui32Base); 207 extern void AESDMAEnable(uint32_t ui32Base, uint32_t ui32Flags); 208 extern void AESDMADisable(uint32_t ui32Base, uint32_t ui32Flags); 209 210 //***************************************************************************** 211 // 212 // Mark the end of the C bindings section for C++ compilers. 213 // 214 //***************************************************************************** 215 #ifdef __cplusplus 216 } 217 #endif 218 219 #endif // __DRIVERLIB_AES_H__ 220