1 /****************************************************************************** 2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK") 3 * All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 *****************************************************************************/ 18 19 #include "b91_bt_buffer.h" 20 21 /******* ACL connection LinkLayer TX & RX data FIFO allocation, Begin ********/ 22 u8 app_acl_rxfifo[ACL_RX_FIFO_SIZE * ACL_RX_FIFO_NUM] = {0}; 23 #ifdef CONFIG_BT_CENTRAL 24 u8 app_acl_mstTxfifo[ACL_MASTER_TX_FIFO_SIZE * ACL_MASTER_TX_FIFO_NUM * 25 CONFIG_B91_BLE_CTRL_MASTER_MAX_NUM] = {0}; 26 #endif /* CONFIG_BT_CENTRAL */ 27 #ifdef CONFIG_BT_PERIPHERAL 28 u8 app_acl_slvTxfifo[ACL_SLAVE_TX_FIFO_SIZE * ACL_SLAVE_TX_FIFO_NUM * 29 CONFIG_B91_BLE_CTRL_SLAVE_MAX_NUM] = {0}; 30 #endif /* CONFIG_BT_PERIPHERAL */ 31 /******** HCI TX & RX data FIFO allocation, Begin ***************************/ 32 u8 app_hci_rxfifo[HCI_RX_FIFO_SIZE * HCI_RX_FIFO_NUM] = {0}; 33 u8 app_hci_txfifo[HCI_TX_FIFO_SIZE * HCI_TX_FIFO_NUM] = {0}; 34 u8 app_hci_rxAclfifo[HCI_RX_ACL_FIFO_SIZE * HCI_RX_ACL_FIFO_NUM] = {0}; 35
