1 /** 2 ****************************************************************************** 3 * @file stm32wbaxx_hal_sai.h 4 * @author MCD Application Team 5 * @brief Header file of SAI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBAxx_HAL_SAI_H 21 #define STM32WBAxx_HAL_SAI_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbaxx_hal_def.h" 29 30 /** @addtogroup STM32WBAxx_HAL_Driver 31 * @{ 32 */ 33 #if defined (SAI1) 34 /** @addtogroup SAI 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SAI_Exported_Types SAI Exported Types 40 * @{ 41 */ 42 43 /** @defgroup SAI_PDM_Structure_definition SAI PDM Structure definition 44 * @brief SAI PDM Init structure definition 45 * @{ 46 */ 47 typedef struct 48 { 49 FunctionalState Activation; /*!< Enable/disable PDM interface */ 50 uint32_t MicPairsNbr; /*!< Specifies the number of microphone pairs used. 51 This parameter must be a number between Min_Data = 1 and Max_Data = 2. */ 52 uint32_t ClockEnable; /*!< Specifies which clock must be enabled. 53 This parameter can be a values combination of @ref SAI_PDM_ClockEnable */ 54 } SAI_PdmInitTypeDef; 55 /** 56 * @} 57 */ 58 59 /** @defgroup SAI_Init_Structure_definition SAI Init Structure definition 60 * @brief SAI Init Structure definition 61 * @{ 62 */ 63 typedef struct 64 { 65 uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode. 66 This parameter can be a value of @ref SAI_Block_Mode */ 67 68 uint32_t Synchro; /*!< Specifies SAI Block synchronization 69 This parameter can be a value of @ref SAI_Block_Synchronization */ 70 71 uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common 72 for BlockA and BlockB 73 This parameter can be a value of @ref SAI_Block_SyncExt 74 @note If both audio blocks of same SAI are used, this parameter has 75 to be set to the same value for each audio block */ 76 77 uint32_t MckOutput; /*!< Specifies whether master clock output will be generated or not. 78 This parameter can be a value of @ref SAI_Block_MckOutput */ 79 80 uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven. 81 This parameter can be a value of @ref SAI_Block_Output_Drive 82 @note This value has to be set before enabling the audio block 83 but after the audio block configuration. */ 84 85 uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not. 86 This parameter can be a value of @ref SAI_Block_NoDivider 87 @note If bit NODIV in the SAI_xCR1 register is cleared, the frame length 88 should be aligned to a number equal to a power of 2, from 8 to 256. 89 If bit NODIV in the SAI_xCR1 register is set, the frame length can 90 take any of the values from 8 to 256. */ 91 92 uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold. 93 This parameter can be a value of @ref SAI_Block_Fifo_Threshold */ 94 95 uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling. 96 This parameter can be a value of @ref SAI_Audio_Frequency */ 97 98 uint32_t Mckdiv; /*!< Specifies the master clock divider. 99 This parameter must be a number between Min_Data = 0 and Max_Data = 63. 100 @note This parameter is used only if AudioFrequency is set to 101 SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */ 102 103 uint32_t MckOverSampling; /*!< Specifies the master clock oversampling. 104 This parameter can be a value of @ref SAI_Block_Mck_OverSampling */ 105 106 uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected. 107 This parameter can be a value of @ref SAI_Mono_Stereo_Mode */ 108 109 uint32_t CompandingMode; /*!< Specifies the companding mode type. 110 This parameter can be a value of @ref SAI_Block_Companding_Mode */ 111 112 uint32_t TriState; /*!< Specifies the companding mode type. 113 This parameter can be a value of @ref SAI_TRIState_Management */ 114 115 SAI_PdmInitTypeDef PdmInit; /*!< Specifies the PDM configuration. */ 116 117 /* This part of the structure is automatically filled if your are using the high level initialisation 118 function HAL_SAI_InitProtocol */ 119 120 uint32_t Protocol; /*!< Specifies the SAI Block protocol. 121 This parameter can be a value of @ref SAI_Block_Protocol */ 122 123 uint32_t DataSize; /*!< Specifies the SAI Block data size. 124 This parameter can be a value of @ref SAI_Block_Data_Size */ 125 126 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. 127 This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */ 128 129 uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity. 130 This parameter can be a value of @ref SAI_Block_Clock_Strobing */ 131 } SAI_InitTypeDef; 132 133 /** 134 * @brief HAL State structures definition 135 */ 136 typedef enum 137 { 138 HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */ 139 HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */ 140 HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */ 141 HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */ 142 HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */ 143 } HAL_SAI_StateTypeDef; 144 145 /** 146 * @brief SAI Callback prototype 147 */ 148 typedef void (*SAIcallback)(void); 149 150 /** 151 * @} 152 */ 153 154 /** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition 155 * @brief SAI Frame Init structure definition 156 * @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware). 157 * @{ 158 */ 159 typedef struct 160 { 161 162 uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame. 163 This parameter must be a number between Min_Data = 8 and Max_Data = 256. 164 @note If master clock MCLK_x pin is declared as an output, the frame length 165 should be aligned to a number equal to power of 2 in order to keep 166 in an audio frame, an integer number of MCLK pulses by bit Clock. */ 167 168 uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length. 169 This Parameter specifies the length in number of bit clock (SCK + 1) 170 of the active level of FS signal in audio frame. 171 This parameter must be a number between Min_Data = 1 and Max_Data = 128 */ 172 173 uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition. 174 This parameter can be a value of @ref SAI_Block_FS_Definition */ 175 176 uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity. 177 This parameter can be a value of @ref SAI_Block_FS_Polarity */ 178 179 uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset. 180 This parameter can be a value of @ref SAI_Block_FS_Offset */ 181 182 } SAI_FrameInitTypeDef; 183 /** 184 * @} 185 */ 186 187 /** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition 188 * @brief SAI Block Slot Init Structure definition 189 * @note For SPDIF protocol, these parameters are not used (set by hardware). 190 * @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware). 191 * @{ 192 */ 193 typedef struct 194 { 195 uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot. 196 This parameter must be a number between Min_Data = 0 and Max_Data = 24 */ 197 198 uint32_t SlotSize; /*!< Specifies the Slot Size. 199 This parameter can be a value of @ref SAI_Block_Slot_Size */ 200 201 uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame. 202 This parameter must be a number between Min_Data = 1 and Max_Data = 16 */ 203 204 uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated. 205 This parameter can be a value of @ref SAI_Block_Slot_Active */ 206 } SAI_SlotInitTypeDef; 207 /** 208 * @} 209 */ 210 211 /** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition 212 * @brief SAI handle Structure definition 213 * @{ 214 */ 215 typedef struct __SAI_HandleTypeDef 216 { 217 SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */ 218 219 SAI_InitTypeDef Init; /*!< SAI communication parameters */ 220 221 SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */ 222 223 SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */ 224 225 uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */ 226 227 uint16_t XferSize; /*!< SAI transfer size */ 228 229 uint16_t XferCount; /*!< SAI transfer counter */ 230 231 DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */ 232 233 DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */ 234 235 SAIcallback mutecallback; /*!< SAI mute callback */ 236 237 void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */ 238 239 HAL_LockTypeDef Lock; /*!< SAI locking object */ 240 241 __IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */ 242 243 __IO uint32_t ErrorCode; /*!< SAI Error code */ 244 245 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 246 void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */ 247 void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */ 248 void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */ 249 void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */ 250 void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */ 251 void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */ 252 void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */ 253 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 254 } SAI_HandleTypeDef; 255 256 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 257 /** 258 * @brief SAI callback ID enumeration definition 259 */ 260 typedef enum 261 { 262 HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */ 263 HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */ 264 HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */ 265 HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */ 266 HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */ 267 HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */ 268 HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */ 269 } HAL_SAI_CallbackIDTypeDef; 270 271 /** 272 * @brief SAI callback pointer definition 273 */ 274 typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai); 275 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 276 /** 277 * @} 278 */ 279 280 /** 281 * @} 282 */ 283 284 /* Exported constants --------------------------------------------------------*/ 285 /** @defgroup SAI_Exported_Constants SAI Exported Constants 286 * @{ 287 */ 288 289 /** @defgroup SAI_Error_Code SAI Error Code 290 * @{ 291 */ 292 #define HAL_SAI_ERROR_NONE 0x00000000U /*!< No error */ 293 #define HAL_SAI_ERROR_OVR 0x00000001U /*!< Overrun Error */ 294 #define HAL_SAI_ERROR_UDR 0x00000002U /*!< Underrun error */ 295 #define HAL_SAI_ERROR_AFSDET 0x00000004U /*!< Anticipated Frame synchronisation detection */ 296 #define HAL_SAI_ERROR_LFSDET 0x00000008U /*!< Late Frame synchronisation detection */ 297 #define HAL_SAI_ERROR_CNREADY 0x00000010U /*!< codec not ready */ 298 #define HAL_SAI_ERROR_WCKCFG 0x00000020U /*!< Wrong clock configuration */ 299 #define HAL_SAI_ERROR_TIMEOUT 0x00000040U /*!< Timeout error */ 300 #define HAL_SAI_ERROR_DMA 0x00000080U /*!< DMA error */ 301 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 302 #define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */ 303 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 304 /** 305 * @} 306 */ 307 308 /** @defgroup SAI_Block_SyncExt SAI External synchronisation 309 * @{ 310 */ 311 #define SAI_SYNCEXT_DISABLE 0U 312 #define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1U 313 #define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2U 314 /** 315 * @} 316 */ 317 318 /** @defgroup SAI_Block_MckOutput SAI Block Master Clock Output 319 * @{ 320 */ 321 #define SAI_MCK_OUTPUT_DISABLE 0x00000000U 322 #define SAI_MCK_OUTPUT_ENABLE SAI_xCR1_MCKEN 323 /** 324 * @} 325 */ 326 327 /** @defgroup SAI_Protocol SAI Supported protocol 328 * @{ 329 */ 330 #define SAI_I2S_STANDARD 0U 331 #define SAI_I2S_MSBJUSTIFIED 1U 332 #define SAI_I2S_LSBJUSTIFIED 2U 333 #define SAI_PCM_LONG 3U 334 #define SAI_PCM_SHORT 4U 335 /** 336 * @} 337 */ 338 339 /** @defgroup SAI_Protocol_DataSize SAI protocol data size 340 * @{ 341 */ 342 #define SAI_PROTOCOL_DATASIZE_16BIT 0U 343 #define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1U 344 #define SAI_PROTOCOL_DATASIZE_24BIT 2U 345 #define SAI_PROTOCOL_DATASIZE_32BIT 3U 346 /** 347 * @} 348 */ 349 350 /** @defgroup SAI_Audio_Frequency SAI Audio Frequency 351 * @{ 352 */ 353 #define SAI_AUDIO_FREQUENCY_192K 192000U 354 #define SAI_AUDIO_FREQUENCY_96K 96000U 355 #define SAI_AUDIO_FREQUENCY_48K 48000U 356 #define SAI_AUDIO_FREQUENCY_44K 44100U 357 #define SAI_AUDIO_FREQUENCY_32K 32000U 358 #define SAI_AUDIO_FREQUENCY_24K 24000U 359 #define SAI_AUDIO_FREQUENCY_22K 22050U 360 #define SAI_AUDIO_FREQUENCY_16K 16000U 361 #define SAI_AUDIO_FREQUENCY_11K 11025U 362 #define SAI_AUDIO_FREQUENCY_8K 8000U 363 #define SAI_AUDIO_FREQUENCY_MCKDIV 0U 364 /** 365 * @} 366 */ 367 368 /** @defgroup SAI_Block_Mck_OverSampling SAI Block Master Clock OverSampling 369 * @{ 370 */ 371 #define SAI_MCK_OVERSAMPLING_DISABLE 0x00000000U 372 #define SAI_MCK_OVERSAMPLING_ENABLE SAI_xCR1_OSR 373 /** 374 * @} 375 */ 376 377 /** @defgroup SAI_PDM_ClockEnable SAI PDM Clock Enable 378 * @{ 379 */ 380 #define SAI_PDM_CLOCK1_ENABLE SAI_PDMCR_CKEN1 381 #define SAI_PDM_CLOCK2_ENABLE SAI_PDMCR_CKEN2 382 /** 383 * @} 384 */ 385 386 /** @defgroup SAI_Block_Mode SAI Block Mode 387 * @{ 388 */ 389 #define SAI_MODEMASTER_TX 0x00000000U 390 #define SAI_MODEMASTER_RX SAI_xCR1_MODE_0 391 #define SAI_MODESLAVE_TX SAI_xCR1_MODE_1 392 #define SAI_MODESLAVE_RX (SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0) 393 394 /** 395 * @} 396 */ 397 398 /** @defgroup SAI_Block_Protocol SAI Block Protocol 399 * @{ 400 */ 401 #define SAI_FREE_PROTOCOL 0x00000000U 402 #define SAI_SPDIF_PROTOCOL SAI_xCR1_PRTCFG_0 403 #define SAI_AC97_PROTOCOL SAI_xCR1_PRTCFG_1 404 /** 405 * @} 406 */ 407 408 /** @defgroup SAI_Block_Data_Size SAI Block Data Size 409 * @{ 410 */ 411 #define SAI_DATASIZE_8 SAI_xCR1_DS_1 412 #define SAI_DATASIZE_10 (SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 413 #define SAI_DATASIZE_16 SAI_xCR1_DS_2 414 #define SAI_DATASIZE_20 (SAI_xCR1_DS_2 | SAI_xCR1_DS_0) 415 #define SAI_DATASIZE_24 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1) 416 #define SAI_DATASIZE_32 (SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0) 417 /** 418 * @} 419 */ 420 421 /** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission 422 * @{ 423 */ 424 #define SAI_FIRSTBIT_MSB 0x00000000U 425 #define SAI_FIRSTBIT_LSB SAI_xCR1_LSBFIRST 426 /** 427 * @} 428 */ 429 430 /** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing 431 * @{ 432 */ 433 #define SAI_CLOCKSTROBING_FALLINGEDGE 0U 434 #define SAI_CLOCKSTROBING_RISINGEDGE 1U 435 /** 436 * @} 437 */ 438 439 /** @defgroup SAI_Block_Synchronization SAI Block Synchronization 440 * @{ 441 */ 442 #define SAI_ASYNCHRONOUS 0U /*!< Asynchronous */ 443 #define SAI_SYNCHRONOUS 1U /*!< Synchronous with other block of same SAI */ 444 #define SAI_SYNCHRONOUS_EXT_SAI1 2U /*!< Synchronous with other SAI, SAI1 */ 445 #define SAI_SYNCHRONOUS_EXT_SAI2 3U /*!< Synchronous with other SAI, SAI2 */ 446 /** 447 * @} 448 */ 449 450 /** @defgroup SAI_Block_Output_Drive SAI Block Output Drive 451 * @{ 452 */ 453 #define SAI_OUTPUTDRIVE_DISABLE 0x00000000U 454 #define SAI_OUTPUTDRIVE_ENABLE SAI_xCR1_OUTDRIV 455 /** 456 * @} 457 */ 458 459 /** @defgroup SAI_Block_NoDivider SAI Block NoDivider 460 * @{ 461 */ 462 #define SAI_MASTERDIVIDER_ENABLE 0x00000000U 463 #define SAI_MASTERDIVIDER_DISABLE SAI_xCR1_NODIV 464 /** 465 * @} 466 */ 467 468 /** @defgroup SAI_Block_FS_Definition SAI Block FS Definition 469 * @{ 470 */ 471 #define SAI_FS_STARTFRAME 0x00000000U 472 #define SAI_FS_CHANNEL_IDENTIFICATION SAI_xFRCR_FSDEF 473 /** 474 * @} 475 */ 476 477 /** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity 478 * @{ 479 */ 480 #define SAI_FS_ACTIVE_LOW 0x00000000U 481 #define SAI_FS_ACTIVE_HIGH SAI_xFRCR_FSPOL 482 /** 483 * @} 484 */ 485 486 /** @defgroup SAI_Block_FS_Offset SAI Block FS Offset 487 * @{ 488 */ 489 #define SAI_FS_FIRSTBIT 0x00000000U 490 #define SAI_FS_BEFOREFIRSTBIT SAI_xFRCR_FSOFF 491 /** 492 * @} 493 */ 494 495 /** @defgroup SAI_Block_Slot_Size SAI Block Slot Size 496 * @{ 497 */ 498 #define SAI_SLOTSIZE_DATASIZE 0x00000000U 499 #define SAI_SLOTSIZE_16B SAI_xSLOTR_SLOTSZ_0 500 #define SAI_SLOTSIZE_32B SAI_xSLOTR_SLOTSZ_1 501 /** 502 * @} 503 */ 504 505 /** @defgroup SAI_Block_Slot_Active SAI Block Slot Active 506 * @{ 507 */ 508 #define SAI_SLOT_NOTACTIVE 0x00000000U 509 #define SAI_SLOTACTIVE_0 0x00000001U 510 #define SAI_SLOTACTIVE_1 0x00000002U 511 #define SAI_SLOTACTIVE_2 0x00000004U 512 #define SAI_SLOTACTIVE_3 0x00000008U 513 #define SAI_SLOTACTIVE_4 0x00000010U 514 #define SAI_SLOTACTIVE_5 0x00000020U 515 #define SAI_SLOTACTIVE_6 0x00000040U 516 #define SAI_SLOTACTIVE_7 0x00000080U 517 #define SAI_SLOTACTIVE_8 0x00000100U 518 #define SAI_SLOTACTIVE_9 0x00000200U 519 #define SAI_SLOTACTIVE_10 0x00000400U 520 #define SAI_SLOTACTIVE_11 0x00000800U 521 #define SAI_SLOTACTIVE_12 0x00001000U 522 #define SAI_SLOTACTIVE_13 0x00002000U 523 #define SAI_SLOTACTIVE_14 0x00004000U 524 #define SAI_SLOTACTIVE_15 0x00008000U 525 #define SAI_SLOTACTIVE_ALL 0x0000FFFFU 526 /** 527 * @} 528 */ 529 530 /** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode 531 * @{ 532 */ 533 #define SAI_STEREOMODE 0x00000000U 534 #define SAI_MONOMODE SAI_xCR1_MONO 535 /** 536 * @} 537 */ 538 539 /** @defgroup SAI_TRIState_Management SAI TRIState Management 540 * @{ 541 */ 542 #define SAI_OUTPUT_NOTRELEASED 0x00000000U 543 #define SAI_OUTPUT_RELEASED SAI_xCR2_TRIS 544 /** 545 * @} 546 */ 547 548 /** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold 549 * @{ 550 */ 551 #define SAI_FIFOTHRESHOLD_EMPTY 0x00000000U 552 #define SAI_FIFOTHRESHOLD_1QF SAI_xCR2_FTH_0 553 #define SAI_FIFOTHRESHOLD_HF SAI_xCR2_FTH_1 554 #define SAI_FIFOTHRESHOLD_3QF (SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0) 555 #define SAI_FIFOTHRESHOLD_FULL SAI_xCR2_FTH_2 556 /** 557 * @} 558 */ 559 560 /** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode 561 * @{ 562 */ 563 #define SAI_NOCOMPANDING 0x00000000U 564 #define SAI_ULAW_1CPL_COMPANDING SAI_xCR2_COMP_1 565 #define SAI_ALAW_1CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0) 566 #define SAI_ULAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_CPL) 567 #define SAI_ALAW_2CPL_COMPANDING (SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL) 568 /** 569 * @} 570 */ 571 572 /** @defgroup SAI_Block_Mute_Value SAI Block Mute Value 573 * @{ 574 */ 575 #define SAI_ZERO_VALUE 0x00000000U 576 #define SAI_LAST_SENT_VALUE SAI_xCR2_MUTEVAL 577 /** 578 * @} 579 */ 580 581 /** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition 582 * @{ 583 */ 584 #define SAI_IT_OVRUDR SAI_xIMR_OVRUDRIE 585 #define SAI_IT_MUTEDET SAI_xIMR_MUTEDETIE 586 #define SAI_IT_WCKCFG SAI_xIMR_WCKCFGIE 587 #define SAI_IT_FREQ SAI_xIMR_FREQIE 588 #define SAI_IT_CNRDY SAI_xIMR_CNRDYIE 589 #define SAI_IT_AFSDET SAI_xIMR_AFSDETIE 590 #define SAI_IT_LFSDET SAI_xIMR_LFSDETIE 591 /** 592 * @} 593 */ 594 595 /** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition 596 * @{ 597 */ 598 #define SAI_FLAG_OVRUDR SAI_xSR_OVRUDR 599 #define SAI_FLAG_MUTEDET SAI_xSR_MUTEDET 600 #define SAI_FLAG_WCKCFG SAI_xSR_WCKCFG 601 #define SAI_FLAG_FREQ SAI_xSR_FREQ 602 #define SAI_FLAG_CNRDY SAI_xSR_CNRDY 603 #define SAI_FLAG_AFSDET SAI_xSR_AFSDET 604 #define SAI_FLAG_LFSDET SAI_xSR_LFSDET 605 /** 606 * @} 607 */ 608 609 /** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level 610 * @{ 611 */ 612 #define SAI_FIFOSTATUS_EMPTY 0x00000000U 613 #define SAI_FIFOSTATUS_LESS1QUARTERFULL 0x00010000U 614 #define SAI_FIFOSTATUS_1QUARTERFULL 0x00020000U 615 #define SAI_FIFOSTATUS_HALFFULL 0x00030000U 616 #define SAI_FIFOSTATUS_3QUARTERFULL 0x00040000U 617 #define SAI_FIFOSTATUS_FULL 0x00050000U 618 /** 619 * @} 620 */ 621 622 /** 623 * @} 624 */ 625 626 /* Exported macro ------------------------------------------------------------*/ 627 /** @defgroup SAI_Exported_Macros SAI Exported Macros 628 * @brief macros to handle interrupts and specific configurations 629 * @{ 630 */ 631 632 /** @brief Reset SAI handle state. 633 * @param __HANDLE__ specifies the SAI Handle. 634 * @retval None 635 */ 636 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 637 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 638 (__HANDLE__)->State = HAL_SAI_STATE_RESET; \ 639 (__HANDLE__)->MspInitCallback = NULL; \ 640 (__HANDLE__)->MspDeInitCallback = NULL; \ 641 } while(0) 642 #else 643 #define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET) 644 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 645 646 /** @brief Enable the specified SAI interrupts. 647 * @param __HANDLE__ specifies the SAI Handle. 648 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 649 * This parameter can be one of the following values: 650 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 651 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 652 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 653 * @arg SAI_IT_FREQ: FIFO request interrupt enable 654 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 655 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 656 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 657 * @retval None 658 */ 659 #define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__)) 660 661 /** @brief Disable the specified SAI interrupts. 662 * @param __HANDLE__ specifies the SAI Handle. 663 * @param __INTERRUPT__ specifies the interrupt source to enable or disable. 664 * This parameter can be one of the following values: 665 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 666 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 667 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 668 * @arg SAI_IT_FREQ: FIFO request interrupt enable 669 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 670 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 671 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 672 * @retval None 673 */ 674 #define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__))) 675 676 /** @brief Check whether the specified SAI interrupt source is enabled or not. 677 * @param __HANDLE__ specifies the SAI Handle. 678 * @param __INTERRUPT__ specifies the SAI interrupt source to check. 679 * This parameter can be one of the following values: 680 * @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable 681 * @arg SAI_IT_MUTEDET: Mute detection interrupt enable 682 * @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable 683 * @arg SAI_IT_FREQ: FIFO request interrupt enable 684 * @arg SAI_IT_CNRDY: Codec not ready interrupt enable 685 * @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable 686 * @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable 687 * @retval The new state of __INTERRUPT__ (TRUE or FALSE). 688 */ 689 #define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & \ 690 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 691 692 /** @brief Check whether the specified SAI flag is set or not. 693 * @param __HANDLE__ specifies the SAI Handle. 694 * @param __FLAG__ specifies the flag to check. 695 * This parameter can be one of the following values: 696 * @arg SAI_FLAG_OVRUDR: Overrun underrun flag. 697 * @arg SAI_FLAG_MUTEDET: Mute detection flag. 698 * @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag. 699 * @arg SAI_FLAG_FREQ: FIFO request flag. 700 * @arg SAI_FLAG_CNRDY: Codec not ready flag. 701 * @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag. 702 * @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag. 703 * @retval The new state of __FLAG__ (TRUE or FALSE). 704 */ 705 #define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) 706 707 /** @brief Clear the specified SAI pending flag. 708 * @param __HANDLE__ specifies the SAI Handle. 709 * @param __FLAG__ specifies the flag to check. 710 * This parameter can be any combination of the following values: 711 * @arg SAI_FLAG_OVRUDR: Clear Overrun underrun 712 * @arg SAI_FLAG_MUTEDET: Clear Mute detection 713 * @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration 714 * @arg SAI_FLAG_FREQ: Clear FIFO request 715 * @arg SAI_FLAG_CNRDY: Clear Codec not ready 716 * @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection 717 * @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection 718 * 719 * @retval None 720 */ 721 #define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__)) 722 723 /** @brief Enable SAI. 724 * @param __HANDLE__ specifies the SAI Handle. 725 * @retval None 726 */ 727 #define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN) 728 729 /** @brief Disable SAI. 730 * @param __HANDLE__ specifies the SAI Handle. 731 * @retval None 732 */ 733 #define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN) 734 735 /** 736 * @} 737 */ 738 739 /* Include SAI HAL Extension module */ 740 #include "stm32wbaxx_hal_sai_ex.h" 741 742 /* Exported functions --------------------------------------------------------*/ 743 /** @addtogroup SAI_Exported_Functions 744 * @{ 745 */ 746 747 /* Initialization/de-initialization functions ********************************/ 748 /** @addtogroup SAI_Exported_Functions_Group1 749 * @{ 750 */ 751 HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot); 752 HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai); 753 HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai); 754 void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai); 755 void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai); 756 757 #if (USE_HAL_SAI_REGISTER_CALLBACKS == 1) 758 /* SAI callbacks register/unregister functions ********************************/ 759 HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai, 760 HAL_SAI_CallbackIDTypeDef CallbackID, 761 pSAI_CallbackTypeDef pCallback); 762 HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai, 763 HAL_SAI_CallbackIDTypeDef CallbackID); 764 #endif /* USE_HAL_SAI_REGISTER_CALLBACKS */ 765 /** 766 * @} 767 */ 768 769 /* I/O operation functions ***************************************************/ 770 /** @addtogroup SAI_Exported_Functions_Group2 771 * @{ 772 */ 773 /* Blocking mode: Polling */ 774 HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 775 HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout); 776 777 /* Non-Blocking mode: Interrupt */ 778 HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 779 HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 780 781 /* Non-Blocking mode: DMA */ 782 HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 783 HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size); 784 HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai); 785 HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai); 786 HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai); 787 788 /* Abort function */ 789 HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai); 790 791 /* Mute management */ 792 HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val); 793 HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai); 794 HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter); 795 HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai); 796 797 /* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 798 void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai); 799 void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai); 800 void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai); 801 void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai); 802 void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai); 803 void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai); 804 /** 805 * @} 806 */ 807 808 /** @addtogroup SAI_Exported_Functions_Group3 809 * @{ 810 */ 811 /* Peripheral State functions ************************************************/ 812 HAL_SAI_StateTypeDef HAL_SAI_GetState(const SAI_HandleTypeDef *hsai); 813 uint32_t HAL_SAI_GetError(const SAI_HandleTypeDef *hsai); 814 /** 815 * @} 816 */ 817 818 /** 819 * @} 820 */ 821 822 /* Private macros ------------------------------------------------------------*/ 823 /** @defgroup SAI_Private_Macros SAI Private Macros 824 * @{ 825 */ 826 #define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\ 827 ((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\ 828 ((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE)) 829 830 #define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\ 831 ((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\ 832 ((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\ 833 ((PROTOCOL) == SAI_PCM_LONG) ||\ 834 ((PROTOCOL) == SAI_PCM_SHORT)) 835 836 #define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\ 837 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\ 838 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\ 839 ((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT)) 840 841 #define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || \ 842 ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \ 843 ((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || \ 844 ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \ 845 ((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || \ 846 ((AUDIO) == SAI_AUDIO_FREQUENCY_24K) || \ 847 ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \ 848 ((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || \ 849 ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \ 850 ((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || \ 851 ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV)) 852 853 #define IS_SAI_BLOCK_MCK_OVERSAMPLING(VALUE) (((VALUE) == SAI_MCK_OVERSAMPLING_DISABLE) || \ 854 ((VALUE) == SAI_MCK_OVERSAMPLING_ENABLE)) 855 856 #define IS_SAI_PDM_MIC_PAIRS_NUMBER(VALUE) ((1U <= (VALUE)) && ((VALUE) <= 2U)) 857 858 #define IS_SAI_PDM_CLOCK_ENABLE(CLOCK) (((CLOCK) != 0U) && \ 859 (((CLOCK) & ~(SAI_PDM_CLOCK1_ENABLE | SAI_PDM_CLOCK2_ENABLE)) == 0U)) 860 861 #define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \ 862 ((MODE) == SAI_MODEMASTER_RX) || \ 863 ((MODE) == SAI_MODESLAVE_TX) || \ 864 ((MODE) == SAI_MODESLAVE_RX)) 865 866 #define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \ 867 ((PROTOCOL) == SAI_AC97_PROTOCOL) || \ 868 ((PROTOCOL) == SAI_SPDIF_PROTOCOL)) 869 870 #define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \ 871 ((DATASIZE) == SAI_DATASIZE_10) || \ 872 ((DATASIZE) == SAI_DATASIZE_16) || \ 873 ((DATASIZE) == SAI_DATASIZE_20) || \ 874 ((DATASIZE) == SAI_DATASIZE_24) || \ 875 ((DATASIZE) == SAI_DATASIZE_32)) 876 877 #define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \ 878 ((BIT) == SAI_FIRSTBIT_LSB)) 879 880 #define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \ 881 ((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE)) 882 883 #define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \ 884 ((SYNCHRO) == SAI_SYNCHRONOUS) || \ 885 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \ 886 ((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2)) 887 888 #define IS_SAI_BLOCK_MCK_OUTPUT(VALUE) (((VALUE) == SAI_MCK_OUTPUT_ENABLE) || \ 889 ((VALUE) == SAI_MCK_OUTPUT_DISABLE)) 890 891 #define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \ 892 ((DRIVE) == SAI_OUTPUTDRIVE_ENABLE)) 893 894 #define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \ 895 ((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE)) 896 897 #define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63U) 898 899 #define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \ 900 ((VALUE) == SAI_LAST_SENT_VALUE)) 901 902 #define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \ 903 ((MODE) == SAI_ULAW_1CPL_COMPANDING) || \ 904 ((MODE) == SAI_ALAW_1CPL_COMPANDING) || \ 905 ((MODE) == SAI_ULAW_2CPL_COMPANDING) || \ 906 ((MODE) == SAI_ALAW_2CPL_COMPANDING)) 907 908 #define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \ 909 ((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \ 910 ((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \ 911 ((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \ 912 ((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL)) 913 914 #define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\ 915 ((STATE) == SAI_OUTPUT_RELEASED)) 916 917 #define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\ 918 ((MODE) == SAI_STEREOMODE)) 919 920 #define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL) 921 922 #define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1U <= (NUMBER)) && ((NUMBER) <= 16U)) 923 924 #define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \ 925 ((SIZE) == SAI_SLOTSIZE_16B) || \ 926 ((SIZE) == SAI_SLOTSIZE_32B)) 927 928 #define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24U) 929 930 #define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \ 931 ((OFFSET) == SAI_FS_BEFOREFIRSTBIT)) 932 933 #define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \ 934 ((POLARITY) == SAI_FS_ACTIVE_HIGH)) 935 936 #define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \ 937 ((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION)) 938 939 #define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 63U) 940 941 #define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8U <= (LENGTH)) && ((LENGTH) <= 256U)) 942 943 #define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1U <= (LENGTH)) && ((LENGTH) <= 128U)) 944 945 /** 946 * @} 947 */ 948 949 /* Private functions ---------------------------------------------------------*/ 950 /** @defgroup SAI_Private_Functions SAI Private Functions 951 * @{ 952 */ 953 954 /** 955 * @} 956 */ 957 958 /** 959 * @} 960 */ 961 #endif /* SAI1 */ 962 /** 963 * @} 964 */ 965 966 #ifdef __cplusplus 967 } 968 #endif 969 970 #endif /* STM32WBAxx_HAL_SAI_H */ 971 972
