1 /** 2 ****************************************************************************** 3 * @file stm32wbaxx_hal_lptim.h 4 * @author MCD Application Team 5 * @brief Header file of LPTIM HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2022 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32WBAxx_HAL_LPTIM_H 21 #define STM32WBAxx_HAL_LPTIM_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32wbaxx_hal_def.h" 29 30 /* Include low level driver */ 31 #include "stm32wbaxx_ll_lptim.h" 32 33 /** @addtogroup STM32WBAxx_HAL_Driver 34 * @{ 35 */ 36 37 #if defined (LPTIM1) || defined (LPTIM2) 38 39 /** @addtogroup LPTIM 40 * @{ 41 */ 42 43 /* Exported types ------------------------------------------------------------*/ 44 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types 45 * @{ 46 */ 47 48 /** 49 * @brief LPTIM Clock configuration definition 50 */ 51 typedef struct 52 { 53 uint32_t Source; /*!< Selects the clock source. 54 This parameter can be a value of @ref LPTIM_Clock_Source */ 55 56 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler. 57 This parameter can be a value of @ref LPTIM_Clock_Prescaler */ 58 59 } LPTIM_ClockConfigTypeDef; 60 61 /** 62 * @brief LPTIM Clock configuration definition 63 */ 64 typedef struct 65 { 66 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit 67 if the ULPTIM input is selected. 68 Note: This parameter is used only when Ultra low power clock source is used. 69 Note: If the polarity is configured on 'both edges', an auxiliary clock 70 (one of the Low power oscillator) must be active. 71 This parameter can be a value of @ref LPTIM_Clock_Polarity */ 72 73 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter. 74 Note: This parameter is used only when Ultra low power clock source is used. 75 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */ 76 77 } LPTIM_ULPClockConfigTypeDef; 78 79 /** 80 * @brief LPTIM Trigger configuration definition 81 */ 82 typedef struct 83 { 84 uint32_t Source; /*!< Selects the Trigger source. 85 This parameter can be a value of @ref LPTIM_Trigger_Source */ 86 87 uint32_t ActiveEdge; /*!< Selects the Trigger active edge. 88 Note: This parameter is used only when an external trigger is used. 89 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */ 90 91 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter. 92 Note: This parameter is used only when an external trigger is used. 93 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */ 94 } LPTIM_TriggerConfigTypeDef; 95 96 /** 97 * @brief LPTIM Initialization Structure definition 98 */ 99 typedef struct 100 { 101 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */ 102 103 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock;/*!< Specifies the Ultra Low Power clock parameters */ 104 105 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */ 106 107 uint32_t Period; /*!< Specifies the period value to be loaded into the active 108 Auto-Reload Register at the next update event. 109 This parameter can be a number between 110 Min_Data = 0x0001 and Max_Data = 0xFFFF. */ 111 112 uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare 113 values is done immediately or after the end of current period. 114 This parameter can be a value of @ref LPTIM_Updating_Mode */ 115 116 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event 117 or each external event. 118 This parameter can be a value of @ref LPTIM_Counter_Source */ 119 120 uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output). 121 This parameter can be a value of @ref LPTIM_Input1_Source */ 122 123 uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output). 124 Note: This parameter is used only for encoder feature so is used only 125 for LPTIM1 instance. 126 This parameter can be a value of @ref LPTIM_Input2_Source */ 127 128 uint32_t RepetitionCounter;/*!< Specifies the repetition counter value. 129 Each time the RCR downcounter reaches zero, an update event is 130 generated and counting restarts from the RCR value (N). 131 Note: When using repetition counter the UpdateMode field must be 132 set to LPTIM_UPDATE_ENDOFPERIOD otherwise unpredictable 133 behavior may occur. 134 This parameter must be a number between Min_Data = 0x00 and 135 Max_Data = 0xFF. */ 136 } LPTIM_InitTypeDef; 137 138 /** 139 * @brief LPTIM Output Compare Configuration Structure definition 140 */ 141 typedef struct 142 { 143 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. 144 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ 145 uint32_t OCPolarity; /*!< Specifies the output polarity. 146 This parameter can be a value of @ref LPTIM_Output_Compare_Polarity */ 147 } LPTIM_OC_ConfigTypeDef; 148 149 /** 150 * @brief LPTIM Input Capture Configuration Structure definition 151 */ 152 typedef struct 153 { 154 uint32_t ICInputSource; /*!< Specifies source selected for IC channel. 155 This parameter can be a value of @ref LPTIM_Input_Capture_Source */ 156 157 uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler. 158 This parameter can be a value of @ref LPTIM_Input_Capture_Prescaler */ 159 160 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal. 161 This parameter can be a value of @ref LPTIM_Input_Capture_Polarity */ 162 163 uint32_t ICFilter; /*!< Specifies the input capture filter. 164 This parameter can be a value of @ref LPTIM_Input_Capture_Filter */ 165 } LPTIM_IC_ConfigTypeDef; 166 167 /** 168 * @brief HAL LPTIM State structure definition 169 */ 170 typedef enum 171 { 172 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */ 173 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */ 174 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */ 175 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */ 176 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */ 177 } HAL_LPTIM_StateTypeDef; 178 179 /** 180 * @brief HAL Active channel structures definition 181 */ 182 typedef enum 183 { 184 HAL_LPTIM_ACTIVE_CHANNEL_1 = 0x01U, /*!< The active channel is 1 */ 185 HAL_LPTIM_ACTIVE_CHANNEL_2 = 0x02U, /*!< The active channel is 2 */ 186 HAL_LPTIM_ACTIVE_CHANNEL_CLEARED = 0x00U /*!< All active channels cleared */ 187 } HAL_LPTIM_ActiveChannel; 188 189 /** 190 * @brief LPTIM Channel States definition 191 */ 192 typedef enum 193 { 194 HAL_LPTIM_CHANNEL_STATE_RESET = 0x00U, /*!< LPTIM Channel initial state */ 195 HAL_LPTIM_CHANNEL_STATE_READY = 0x01U, /*!< LPTIM Channel ready for use */ 196 HAL_LPTIM_CHANNEL_STATE_BUSY = 0x02U, /*!< An internal process is ongoing on the LPTIM channel */ 197 } HAL_LPTIM_ChannelStateTypeDef; 198 199 /** 200 * @brief LPTIM handle Structure definition 201 */ 202 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 203 typedef struct __LPTIM_HandleTypeDef 204 #else 205 typedef struct 206 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 207 { 208 LPTIM_TypeDef *Instance; /*!< Register base address */ 209 210 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */ 211 212 HAL_LPTIM_ActiveChannel Channel; /*!< Active channel */ 213 214 DMA_HandleTypeDef *hdma[3]; /*!< DMA Handlers array, This array is accessed by a @ref LPTIM_DMA_Handle_index */ 215 216 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */ 217 218 HAL_LockTypeDef Lock; /*!< LPTIM locking object */ 219 220 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */ 221 222 __IO HAL_LPTIM_ChannelStateTypeDef ChannelState[2]; /*!< LPTIM channel operation state */ 223 224 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 225 void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */ 226 void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */ 227 void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */ 228 void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */ 229 void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */ 230 void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */ 231 void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */ 232 void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */ 233 void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */ 234 void (* UpdateEventCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Update event detection Callback */ 235 void (* RepCounterWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Repetition counter register write complete Callback */ 236 void (* UpdateEventHalfCpltCallback)(struct __LPTIM_HandleTypeDef *hlptim);/*!< Update event half complete detection Callback */ 237 void (* ErrorCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Error Callback */ 238 void (* IC_CaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Input capture Callback */ 239 void (* IC_CaptureHalfCpltCallback)(struct __LPTIM_HandleTypeDef *htim); /*!< Input Capture half complete Callback */ 240 void (* IC_OverCaptureCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Over capture Callback */ 241 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 242 } LPTIM_HandleTypeDef; 243 244 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 245 /** 246 * @brief HAL LPTIM Callback ID enumeration definition 247 */ 248 typedef enum 249 { 250 HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */ 251 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */ 252 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */ 253 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */ 254 HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */ 255 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */ 256 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */ 257 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */ 258 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */ 259 HAL_LPTIM_UPDATE_EVENT_CB_ID = 0x09U, /*!< Update event detection Callback ID */ 260 HAL_LPTIM_REP_COUNTER_WRITE_CB_ID = 0x0AU, /*!< Repetition counter register write complete Callback ID */ 261 HAL_LPTIM_UPDATE_EVENT_HALF_CB_ID = 0x0BU, /*!< Update event half complete detection Callback ID */ 262 HAL_LPTIM_ERROR_CB_ID = 0x0CU, /*!< LPTIM Error Callback ID */ 263 HAL_LPTIM_IC_CAPTURE_CB_ID = 0x0DU, /*!< Input capture Callback ID */ 264 HAL_LPTIM_IC_CAPTURE_HALF_CB_ID = 0x0EU, /*!< Input capture half complete Callback ID */ 265 HAL_LPTIM_OVER_CAPTURE_CB_ID = 0x0FU, /*!< Over capture Callback ID */ 266 } HAL_LPTIM_CallbackIDTypeDef; 267 268 /** 269 * @brief HAL TIM Callback pointer definition 270 */ 271 typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */ 272 273 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 274 /** 275 * @} 276 */ 277 278 /* Exported constants --------------------------------------------------------*/ 279 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants 280 * @{ 281 */ 282 283 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source 284 * @{ 285 */ 286 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U 287 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL 288 /** 289 * @} 290 */ 291 292 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler 293 * @{ 294 */ 295 #define LPTIM_PRESCALER_DIV1 0x00000000U 296 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 297 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 298 #define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1) 299 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 300 #define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2) 301 #define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2) 302 #define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC 303 /** 304 * @} 305 */ 306 307 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time 308 * @{ 309 */ 310 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U 311 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0 312 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1 313 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT 314 /** 315 * @} 316 */ 317 318 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity 319 * @{ 320 */ 321 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U 322 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0 323 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 324 /** 325 * @} 326 */ 327 328 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source 329 * @{ 330 */ 331 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU 332 #define LPTIM_TRIGSOURCE_0 0x00000000U 333 #define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0 334 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1 335 #define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1) 336 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2 337 #define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2) 338 #define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2) 339 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL 340 /** 341 * @} 342 */ 343 344 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity 345 * @{ 346 */ 347 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0 348 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1 349 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN 350 /** 351 * @} 352 */ 353 354 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time 355 * @{ 356 */ 357 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U 358 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0 359 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1 360 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT 361 /** 362 * @} 363 */ 364 365 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode 366 * @{ 367 */ 368 369 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U 370 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD 371 /** 372 * @} 373 */ 374 375 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source 376 * @{ 377 */ 378 379 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U 380 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE 381 /** 382 * @} 383 */ 384 385 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source 386 * @{ 387 */ 388 389 #define LPTIM_INPUT1SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 390 #if defined(COMP1) 391 #define LPTIM_INPUT1SOURCE_COMP1 LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM1 and LPTIM2 */ 392 #endif /* COMP1 */ 393 /** 394 * @} 395 */ 396 397 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source 398 * @{ 399 */ 400 401 #define LPTIM_INPUT2SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 402 #if defined(COMP2) 403 #define LPTIM_INPUT2SOURCE_COMP2 LPTIM_CFGR2_IN2SEL_0 /*!< For LPTIM1 and LPTIM2 */ 404 #endif /* COMP2 */ 405 /** 406 * @} 407 */ 408 409 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition 410 * @{ 411 */ 412 413 #define LPTIM_FLAG_CC1O LPTIM_ISR_CC1OF 414 #define LPTIM_FLAG_CC2O LPTIM_ISR_CC2OF 415 #define LPTIM_FLAG_CC1 LPTIM_ISR_CC1IF 416 #define LPTIM_FLAG_CC2 LPTIM_ISR_CC2IF 417 #define LPTIM_FLAG_CMP1OK LPTIM_ISR_CMP1OK 418 #define LPTIM_FLAG_CMP2OK LPTIM_ISR_CMP2OK 419 #define LPTIM_FLAG_DIEROK LPTIM_ISR_DIEROK 420 #define LPTIM_FLAG_REPOK LPTIM_ISR_REPOK 421 #define LPTIM_FLAG_UPDATE LPTIM_ISR_UE 422 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN 423 #define LPTIM_FLAG_UP LPTIM_ISR_UP 424 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK 425 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG 426 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM 427 /** 428 * @} 429 */ 430 431 /** @defgroup LPTIM_DMA_sources LPTIM DMA Sources 432 * @{ 433 */ 434 #define LPTIM_DMA_UPDATE LPTIM_DIER_UEDE /*!< DMA request is triggered by the update event */ 435 #define LPTIM_DMA_CC1 LPTIM_DIER_CC1DE /*!< DMA request is triggered by the capture 1 event */ 436 #define LPTIM_DMA_CC2 LPTIM_DIER_CC2DE /*!< DMA request is triggered by the capture 2 event */ 437 438 /** 439 * @} 440 */ 441 442 /** @defgroup LPTIM_DMA_Handle_index LPTIM DMA Handle Index 443 * @{ 444 */ 445 #define LPTIM_DMA_ID_UPDATE ((uint16_t) 0x0000) /*!< Index of the DMA handle used for Update DMA requests */ 446 #define LPTIM_DMA_ID_CC1 ((uint16_t) 0x0001) /*!< Index of the DMA handle used for Capture/Update event 1 DMA request */ 447 #define LPTIM_DMA_ID_CC2 ((uint16_t) 0x0002) /*!< Index of the DMA handle used for Capture/Update event 2 DMA request */ 448 /** 449 * @} 450 */ 451 452 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition 453 * @{ 454 */ 455 #define LPTIM_IT_CC1O LPTIM_DIER_CC1OIE 456 #define LPTIM_IT_CC2O LPTIM_DIER_CC2OIE 457 #define LPTIM_IT_CC1 LPTIM_DIER_CC1IE 458 #define LPTIM_IT_CC2 LPTIM_DIER_CC2IE 459 #define LPTIM_IT_CMP1OK LPTIM_DIER_CMP1OKIE 460 #define LPTIM_IT_CMP2OK LPTIM_DIER_CMP2OKIE 461 #define LPTIM_IT_REPOK LPTIM_DIER_REPOKIE 462 #define LPTIM_IT_UPDATE LPTIM_DIER_UEIE 463 #define LPTIM_IT_DOWN LPTIM_DIER_DOWNIE 464 #define LPTIM_IT_UP LPTIM_DIER_UPIE 465 #define LPTIM_IT_ARROK LPTIM_DIER_ARROKIE 466 #define LPTIM_IT_EXTTRIG LPTIM_DIER_EXTTRIGIE 467 #define LPTIM_IT_ARRM LPTIM_DIER_ARRMIE 468 /** 469 * @} 470 */ 471 472 /** @defgroup LPTIM_Channel LPTIM Channel 473 * @{ 474 */ 475 #define LPTIM_CHANNEL_1 LL_LPTIM_CHANNEL_CH1 /*!< Capture/compare channel 1 identifier */ 476 #define LPTIM_CHANNEL_2 LL_LPTIM_CHANNEL_CH2 /*!< Capture/compare channel 2 identifier */ 477 /** 478 * @} 479 */ 480 481 /** @defgroup LPTIM_Output_Compare_Polarity LPTIM Output Compare Polarity 482 * @{ 483 */ 484 #define LPTIM_OCPOLARITY_HIGH 0x00000000U /*!< Capture/Compare output polarity */ 485 #define LPTIM_OCPOLARITY_LOW 0x00000001U /*!< Capture/Compare output polarity */ 486 /** 487 * @} 488 */ 489 490 /** @defgroup LPTIM_Input_Capture_Prescaler LPTIM Input Capture Prescaler 491 * @{ 492 */ 493 #define LPTIM_ICPSC_DIV1 0x00000000UL /*!< Capture performed each time an edge is detected on the capture input */ 494 #define LPTIM_ICPSC_DIV2 LPTIM_CCMR1_IC1PSC_0 /*!< Capture performed once every 2 events */ 495 #define LPTIM_ICPSC_DIV4 LPTIM_CCMR1_IC1PSC_1 /*!< Capture performed once every 4 events */ 496 #define LPTIM_ICPSC_DIV8 (LPTIM_CCMR1_IC1PSC_0|LPTIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 8 events */ 497 /** 498 * @} 499 */ 500 501 /** @defgroup LPTIM_Input_Capture_Polarity LPTIM Input Capture Polarity 502 * @{ 503 */ 504 #define LPTIM_ICPOLARITY_RISING 0x00000000UL /*!< Capture/Compare input rising polarity */ 505 #define LPTIM_ICPOLARITY_FALLING LPTIM_CCMR1_CC1P_0 /*!< Capture/Compare input falling polarity */ 506 #define LPTIM_ICPOLARITY_RISING_FALLING (LPTIM_CCMR1_CC1P_0|LPTIM_CCMR1_CC1P_1) /*!< Capture/Compare input rising and falling polarities */ 507 /** 508 * @} 509 */ 510 511 /** @defgroup LPTIM_Input_Capture_Filter LPTIM Input Capture Filter 512 * @{ 513 */ 514 #define LPTIM_ICFLT_CLOCK_DIV1 0x00000000UL /*!< any external input capture signal level change is considered as a valid transition */ 515 #define LPTIM_ICFLT_CLOCK_DIV2 LPTIM_CCMR1_IC1F_0 /*!< external input capture signal level change must be stable for at least 2 clock periods before it is considered as valid transition */ 516 #define LPTIM_ICFLT_CLOCK_DIV4 LPTIM_CCMR1_IC1F_1 /*!< external input capture signal level change must be stable for at least 4 clock periods before it is considered as valid transition */ 517 #define LPTIM_ICFLT_CLOCK_DIV8 (LPTIM_CCMR1_IC1F_0|LPTIM_CCMR1_IC1F_1) /*!< external input capture signal level change must be stable for at least 8 clock periods before it is considered as valid transition */ 518 /** 519 * @} 520 */ 521 522 /** @defgroup LPTIM_Input_Capture_Source LPTIM Input Capture Source 523 * @{ 524 */ 525 #define LPTIM_IC1SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 526 #if defined(COMP1) 527 #define LPTIM_IC1SOURCE_COMP1 LPTIM_CFGR2_IC1SEL_0 /*!< For LPTIM1 and LPTIM2 */ 528 #endif /* COMP1 */ 529 #if defined(COMP2) 530 #define LPTIM_IC1SOURCE_COMP2 LPTIM_CFGR2_IC1SEL_1 /*!< For LPTIM1 and LPTIM2 */ 531 #endif /* COMP2 */ 532 #define LPTIM_IC2SOURCE_GPIO 0x00000000UL /*!< For LPTIM1 and LPTIM2 */ 533 #define LPTIM_IC2SOURCE_LSI LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM1 */ 534 #define LPTIM_IC2SOURCE_LSE LPTIM_CFGR2_IC2SEL_1 /*!< For LPTIM1 */ 535 #define LPTIM_IC2SOURCE_HSI_256 LPTIM_CFGR2_IC2SEL_0 /*!< For LPTIM2 */ 536 /** 537 * @} 538 */ 539 /** 540 * @} 541 */ 542 543 /* Exported macros -----------------------------------------------------------*/ 544 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros 545 * @{ 546 */ 547 548 /** @brief Reset LPTIM handle state. 549 * @param __HANDLE__ LPTIM handle 550 * @retval None 551 */ 552 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 553 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 554 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 555 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 556 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 557 (__HANDLE__)->MspInitCallback = NULL; \ 558 (__HANDLE__)->MspDeInitCallback = NULL; \ 559 } while(0) 560 #else 561 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \ 562 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \ 563 (__HANDLE__)->ChannelState[0] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 564 (__HANDLE__)->ChannelState[1] = HAL_LPTIM_CHANNEL_STATE_RESET;\ 565 } while(0) 566 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 567 568 /** 569 * @brief Enable the LPTIM peripheral. 570 * @param __HANDLE__ LPTIM handle 571 * @retval None 572 */ 573 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE)) 574 575 /** 576 * @brief Disable the LPTIM peripheral. 577 * @param __HANDLE__ LPTIM handle 578 * @retval None 579 */ 580 #define __HAL_LPTIM_DISABLE(__HANDLE__) \ 581 do { \ 582 if (((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC1E) == 0UL) \ 583 { \ 584 if(((__HANDLE__)->Instance->CCMR1 & LPTIM_CCMR1_CC2E) == 0UL) \ 585 { \ 586 (__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE); \ 587 } \ 588 } \ 589 } while(0) 590 591 /** 592 * @brief Start the LPTIM peripheral in Continuous mode. 593 * @param __HANDLE__ LPTIM handle 594 * @retval None 595 */ 596 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT) 597 /** 598 * @brief Start the LPTIM peripheral in single mode. 599 * @param __HANDLE__ LPTIM handle 600 * @retval None 601 */ 602 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT) 603 604 /** 605 * @brief Reset the LPTIM Counter register in synchronous mode. 606 * @param __HANDLE__ LPTIM handle 607 * @retval None 608 */ 609 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST) 610 611 /** 612 * @brief Reset after read of the LPTIM Counter register in asynchronous mode. 613 * @param __HANDLE__ LPTIM handle 614 * @retval None 615 */ 616 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE) 617 618 /** 619 * @brief Write the passed parameter in the Autoreload register. 620 * @param __HANDLE__ LPTIM handle 621 * @param __VALUE__ Autoreload value 622 * This parameter must be a value between Min_Data = 0x0001 and Max_Data = 0xFFFF. 623 * @retval None 624 * @note The ARR register can only be modified when the LPTIM instance is enabled. 625 */ 626 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__)) 627 628 /** 629 * @brief Write the passed parameter in the Compare register. 630 * @param __HANDLE__ LPTIM handle 631 * @param __VALUE__ Compare value 632 * @param __CHANNEL__ TIM Channel to be configured 633 * @retval None 634 * @note The CCRx registers can only be modified when the LPTIM instance is enabled. 635 */ 636 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __CHANNEL__, __VALUE__) \ 637 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__VALUE__)) :\ 638 ((__CHANNEL__) == LPTIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__VALUE__)) : 0U) 639 640 /** 641 * @brief Write the passed parameter in the Repetition register. 642 * @param __HANDLE__ LPTIM handle 643 * @param __VALUE__ Repetition value 644 * @retval None 645 */ 646 #define __HAL_LPTIM_REPETITIONCOUNTER_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->RCR = (__VALUE__)) 647 648 /** 649 * @brief Return the current Repetition value. 650 * @param __HANDLE__ LPTIM handle 651 * @retval Repetition register value 652 * @note The RCR register can only be modified when the LPTIM instance is enabled. 653 */ 654 #define __HAL_LPTIM_REPETITIONCOUNTER_GET(__HANDLE__) ((__HANDLE__)->Instance->RCR) 655 656 /** 657 * @brief Enable the LPTIM signal input/output on the corresponding pin. 658 * @param __HANDLE__ LPTIM handle 659 * @param __CHANNEL__ LPTIM Channels to be enabled. 660 * This parameter can be one of the following values: 661 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 662 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 663 * @retval None 664 */ 665 #define __HAL_LPTIM_CAPTURE_COMPARE_ENABLE(__HANDLE__, __CHANNEL__) \ 666 do { \ 667 switch (__CHANNEL__) \ 668 { \ 669 case LPTIM_CHANNEL_1: \ 670 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC1E); \ 671 break; \ 672 case LPTIM_CHANNEL_2: \ 673 ((__HANDLE__)->Instance->CCMR1 |= LPTIM_CCMR1_CC2E); \ 674 break; \ 675 default: \ 676 break; \ 677 } \ 678 } \ 679 while(0) 680 681 /** 682 * @brief Disable the LPTIM signal input/output on the corresponding pin. 683 * @param __HANDLE__ LPTIM handle 684 * @param __CHANNEL__ LPTIM Channels to be disabled. 685 * This parameter can be one of the following values: 686 * @arg LPTIM_CHANNEL_1: LPTIM Channel 1 selected 687 * @arg LPTIM_CHANNEL_2: LPTIM Channel 2 selected 688 * @retval None 689 */ 690 #define __HAL_LPTIM_CAPTURE_COMPARE_DISABLE(__HANDLE__, __CHANNEL__) \ 691 do { \ 692 switch (__CHANNEL__) \ 693 { \ 694 case LPTIM_CHANNEL_1: \ 695 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC1E); \ 696 break; \ 697 case LPTIM_CHANNEL_2: \ 698 ((__HANDLE__)->Instance->CCMR1 &= ~LPTIM_CCMR1_CC2E); \ 699 break; \ 700 default: \ 701 break; \ 702 } \ 703 } \ 704 while(0) 705 706 /** 707 * @brief Check whether the specified LPTIM flag is set or not. 708 * @param __HANDLE__ LPTIM handle 709 * @param __FLAG__ LPTIM flag to check 710 * This parameter can be a value of: 711 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 712 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 713 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 714 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 715 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 716 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 717 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 718 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 719 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 720 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 721 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 722 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 723 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 724 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 725 * @retval The state of the specified flag (SET or RESET). 726 */ 727 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__)) 728 729 /** 730 * @brief Clear the specified LPTIM flag. 731 * @param __HANDLE__ LPTIM handle. 732 * @param __FLAG__ LPTIM flag to clear. 733 * This parameter can be a value of: 734 * @arg LPTIM_FLAG_REPOK : Repetition register update OK Flag. 735 * @arg LPTIM_FLAG_UPDATE : Update event Flag. 736 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag. 737 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag. 738 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag. 739 * @arg LPTIM_FLAG_CMP1OK : Compare register 1 update OK Flag. 740 * @arg LPTIM_FLAG_CMP2OK : Compare register 2 update OK Flag. 741 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag. 742 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag. 743 * @arg LPTIM_FLAG_CC1 : Capture/Compare 1 interrupt flag. 744 * @arg LPTIM_FLAG_CC2 : Capture/Compare 2 interrupt flag. 745 * @arg LPTIM_FLAG_CC1O : Capture/Compare 1 over-capture flag. 746 * @arg LPTIM_FLAG_CC2O : Capture/Compare 2 over-capture flag. 747 * @arg LPTIM_FLAG_DIEROK : DMA & interrupt enable update OK flag. 748 * @retval None. 749 */ 750 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 751 752 /** 753 * @brief Enable the specified LPTIM interrupt. 754 * @param __HANDLE__ LPTIM handle. 755 * @param __INTERRUPT__ LPTIM interrupt to set. 756 * This parameter can be a value of: 757 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 758 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 759 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 760 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 761 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 762 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 763 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 764 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 765 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 766 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 767 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 768 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 769 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 770 * @retval None. 771 * @note The LPTIM interrupts can only be enabled when the LPTIM instance is enabled. 772 */ 773 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__)) 774 775 /** 776 * @brief Disable the specified LPTIM interrupt. 777 * @param __HANDLE__ LPTIM handle. 778 * @param __INTERRUPT__ LPTIM interrupt to set. 779 * This parameter can be a value of: 780 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 781 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 782 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 783 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 784 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 785 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 786 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 787 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 788 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 789 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 790 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 791 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 792 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 793 * @retval None. 794 * @note The LPTIM interrupts can only be disabled when the LPTIM instance is enabled. 795 */ 796 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= (~(__INTERRUPT__))) 797 798 /** @brief Enable the specified DMA request. 799 * @param __HANDLE__ specifies the TIM Handle. 800 * @param __DMA__ specifies the LPTIM DMA request to enable. 801 * This parameter can be one of the following values: 802 * @arg LPTIM_DMA_UPDATE: Update DMA request 803 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 804 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 805 * @retval None 806 */ 807 #define __HAL_LPTIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__)) 808 809 /** @brief Disable the specified DMA request. 810 * @param __HANDLE__ specifies the LPTIM Handle. 811 * @param __DMA__ specifies the LPTIM DMA request to disable. 812 * This parameter can be one of the following values: 813 * @arg LPTIM_DMA_UPDATE: Update DMA request 814 * @arg LPTIM_DMA_CC1: Capture/Compare 1 DMA request 815 * @arg LPTIM_DMA_CC2: Capture/Compare 2 DMA request 816 * @retval None 817 */ 818 #define __HAL_LPTIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__)) 819 820 /** 821 * @brief Check whether the specified LPTIM interrupt source is enabled or not. 822 * @param __HANDLE__ LPTIM handle. 823 * @param __INTERRUPT__ LPTIM interrupt to check. 824 * This parameter can be a value of: 825 * @arg LPTIM_IT_REPOK : Repetition register update OK Interrupt. 826 * @arg LPTIM_IT_UPDATE : Update event register Interrupt. 827 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt. 828 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt. 829 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt. 830 * @arg LPTIM_IT_CMP1OK : Compare register 1 update OK Interrupt. 831 * @arg LPTIM_IT_CMP2OK : Compare register 2 update OK Interrupt. 832 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt. 833 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt. 834 * @arg LPTIM_IT_CC1 : Capture/Compare 1 interrupt Interrupt. 835 * @arg LPTIM_IT_CC2 : Capture/Compare 2 interrupt Interrupt. 836 * @arg LPTIM_IT_CC1O : Capture/Compare 1 over-capture Interrupt. 837 * @arg LPTIM_IT_CC2O : Capture/Compare 2 over-capture Interrupt. 838 * @retval Interrupt status. 839 */ 840 841 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER\ 842 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 843 844 /** 845 * @} 846 */ 847 848 /* Exported functions --------------------------------------------------------*/ 849 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions 850 * @{ 851 */ 852 853 /** @addtogroup LPTIM_Exported_Functions_Group1 854 * @brief Initialization and Configuration functions. 855 * @{ 856 */ 857 /* Initialization/de-initialization functions ********************************/ 858 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim); 859 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim); 860 861 /* MSP functions *************************************************************/ 862 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim); 863 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim); 864 /** 865 * @} 866 */ 867 868 /** @addtogroup LPTIM_Exported_Functions_Group2 869 * @brief Start-Stop operation functions. 870 * @{ 871 */ 872 /* Config functions **********************************************************/ 873 HAL_StatusTypeDef HAL_LPTIM_OC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_OC_ConfigTypeDef *sConfig, 874 uint32_t Channel); 875 876 /* Start/Stop operation functions *********************************************/ 877 /* ################################# PWM Mode ################################*/ 878 /* Blocking mode: Polling */ 879 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 880 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 881 /* Non-Blocking mode: Interrupt */ 882 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 883 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 884 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, const uint32_t *pData, 885 uint32_t Length); 886 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 887 888 /* ############################# One Pulse Mode ##############################*/ 889 /* Blocking mode: Polling */ 890 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 891 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 892 /* Non-Blocking mode: Interrupt */ 893 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 894 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 895 896 /* ############################## Set once Mode ##############################*/ 897 /* Blocking mode: Polling */ 898 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 899 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 900 /* Non-Blocking mode: Interrupt */ 901 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 902 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 903 904 /* ############################### Encoder Mode ##############################*/ 905 /* Blocking mode: Polling */ 906 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim); 907 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim); 908 /* Non-Blocking mode: Interrupt */ 909 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim); 910 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim); 911 912 /* ############################# Time out Mode ##############################*/ 913 /* Blocking mode: Polling */ 914 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 915 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim); 916 /* Non-Blocking mode: Interrupt */ 917 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Timeout); 918 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim); 919 920 /* ############################## Counter Mode ###############################*/ 921 /* Blocking mode: Polling */ 922 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim); 923 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim); 924 /* Non-Blocking mode: Interrupt */ 925 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim); 926 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim); 927 928 /* ############################## Input Capture Mode ###############################*/ 929 /* Blocking mode: Polling */ 930 HAL_StatusTypeDef HAL_LPTIM_IC_ConfigChannel(LPTIM_HandleTypeDef *hlptim, const LPTIM_IC_ConfigTypeDef *sConfig, 931 uint32_t Channel); 932 HAL_StatusTypeDef HAL_LPTIM_IC_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 933 HAL_StatusTypeDef HAL_LPTIM_IC_Stop(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 934 /* Non-Blocking mode: Interrupt */ 935 HAL_StatusTypeDef HAL_LPTIM_IC_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 936 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 937 HAL_StatusTypeDef HAL_LPTIM_IC_Start_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel, uint32_t *pData, 938 uint32_t Length); 939 HAL_StatusTypeDef HAL_LPTIM_IC_Stop_DMA(LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 940 /** 941 * @} 942 */ 943 944 /** @addtogroup LPTIM_Exported_Functions_Group3 945 * @brief Read operation functions. 946 * @{ 947 */ 948 /* Reading operation functions ************************************************/ 949 uint32_t HAL_LPTIM_ReadCounter(const LPTIM_HandleTypeDef *hlptim); 950 uint32_t HAL_LPTIM_ReadAutoReload(const LPTIM_HandleTypeDef *hlptim); 951 uint32_t HAL_LPTIM_ReadCapturedValue(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 952 uint8_t HAL_LPTIM_IC_GetOffset(const LPTIM_HandleTypeDef *hlptim, uint32_t Channel); 953 /** 954 * @} 955 */ 956 957 /** @addtogroup LPTIM_Exported_Functions_Group4 958 * @brief LPTIM IRQ handler and callback functions. 959 * @{ 960 */ 961 /* LPTIM IRQ functions *******************************************************/ 962 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim); 963 964 /* CallBack functions ********************************************************/ 965 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim); 966 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim); 967 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim); 968 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim); 969 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim); 970 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim); 971 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim); 972 void HAL_LPTIM_ErrorCallback(LPTIM_HandleTypeDef *hlptim); 973 void HAL_LPTIM_UpdateEventCallback(LPTIM_HandleTypeDef *hlptim); 974 void HAL_LPTIM_UpdateEventHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 975 void HAL_LPTIM_RepCounterWriteCallback(LPTIM_HandleTypeDef *hlptim); 976 void HAL_LPTIM_IC_CaptureCallback(LPTIM_HandleTypeDef *hlptim); 977 void HAL_LPTIM_IC_CaptureHalfCpltCallback(LPTIM_HandleTypeDef *hlptim); 978 void HAL_LPTIM_IC_OverCaptureCallback(LPTIM_HandleTypeDef *hlptim); 979 980 /* Callbacks Register/UnRegister functions ***********************************/ 981 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1) 982 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, 983 pLPTIM_CallbackTypeDef pCallback); 984 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID); 985 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */ 986 /** 987 * @} 988 */ 989 990 /** @addtogroup LPTIM_Group5 991 * @brief Peripheral State functions. 992 * @{ 993 */ 994 /* Peripheral State functions ************************************************/ 995 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(const LPTIM_HandleTypeDef *hlptim); 996 /** 997 * @} 998 */ 999 1000 /** 1001 * @} 1002 */ 1003 1004 /* Private types -------------------------------------------------------------*/ 1005 /** @defgroup LPTIM_Private_Types LPTIM Private Types 1006 * @{ 1007 */ 1008 1009 /** 1010 * @} 1011 */ 1012 1013 /* Private variables ---------------------------------------------------------*/ 1014 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables 1015 * @{ 1016 */ 1017 1018 /** 1019 * @} 1020 */ 1021 1022 /* Private constants ---------------------------------------------------------*/ 1023 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants 1024 * @{ 1025 */ 1026 1027 /** 1028 * @} 1029 */ 1030 1031 /* Private macros ------------------------------------------------------------*/ 1032 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros 1033 * @{ 1034 */ 1035 1036 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \ 1037 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC)) 1038 1039 1040 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \ 1041 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \ 1042 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \ 1043 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \ 1044 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \ 1045 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \ 1046 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \ 1047 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128)) 1048 1049 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1) 1050 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \ 1051 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \ 1052 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \ 1053 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS)) 1054 1055 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \ 1056 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \ 1057 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING)) 1058 1059 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \ 1060 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \ 1061 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \ 1062 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \ 1063 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \ 1064 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \ 1065 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \ 1066 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \ 1067 ((__TRIG__) == LPTIM_TRIGSOURCE_7)) 1068 1069 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \ 1070 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \ 1071 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING )) 1072 1073 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \ 1074 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \ 1075 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \ 1076 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS )) 1077 1078 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \ 1079 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD)) 1080 1081 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \ 1082 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL)) 1083 1084 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL) 1085 1086 #define IS_LPTIM_PERIOD(__PERIOD__) ((0x00000001UL <= (__PERIOD__)) &&\ 1087 ((__PERIOD__) <= 0x0000FFFFUL)) 1088 1089 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL) 1090 1091 #define IS_LPTIM_OC_POLARITY(__OCPOLARITY__) (((__OCPOLARITY__) == LPTIM_OCPOLARITY_LOW) || \ 1092 ((__OCPOLARITY__) == LPTIM_OCPOLARITY_HIGH)) 1093 #define IS_LPTIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_ICPSC_DIV1) ||\ 1094 ((__PRESCALER__) == LPTIM_ICPSC_DIV2) ||\ 1095 ((__PRESCALER__) == LPTIM_ICPSC_DIV4) ||\ 1096 ((__PRESCALER__) == LPTIM_ICPSC_DIV8)) 1097 1098 #define IS_LPTIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ICPOLARITY_RISING) || \ 1099 ((__POLARITY__) == LPTIM_ICPOLARITY_FALLING) ||\ 1100 ((__POLARITY__) == LPTIM_ICPOLARITY_RISING_FALLING)) 1101 1102 #define IS_LPTIM_IC_FILTER(__FILTER__) (((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV1) ||\ 1103 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV2) ||\ 1104 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV4) ||\ 1105 ((__FILTER__) == LPTIM_ICFLT_CLOCK_DIV8)) 1106 1107 #define IS_LPTIM_REPETITION(__REPETITION__) ((__REPETITION__) <= 0x000000FFUL) 1108 1109 #if defined(LPTIM2) 1110 #if defined(COMP1) 1111 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1112 ((((__INSTANCE__) == LPTIM1) || \ 1113 ((__INSTANCE__) == LPTIM2)) && \ 1114 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1115 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) 1116 #else 1117 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1118 ((((__INSTANCE__) == LPTIM1) || \ 1119 ((__INSTANCE__) == LPTIM2)) && \ 1120 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO))) 1121 #endif /* COMP1 */ 1122 #else 1123 #if defined(COMP1) 1124 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1125 (((__INSTANCE__) == LPTIM1) && \ 1126 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \ 1127 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) 1128 #else 1129 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \ 1130 (((__INSTANCE__) == LPTIM1) && \ 1131 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO))) 1132 #endif /* COMP1*/ 1133 #endif /* LPTIM2 */ 1134 1135 #if defined(LPTIM2) 1136 #if defined(COMP2) 1137 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1138 ((((__INSTANCE__) == LPTIM1) || \ 1139 ((__INSTANCE__) == LPTIM2)) && \ 1140 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \ 1141 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2))) 1142 #else 1143 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1144 ((((__INSTANCE__) == LPTIM1) || \ 1145 ((__INSTANCE__) == LPTIM2)) && \ 1146 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO))) 1147 #endif /* COMP2 */ 1148 #else 1149 #if defined(COMP2) 1150 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1151 (((__INSTANCE__) == LPTIM1) && \ 1152 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \ 1153 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2))) 1154 #else 1155 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \ 1156 (((__INSTANCE__) == LPTIM1) && \ 1157 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO))) 1158 #endif /* COMP2 */ 1159 #endif /* LPTIM2 */ 1160 1161 #if defined(LPTIM2) 1162 #if defined(COMP1) && defined(COMP2) 1163 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1164 ((((__INSTANCE__) == LPTIM1) || \ 1165 ((__INSTANCE__) == LPTIM2)) && \ 1166 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1167 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1) || \ 1168 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP2))) 1169 #elif defined(COMP1) 1170 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1171 ((((__INSTANCE__) == LPTIM1) || \ 1172 ((__INSTANCE__) == LPTIM2)) && \ 1173 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1174 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1))) 1175 #else 1176 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1177 ((((__INSTANCE__) == LPTIM1) || \ 1178 ((__INSTANCE__) == LPTIM2)) && \ 1179 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO))) 1180 #endif /* COMP1 && COMP2 */ 1181 1182 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1183 ((((__INSTANCE__) == LPTIM1) && \ 1184 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1185 ((__SOURCE__) == LPTIM_IC2SOURCE_LSI) || \ 1186 ((__SOURCE__) == LPTIM_IC2SOURCE_LSE))) \ 1187 || \ 1188 (((__INSTANCE__) == LPTIM2) && \ 1189 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1190 ((__SOURCE__) == LPTIM_IC2SOURCE_HSI_256)))) 1191 #else 1192 #if defined(COMP1) && defined(COMP2) 1193 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1194 (((__INSTANCE__) == LPTIM1) && \ 1195 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1196 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1) || \ 1197 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP2))) 1198 #elif defined(COMP1) 1199 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1200 (((__INSTANCE__) == LPTIM1) && \ 1201 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO) || \ 1202 ((__SOURCE__) == LPTIM_IC1SOURCE_COMP1))) 1203 #else 1204 #define IS_LPTIM_IC1_SOURCE(__INSTANCE__, __SOURCE__) \ 1205 (((__INSTANCE__) == LPTIM1) && \ 1206 (((__SOURCE__) == LPTIM_IC1SOURCE_GPIO))) 1207 #endif /* COMP1 && COMP2 */ 1208 1209 #define IS_LPTIM_IC2_SOURCE(__INSTANCE__, __SOURCE__) \ 1210 (((__INSTANCE__) == LPTIM1) && \ 1211 (((__SOURCE__) == LPTIM_IC2SOURCE_GPIO) || \ 1212 ((__SOURCE__) == LPTIM_IC2SOURCE_LSI) || \ 1213 ((__SOURCE__) == LPTIM_IC2SOURCE_LSE))) 1214 #endif /* LPTIM2 */ 1215 1216 #define LPTIM_CHANNEL_STATE_GET(__INSTANCE__, __CHANNEL__)\ 1217 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? (__INSTANCE__)->ChannelState[0] :\ 1218 (__INSTANCE__)->ChannelState[1]) 1219 1220 #define LPTIM_CHANNEL_STATE_SET(__INSTANCE__, __CHANNEL__, __CHANNEL_STATE__) \ 1221 (((__CHANNEL__) == LPTIM_CHANNEL_1) ? ((__INSTANCE__)->ChannelState[0] = (__CHANNEL_STATE__)) :\ 1222 ((__INSTANCE__)->ChannelState[1] = (__CHANNEL_STATE__))) 1223 1224 #define LPTIM_CHANNEL_STATE_SET_ALL(__INSTANCE__, __CHANNEL_STATE__) do { \ 1225 (__INSTANCE__)->ChannelState[0] =\ 1226 (__CHANNEL_STATE__); \ 1227 (__INSTANCE__)->ChannelState[1] =\ 1228 (__CHANNEL_STATE__); \ 1229 } while(0) 1230 1231 #if defined(LPTIM2) 1232 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1233 ((((__INSTANCE__) == LPTIM1) && \ 1234 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1235 ((__CHANNEL__) == LPTIM_CHANNEL_2))) \ 1236 || \ 1237 (((__INSTANCE__) == LPTIM2) && \ 1238 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1239 ((__CHANNEL__) == LPTIM_CHANNEL_2)))) 1240 #else 1241 #define IS_LPTIM_CCX_INSTANCE(__INSTANCE__, __CHANNEL__) \ 1242 (((__INSTANCE__) == LPTIM1) && \ 1243 (((__CHANNEL__) == LPTIM_CHANNEL_1) || \ 1244 ((__CHANNEL__) == LPTIM_CHANNEL_2))) 1245 #endif /* LPTIM2 */ 1246 /** 1247 * @} 1248 */ 1249 1250 /* Private functions ---------------------------------------------------------*/ 1251 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions 1252 * @{ 1253 */ 1254 /** 1255 * @} 1256 */ 1257 1258 /** 1259 * @} 1260 */ 1261 1262 #endif /* LPTIM1 || LPTIM2 */ 1263 /** 1264 * @} 1265 */ 1266 1267 #ifdef __cplusplus 1268 } 1269 #endif 1270 1271 #endif /* STM32WBAxx_HAL_LPTIM_H */ 1272
