1 /**
2 ******************************************************************************
3 * @file stm32wb0x_ll_dmamux.h
4 * @author MCD Application Team
5 * @brief Header file of DMAMUX LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2024 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32WB0x_LL_DMAMUX_H
21 #define STM32WB0x_LL_DMAMUX_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32wb0x.h"
29
30 /** @addtogroup STM32WB0x_LL_Driver
31 * @{
32 */
33
34 #if defined (DMAMUX1)
35
36 /** @defgroup DMAMUX_LL DMAMUX
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private constants ---------------------------------------------------------*/
43 /** @defgroup DMAMUX_LL_Private_Constants DMAMUX Private Constants
44 * @{
45 */
46 /* Define used to get DMAMUX CCR register size */
47 #define DMAMUX_CCR_SIZE 0x00000004UL
48 /**
49 * @}
50 */
51
52 /* Private macros ------------------------------------------------------------*/
53 /* Exported types ------------------------------------------------------------*/
54 /* Exported constants --------------------------------------------------------*/
55 /** @defgroup DMAMUX_LL_Exported_Constants DMAMUX Exported Constants
56 * @{
57 */
58
59 /** @defgroup DMAMUX_LL_EC_REQUEST Transfer request
60 * @{
61 */
62 #define LL_DMAMUX_REQ_MEM2MEM 0x00000000U /*!< Memory to Memory transfer */
63 #ifdef SPI3
64 #define LL_DMAMUX_REQ_SPI3_RX 0x00000002U /*!< DMAMUX SPI3 RX request */
65 #define LL_DMAMUX_REQ_SPI3_TX 0x00000003U /*!< DMAMUX SPI3 TX request */
66 #endif /* SPI3 */
67 #ifdef SPI1
68 #define LL_DMAMUX_REQ_SPI1_RX 0x00000004U /*!< DMAMUX SPI1 RX request */
69 #define LL_DMAMUX_REQ_SPI1_TX 0x00000005U /*!< DMAMUX SPI1 TX request */
70 #endif /* SPI1 */
71 #ifdef SPI2
72 #define LL_DMAMUX_REQ_SPI2_RX 0x00000006U /*!< DMAMUX SPI2 RX request */
73 #define LL_DMAMUX_REQ_SPI2_TX 0x00000007U /*!< DMAMUX SPI2 TX request */
74 #endif /* SPI2 */
75 #ifdef I2C1
76 #define LL_DMAMUX_REQ_I2C1_RX 0x00000008U /*!< DMAMUX I2C1 RX request */
77 #define LL_DMAMUX_REQ_I2C1_TX 0x00000009U /*!< DMAMUX I2C1 TX request */
78 #endif /* I2C1 */
79 #ifdef I2C2
80 #define LL_DMAMUX_REQ_I2C2_RX 0x0000000AU /*!< DMAMUX I2C2 RX request */
81 #define LL_DMAMUX_REQ_I2C2_TX 0x0000000BU /*!< DMAMUX I2C2 TX request */
82 #endif /* I2C2 */
83 #define LL_DMAMUX_REQ_USART1_RX 0x0000000CU /*!< DMAMUX USART1 RX request */
84 #define LL_DMAMUX_REQ_USART1_TX 0x0000000DU /*!< DMAMUX USART1 TX request */
85 #define LL_DMAMUX_REQ_LPUART1_RX 0x0000000EU /*!< DMAMUX LPUART1 RX request */
86 #define LL_DMAMUX_REQ_LPUART1_TX 0x0000000FU /*!< DMAMUX LPUART1 TX request */
87 #define LL_DMAMUX_REQ_ADC1_DS 0x00000010U /*!< DMAMUX ADC DS output request */
88 #ifdef ADC_DF_DATAOUT_DF_DATA
89 #define LL_DMAMUX_REQ_ADC1_DF 0x00000011U /*!< DMAMUX ADC DF output request */
90 #endif /* ADC_DF_DATAOUT_DF_DATA */
91 #ifdef TIM2
92 #define LL_DMAMUX_REQ_TIM2_CH1 0x00000012U /*!< DMAMUX TIM2 CH1 request */
93 #define LL_DMAMUX_REQ_TIM2_CH2 0x00000013U /*!< DMAMUX TIM2 CH3 request */
94 #define LL_DMAMUX_REQ_TIM2_CH3 0x00000014U /*!< DMAMUX TIM2 CH3 request */
95 #define LL_DMAMUX_REQ_TIM2_CH4 0x00000015U /*!< DMAMUX TIM2 CH4 request */
96 #define LL_DMAMUX_REQ_TIM2_UP 0x00000016U /*!< DMAMUX TIM2 UP request */
97 #endif /* TIM2 */
98 #ifdef TIM16
99 #define LL_DMAMUX_REQ_TIM16_CH1 0x00000017U /*!< DMAMUX TIM16 CH1 request */
100 #define LL_DMAMUX_REQ_TIM16_UP 0x00000018U /*!< DMAMUX TIM16 UP request */
101 #endif /* TIM16 */
102 #ifdef TIM17
103 #define LL_DMAMUX_REQ_TIM17_CH1 0x00000019U /*!< DMAMUX TIM17 CH1 request */
104 #define LL_DMAMUX_REQ_TIM17_UP 0x0000001AU /*!< DMAMUX TIM17 UP request */
105 #endif /* TIM17 */
106
107
108 #if defined(STM32WB06) || defined(STM32WB07)
109 #define LL_DMAMUX_MAX_REQ LL_DMAMUX_REQ_ADC1_DF
110 #endif
111 #if defined (STM32WB05) || defined(STM32WB09)
112 #define LL_DMAMUX_MAX_REQ LL_DMAMUX_REQ_TIM17_UP
113 #endif
114 /**
115 * @}
116 */
117
118 /** @defgroup DMAMUX_LL_EC_CHANNEL DMAMUX Channel
119 * @{
120 */
121 #define LL_DMAMUX_CHANNEL_0 0x00000000U /*!< DMAMUX Channel 0 connected to DMA1 Channel 1 */
122 #define LL_DMAMUX_CHANNEL_1 0x00000001U /*!< DMAMUX Channel 1 connected to DMA1 Channel 2 */
123 #define LL_DMAMUX_CHANNEL_2 0x00000002U /*!< DMAMUX Channel 2 connected to DMA1 Channel 3 */
124 #define LL_DMAMUX_CHANNEL_3 0x00000003U /*!< DMAMUX Channel 3 connected to DMA1 Channel 4 */
125 #define LL_DMAMUX_CHANNEL_4 0x00000004U /*!< DMAMUX Channel 4 connected to DMA1 Channel 5 */
126 #define LL_DMAMUX_CHANNEL_5 0x00000005U /*!< DMAMUX Channel 5 connected to DMA1 Channel 6 */
127 #define LL_DMAMUX_CHANNEL_6 0x00000006U /*!< DMAMUX Channel 6 connected to DMA1 Channel 7 */
128 #define LL_DMAMUX_CHANNEL_7 0x00000007U /*!< DMAMUX Channel 7 connected to DMA1 Channel 8 */
129 /**
130 * @}
131 */
132
133 /**
134 * @}
135 */
136
137 /* Exported macro ------------------------------------------------------------*/
138 /** @defgroup DMAMUX_LL_Exported_Macros DMAMUX Exported Macros
139 * @{
140 */
141
142 /** @defgroup DMAMUX_LL_EM_WRITE_READ Common Write and read registers macros
143 * @{
144 */
145 /**
146 * @brief Write a value in DMAMUX register
147 * @param __INSTANCE__ DMAMUX Instance
148 * @param __REG__ Register to be written
149 * @param __VALUE__ Value to be written in the register
150 * @retval None
151 */
152 #define LL_DMAMUX_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
153
154 /**
155 * @brief Read a value in DMAMUX register
156 * @param __INSTANCE__ DMAMUX Instance
157 * @param __REG__ Register to be read
158 * @retval Register value
159 */
160 #define LL_DMAMUX_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
161 /**
162 * @}
163 */
164
165 /**
166 * @}
167 */
168
169 /* Exported functions --------------------------------------------------------*/
170 /** @defgroup DMAMUX_LL_Exported_Functions DMAMUX Exported Functions
171 * @{
172 */
173
174 /** @defgroup DMAMUX_LL_EF_Configuration Configuration
175 * @{
176 */
177 /**
178 * @brief Set DMAMUX request ID for DMAMUX Channel x.
179 * @note DMAMUX channel 0 to 7 are mapped to DMA1 channel 1 to 8.
180 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_SetRequestID
181 * @param DMAMUXx DMAMUXx Instance
182 * @param Channel This parameter can be one of the following values:
183 * @arg LL_DMAMUX_CHANNEL_0
184 * @arg LL_DMAMUX_CHANNEL_1
185 * @arg LL_DMAMUX_CHANNEL_2
186 * @arg LL_DMAMUX_CHANNEL_3
187 * @arg LL_DMAMUX_CHANNEL_4
188 * @arg LL_DMAMUX_CHANNEL_5
189 * @arg LL_DMAMUX_CHANNEL_6
190 * @arg LL_DMAMUX_CHANNEL_7
191 * @param Request This parameter can be one of the following values:
192 * @arg LL_DMAMUX_REQ_MEM2MEM
193 * @arg LL_DMAMUX_REQ_SPI3_RX
194 * @arg LL_DMAMUX_REQ_SPI3_TX
195 * @arg LL_DMAMUX_REQ_SPI1_RX
196 * @arg LL_DMAMUX_REQ_SPI1_TX
197 * @arg LL_DMAMUX_REQ_SPI2_RX
198 * @arg LL_DMAMUX_REQ_SPI2_TX
199 * @arg LL_DMAMUX_REQ_I2C1_RX
200 * @arg LL_DMAMUX_REQ_I2C1_TX
201 * @arg LL_DMAMUX_REQ_I2C2_RX
202 * @arg LL_DMAMUX_REQ_I2C2_TX
203 * @arg LL_DMAMUX_REQ_USART1_RX
204 * @arg LL_DMAMUX_REQ_USART1_TX
205 * @arg LL_DMAMUX_REQ_LPUART1_RX
206 * @arg LL_DMAMUX_REQ_LPUART1_TX
207 * @arg LL_DMAMUX_REQ_ADC1_DS
208 * @arg LL_DMAMUX_REQ_ADC1_DF
209 * @retval None
210 */
LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel,uint32_t Request)211 __STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef* DMAMUXx, uint32_t Channel, uint32_t Request)
212 {
213 (void)(DMAMUXx);
214 MODIFY_REG((DMAMUX1_Channel0 + Channel)->CxCR, DMAMUX_CxCR_DMAREQ_ID, Request);
215 }
216
217 /**
218 * @brief Get DMAMUX request ID for DMAMUX Channel x.
219 * @note DMAMUX channel 0 to 7 are mapped to DMA1 channel 1 to 8.
220 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_GetRequestID
221 * @param DMAMUXx DMAMUXx Instance
222 * @param Channel This parameter can be one of the following values:
223 * @arg LL_DMAMUX_CHANNEL_0
224 * @arg LL_DMAMUX_CHANNEL_1
225 * @arg LL_DMAMUX_CHANNEL_2
226 * @arg LL_DMAMUX_CHANNEL_3
227 * @arg LL_DMAMUX_CHANNEL_4
228 * @arg LL_DMAMUX_CHANNEL_5
229 * @arg LL_DMAMUX_CHANNEL_6
230 * @arg LL_DMAMUX_CHANNEL_7
231 * @retval Returned value can be one of the following values:
232 * @arg LL_DMAMUX_REQ_MEM2MEM
233 * @arg LL_DMAMUX_REQ_SPI3_RX
234 * @arg LL_DMAMUX_REQ_SPI3_TX
235 * @arg LL_DMAMUX_REQ_SPI1_RX
236 * @arg LL_DMAMUX_REQ_SPI1_TX
237 * @arg LL_DMAMUX_REQ_SPI2_RX
238 * @arg LL_DMAMUX_REQ_SPI2_TX
239 * @arg LL_DMAMUX_REQ_I2C1_RX
240 * @arg LL_DMAMUX_REQ_I2C1_TX
241 * @arg LL_DMAMUX_REQ_I2C2_RX
242 * @arg LL_DMAMUX_REQ_I2C2_TX
243 * @arg LL_DMAMUX_REQ_USART1_RX
244 * @arg LL_DMAMUX_REQ_USART1_TX
245 * @arg LL_DMAMUX_REQ_LPUART1_RX
246 * @arg LL_DMAMUX_REQ_LPUART1_TX
247 * @arg LL_DMAMUX_REQ_ADC1_DS
248 * @arg LL_DMAMUX_REQ_ADC1_DF
249 */
LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef * DMAMUXx,uint32_t Channel)250 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
251 {
252 (void)(DMAMUXx);
253 return (uint32_t)(READ_BIT((DMAMUX1_Channel0 + Channel)->CxCR, DMAMUX_CxCR_DMAREQ_ID));
254 }
255
256 /**
257 * @}
258 */
259
260 /**
261 * @}
262 */
263
264 /**
265 * @}
266 */
267
268 #endif /* DMAMUX1 */
269
270 /**
271 * @}
272 */
273
274 #ifdef __cplusplus
275 }
276 #endif
277
278 #endif /* STM32WB0x_LL_DMAMUX_H */
279
