1 /**
2   ******************************************************************************
3   * @file    stm32u5xx_hal_uart.h
4   * @author  MCD Application Team
5   * @brief   Header file of UART HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2021 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32U5xx_HAL_UART_H
21 #define STM32U5xx_HAL_UART_H
22 
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26 
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32u5xx_hal_def.h"
29 
30 /** @addtogroup STM32U5xx_HAL_Driver
31   * @{
32   */
33 
34 /** @addtogroup UART
35   * @{
36   */
37 
38 /* Exported types ------------------------------------------------------------*/
39 /** @defgroup UART_Exported_Types UART Exported Types
40   * @{
41   */
42 
43 /**
44   * @brief UART Init Structure definition
45   */
46 typedef struct
47 {
48   uint32_t BaudRate;                /*!< This member configures the UART communication baud rate.
49                                          The baud rate register is computed using the following formula:
50                                          LPUART:
51                                          =======
52                                          Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
53                                          where lpuart_ker_ck_pres is the UART input clock divided by a prescaler
54                                          UART:
55                                          =====
56                                          - If oversampling is 16 or in LIN mode,
57                                             Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
58                                          - If oversampling is 8,
59                                             Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) /
60                                             ((huart->Init.BaudRate)))[15:4]
61                                             Baud Rate Register[3] =  0
62                                             Baud Rate Register[2:0] =  (((2 * uart_ker_ckpres) /
63                                             ((huart->Init.BaudRate)))[3:0]) >> 1
64                                          where uart_ker_ck_pres is the UART input clock divided by a prescaler */
65 
66   uint32_t WordLength;              /*!< Specifies the number of data bits transmitted or received in a frame.
67                                          This parameter can be a value of @ref UARTEx_Word_Length. */
68 
69   uint32_t StopBits;                /*!< Specifies the number of stop bits transmitted.
70                                          This parameter can be a value of @ref UART_Stop_Bits. */
71 
72   uint32_t Parity;                  /*!< Specifies the parity mode.
73                                          This parameter can be a value of @ref UART_Parity
74                                          @note When parity is enabled, the computed parity is inserted
75                                                at the MSB position of the transmitted data (9th bit when
76                                                the word length is set to 9 data bits; 8th bit when the
77                                                word length is set to 8 data bits). */
78 
79   uint32_t Mode;                    /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
80                                          This parameter can be a value of @ref UART_Mode. */
81 
82   uint32_t HwFlowCtl;               /*!< Specifies whether the hardware flow control mode is enabled
83                                          or disabled.
84                                          This parameter can be a value of @ref UART_Hardware_Flow_Control. */
85 
86   uint32_t OverSampling;            /*!< Specifies whether the Over sampling 8 is enabled or disabled,
87                                          to achieve higher speed (up to f_PCLK/8).
88                                          This parameter can be a value of @ref UART_Over_Sampling. */
89 
90   uint32_t OneBitSampling;          /*!< Specifies whether a single sample or three samples' majority vote is selected.
91                                          Selecting the single sample method increases the receiver tolerance to clock
92                                          deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
93 
94   uint32_t ClockPrescaler;          /*!< Specifies the prescaler value used to divide the UART clock source.
95                                          This parameter can be a value of @ref UART_ClockPrescaler. */
96 
97 } UART_InitTypeDef;
98 
99 /**
100   * @brief  UART Advanced Features initialization structure definition
101   */
102 typedef struct
103 {
104   uint32_t AdvFeatureInit;        /*!< Specifies which advanced UART features is initialized. Several
105                                        Advanced Features may be initialized at the same time .
106                                        This parameter can be a value of
107                                        @ref UART_Advanced_Features_Initialization_Type. */
108 
109   uint32_t TxPinLevelInvert;      /*!< Specifies whether the TX pin active level is inverted.
110                                        This parameter can be a value of @ref UART_Tx_Inv. */
111 
112   uint32_t RxPinLevelInvert;      /*!< Specifies whether the RX pin active level is inverted.
113                                        This parameter can be a value of @ref UART_Rx_Inv. */
114 
115   uint32_t DataInvert;            /*!< Specifies whether data are inverted (positive/direct logic
116                                        vs negative/inverted logic).
117                                        This parameter can be a value of @ref UART_Data_Inv. */
118 
119   uint32_t Swap;                  /*!< Specifies whether TX and RX pins are swapped.
120                                        This parameter can be a value of @ref UART_Rx_Tx_Swap. */
121 
122   uint32_t OverrunDisable;        /*!< Specifies whether the reception overrun detection is disabled.
123                                        This parameter can be a value of @ref UART_Overrun_Disable. */
124 
125 #if defined(HAL_DMA_MODULE_ENABLED)
126   uint32_t DMADisableonRxError;   /*!< Specifies whether the DMA is disabled in case of reception error.
127                                        This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
128 
129 #endif /* HAL_DMA_MODULE_ENABLED */
130   uint32_t AutoBaudRateEnable;    /*!< Specifies whether auto Baud rate detection is enabled.
131                                        This parameter can be a value of @ref UART_AutoBaudRate_Enable. */
132 
133   uint32_t AutoBaudRateMode;      /*!< If auto Baud rate detection is enabled, specifies how the rate
134                                        detection is carried out.
135                                        This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
136 
137   uint32_t MSBFirst;              /*!< Specifies whether MSB is sent first on UART line.
138                                        This parameter can be a value of @ref UART_MSB_First. */
139 } UART_AdvFeatureInitTypeDef;
140 
141 /**
142   * @brief HAL UART State definition
143   * @note  HAL UART State value is a combination of 2 different substates:
144   *        gState and RxState (see @ref UART_State_Definition).
145   *        - gState contains UART state information related to global Handle management
146   *          and also information related to Tx operations.
147   *          gState value coding follow below described bitmap :
148   *          b7-b6  Error information
149   *             00 : No Error
150   *             01 : (Not Used)
151   *             10 : Timeout
152   *             11 : Error
153   *          b5     Peripheral initialization status
154   *             0  : Reset (Peripheral not initialized)
155   *             1  : Init done (Peripheral initialized. HAL UART Init function already called)
156   *          b4-b3  (not used)
157   *             xx : Should be set to 00
158   *          b2     Intrinsic process state
159   *             0  : Ready
160   *             1  : Busy (Peripheral busy with some configuration or internal operations)
161   *          b1     (not used)
162   *             x  : Should be set to 0
163   *          b0     Tx state
164   *             0  : Ready (no Tx operation ongoing)
165   *             1  : Busy (Tx operation ongoing)
166   *        - RxState contains information related to Rx operations.
167   *          RxState value coding follow below described bitmap :
168   *          b7-b6  (not used)
169   *             xx : Should be set to 00
170   *          b5     Peripheral initialization status
171   *             0  : Reset (Peripheral not initialized)
172   *             1  : Init done (Peripheral initialized)
173   *          b4-b2  (not used)
174   *            xxx : Should be set to 000
175   *          b1     Rx state
176   *             0  : Ready (no Rx operation ongoing)
177   *             1  : Busy (Rx operation ongoing)
178   *          b0     (not used)
179   *             x  : Should be set to 0.
180   */
181 typedef uint32_t HAL_UART_StateTypeDef;
182 
183 /**
184   * @brief HAL UART Reception type definition
185   * @note  HAL UART Reception type value aims to identify which type of Reception is ongoing.
186   *        This parameter can be a value of @ref UART_Reception_Type_Values :
187   *           HAL_UART_RECEPTION_STANDARD         = 0x00U,
188   *           HAL_UART_RECEPTION_TOIDLE           = 0x01U,
189   *           HAL_UART_RECEPTION_TORTO            = 0x02U,
190   *           HAL_UART_RECEPTION_TOCHARMATCH      = 0x03U,
191   */
192 typedef uint32_t HAL_UART_RxTypeTypeDef;
193 
194 /**
195   * @brief HAL UART Rx Event type definition
196   * @note  HAL UART Rx Event type value aims to identify which type of Event has occurred
197   *        leading to call of the RxEvent callback.
198   *        This parameter can be a value of @ref UART_RxEvent_Type_Values :
199   *           HAL_UART_RXEVENT_TC                 = 0x00U,
200   *           HAL_UART_RXEVENT_HT                 = 0x01U,
201   *           HAL_UART_RXEVENT_IDLE               = 0x02U,
202   */
203 typedef uint32_t HAL_UART_RxEventTypeTypeDef;
204 
205 /**
206   * @brief  UART handle Structure definition
207   */
208 typedef struct __UART_HandleTypeDef
209 {
210   USART_TypeDef            *Instance;                /*!< UART registers base address        */
211 
212   UART_InitTypeDef         Init;                     /*!< UART communication parameters      */
213 
214   UART_AdvFeatureInitTypeDef AdvancedInit;           /*!< UART Advanced Features initialization parameters */
215 
216   const uint8_t            *pTxBuffPtr;              /*!< Pointer to UART Tx transfer Buffer */
217 
218   uint16_t                 TxXferSize;               /*!< UART Tx Transfer size              */
219 
220   __IO uint16_t            TxXferCount;              /*!< UART Tx Transfer Counter           */
221 
222   uint8_t                  *pRxBuffPtr;              /*!< Pointer to UART Rx transfer Buffer */
223 
224   uint16_t                 RxXferSize;               /*!< UART Rx Transfer size              */
225 
226   __IO uint16_t            RxXferCount;              /*!< UART Rx Transfer Counter           */
227 
228   uint16_t                 Mask;                     /*!< UART Rx RDR register mask          */
229 
230   uint32_t                 FifoMode;                 /*!< Specifies if the FIFO mode is being used.
231                                                           This parameter can be a value of @ref UARTEx_FIFO_mode. */
232 
233   uint16_t                 NbRxDataToProcess;        /*!< Number of data to process during RX ISR execution */
234 
235   uint16_t                 NbTxDataToProcess;        /*!< Number of data to process during TX ISR execution */
236 
237   __IO HAL_UART_RxTypeTypeDef ReceptionType;         /*!< Type of ongoing reception          */
238 
239   __IO HAL_UART_RxEventTypeTypeDef RxEventType;      /*!< Type of Rx Event                   */
240 
241   void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
242 
243   void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
244 
245 #if defined(HAL_DMA_MODULE_ENABLED)
246   DMA_HandleTypeDef        *hdmatx;                  /*!< UART Tx DMA Handle parameters      */
247 
248   DMA_HandleTypeDef        *hdmarx;                  /*!< UART Rx DMA Handle parameters      */
249 
250 #endif /* HAL_DMA_MODULE_ENABLED */
251   HAL_LockTypeDef           Lock;                    /*!< Locking object                     */
252 
253   __IO HAL_UART_StateTypeDef    gState;              /*!< UART state information related to global Handle management
254                                                           and also related to Tx operations. This parameter
255                                                           can be a value of @ref HAL_UART_StateTypeDef */
256 
257   __IO HAL_UART_StateTypeDef    RxState;             /*!< UART state information related to Rx operations. This
258                                                           parameter can be a value of @ref HAL_UART_StateTypeDef */
259 
260   __IO uint32_t                 ErrorCode;           /*!< UART Error code                    */
261 
262 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
263   void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart);        /*!< UART Tx Half Complete Callback        */
264   void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart);            /*!< UART Tx Complete Callback             */
265   void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart);        /*!< UART Rx Half Complete Callback        */
266   void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart);            /*!< UART Rx Complete Callback             */
267   void (* ErrorCallback)(struct __UART_HandleTypeDef *huart);             /*!< UART Error Callback                   */
268   void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart);         /*!< UART Abort Complete Callback          */
269   void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
270   void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart);  /*!< UART Abort Receive Complete Callback  */
271   void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart);        /*!< UART Rx Fifo Full Callback            */
272   void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart);       /*!< UART Tx Fifo Empty Callback           */
273   void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback     */
274 
275   void (* MspInitCallback)(struct __UART_HandleTypeDef *huart);           /*!< UART Msp Init callback                */
276   void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart);         /*!< UART Msp DeInit callback              */
277 #endif  /* USE_HAL_UART_REGISTER_CALLBACKS */
278 
279 } UART_HandleTypeDef;
280 
281 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
282 /**
283   * @brief  HAL UART Callback ID enumeration definition
284   */
285 typedef enum
286 {
287   HAL_UART_TX_HALFCOMPLETE_CB_ID         = 0x00U,    /*!< UART Tx Half Complete Callback ID        */
288   HAL_UART_TX_COMPLETE_CB_ID             = 0x01U,    /*!< UART Tx Complete Callback ID             */
289   HAL_UART_RX_HALFCOMPLETE_CB_ID         = 0x02U,    /*!< UART Rx Half Complete Callback ID        */
290   HAL_UART_RX_COMPLETE_CB_ID             = 0x03U,    /*!< UART Rx Complete Callback ID             */
291   HAL_UART_ERROR_CB_ID                   = 0x04U,    /*!< UART Error Callback ID                   */
292   HAL_UART_ABORT_COMPLETE_CB_ID          = 0x05U,    /*!< UART Abort Complete Callback ID          */
293   HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U,    /*!< UART Abort Transmit Complete Callback ID */
294   HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID  = 0x07U,    /*!< UART Abort Receive Complete Callback ID  */
295   HAL_UART_RX_FIFO_FULL_CB_ID            = 0x09U,    /*!< UART Rx Fifo Full Callback ID            */
296   HAL_UART_TX_FIFO_EMPTY_CB_ID           = 0x0AU,    /*!< UART Tx Fifo Empty Callback ID           */
297 
298   HAL_UART_MSPINIT_CB_ID                 = 0x0BU,    /*!< UART MspInit callback ID                 */
299   HAL_UART_MSPDEINIT_CB_ID               = 0x0CU     /*!< UART MspDeInit callback ID               */
300 
301 } HAL_UART_CallbackIDTypeDef;
302 
303 /**
304   * @brief  HAL UART Callback pointer definition
305   */
306 typedef  void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
307 typedef  void (*pUART_RxEventCallbackTypeDef)
308 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */
309 
310 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
311 
312 /**
313   * @}
314   */
315 
316 /* Exported constants --------------------------------------------------------*/
317 /** @defgroup UART_Exported_Constants UART Exported Constants
318   * @{
319   */
320 
321 /** @defgroup UART_State_Definition UART State Code Definition
322   * @{
323   */
324 #define  HAL_UART_STATE_RESET         0x00000000U    /*!< Peripheral is not initialized
325                                                           Value is allowed for gState and RxState */
326 #define  HAL_UART_STATE_READY         0x00000020U    /*!< Peripheral Initialized and ready for use
327                                                           Value is allowed for gState and RxState */
328 #define  HAL_UART_STATE_BUSY          0x00000024U    /*!< an internal process is ongoing
329                                                           Value is allowed for gState only */
330 #define  HAL_UART_STATE_BUSY_TX       0x00000021U    /*!< Data Transmission process is ongoing
331                                                           Value is allowed for gState only */
332 #define  HAL_UART_STATE_BUSY_RX       0x00000022U    /*!< Data Reception process is ongoing
333                                                           Value is allowed for RxState only */
334 #define  HAL_UART_STATE_BUSY_TX_RX    0x00000023U    /*!< Data Transmission and Reception process is ongoing
335                                                           Not to be used for neither gState nor RxState.Value is result
336                                                           of combination (Or) between gState and RxState values */
337 #define  HAL_UART_STATE_TIMEOUT       0x000000A0U    /*!< Timeout state
338                                                           Value is allowed for gState only */
339 #define  HAL_UART_STATE_ERROR         0x000000E0U    /*!< Error
340                                                           Value is allowed for gState only */
341 /**
342   * @}
343   */
344 
345 /** @defgroup UART_Error_Definition   UART Error Definition
346   * @{
347   */
348 #define  HAL_UART_ERROR_NONE             (0x00000000U)    /*!< No error                */
349 #define  HAL_UART_ERROR_PE               (0x00000001U)    /*!< Parity error            */
350 #define  HAL_UART_ERROR_NE               (0x00000002U)    /*!< Noise error             */
351 #define  HAL_UART_ERROR_FE               (0x00000004U)    /*!< Frame error             */
352 #define  HAL_UART_ERROR_ORE              (0x00000008U)    /*!< Overrun error           */
353 #if defined(HAL_DMA_MODULE_ENABLED)
354 #define  HAL_UART_ERROR_DMA              (0x00000010U)    /*!< DMA transfer error      */
355 #endif /* HAL_DMA_MODULE_ENABLED */
356 #define  HAL_UART_ERROR_RTO              (0x00000020U)    /*!< Receiver Timeout error  */
357 
358 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
359 #define  HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U)    /*!< Invalid Callback error  */
360 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
361 /**
362   * @}
363   */
364 
365 /** @defgroup UART_Stop_Bits   UART Number of Stop Bits
366   * @{
367   */
368 #define UART_STOPBITS_0_5                    USART_CR2_STOP_0                     /*!< UART frame with 0.5 stop bit  */
369 #define UART_STOPBITS_1                     0x00000000U                           /*!< UART frame with 1 stop bit    */
370 #define UART_STOPBITS_1_5                   (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
371 #define UART_STOPBITS_2                      USART_CR2_STOP_1                     /*!< UART frame with 2 stop bits   */
372 /**
373   * @}
374   */
375 
376 /** @defgroup UART_Parity  UART Parity
377   * @{
378   */
379 #define UART_PARITY_NONE                    0x00000000U                        /*!< No parity   */
380 #define UART_PARITY_EVEN                    USART_CR1_PCE                      /*!< Even parity */
381 #define UART_PARITY_ODD                     (USART_CR1_PCE | USART_CR1_PS)     /*!< Odd parity  */
382 /**
383   * @}
384   */
385 
386 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
387   * @{
388   */
389 #define UART_HWCONTROL_NONE                  0x00000000U                          /*!< No hardware control       */
390 #define UART_HWCONTROL_RTS                   USART_CR3_RTSE                       /*!< Request To Send           */
391 #define UART_HWCONTROL_CTS                   USART_CR3_CTSE                       /*!< Clear To Send             */
392 #define UART_HWCONTROL_RTS_CTS               (USART_CR3_RTSE | USART_CR3_CTSE)    /*!< Request and Clear To Send */
393 /**
394   * @}
395   */
396 
397 /** @defgroup UART_Mode UART Transfer Mode
398   * @{
399   */
400 #define UART_MODE_RX                        USART_CR1_RE                    /*!< RX mode        */
401 #define UART_MODE_TX                        USART_CR1_TE                    /*!< TX mode        */
402 #define UART_MODE_TX_RX                     (USART_CR1_TE |USART_CR1_RE)    /*!< RX and TX mode */
403 /**
404   * @}
405   */
406 
407 /** @defgroup UART_State  UART State
408   * @{
409   */
410 #define UART_STATE_DISABLE                  0x00000000U         /*!< UART disabled  */
411 #define UART_STATE_ENABLE                   USART_CR1_UE        /*!< UART enabled   */
412 /**
413   * @}
414   */
415 
416 /** @defgroup UART_Over_Sampling UART Over Sampling
417   * @{
418   */
419 #define UART_OVERSAMPLING_16                0x00000000U         /*!< Oversampling by 16 */
420 #define UART_OVERSAMPLING_8                 USART_CR1_OVER8     /*!< Oversampling by 8  */
421 /**
422   * @}
423   */
424 
425 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
426   * @{
427   */
428 #define UART_ONE_BIT_SAMPLE_DISABLE         0x00000000U         /*!< One-bit sampling disable */
429 #define UART_ONE_BIT_SAMPLE_ENABLE          USART_CR3_ONEBIT    /*!< One-bit sampling enable  */
430 /**
431   * @}
432   */
433 
434 /** @defgroup UART_ClockPrescaler  UART Clock Prescaler
435   * @{
436   */
437 #define UART_PRESCALER_DIV1    0x00000000U  /*!< fclk_pres = fclk     */
438 #define UART_PRESCALER_DIV2    0x00000001U  /*!< fclk_pres = fclk/2   */
439 #define UART_PRESCALER_DIV4    0x00000002U  /*!< fclk_pres = fclk/4   */
440 #define UART_PRESCALER_DIV6    0x00000003U  /*!< fclk_pres = fclk/6   */
441 #define UART_PRESCALER_DIV8    0x00000004U  /*!< fclk_pres = fclk/8   */
442 #define UART_PRESCALER_DIV10   0x00000005U  /*!< fclk_pres = fclk/10  */
443 #define UART_PRESCALER_DIV12   0x00000006U  /*!< fclk_pres = fclk/12  */
444 #define UART_PRESCALER_DIV16   0x00000007U  /*!< fclk_pres = fclk/16  */
445 #define UART_PRESCALER_DIV32   0x00000008U  /*!< fclk_pres = fclk/32  */
446 #define UART_PRESCALER_DIV64   0x00000009U  /*!< fclk_pres = fclk/64  */
447 #define UART_PRESCALER_DIV128  0x0000000AU  /*!< fclk_pres = fclk/128 */
448 #define UART_PRESCALER_DIV256  0x0000000BU  /*!< fclk_pres = fclk/256 */
449 /**
450   * @}
451   */
452 
453 /** @defgroup UART_AutoBaud_Rate_Mode    UART Advanced Feature AutoBaud Rate Mode
454   * @{
455   */
456 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT    0x00000000U           /*!< Auto Baud rate detection
457                                                                               on start bit              */
458 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0   /*!< Auto Baud rate detection
459                                                                               on falling edge           */
460 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME   USART_CR2_ABRMODE_1   /*!< Auto Baud rate detection
461                                                                               on 0x7F frame detection   */
462 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME   USART_CR2_ABRMODE     /*!< Auto Baud rate detection
463                                                                               on 0x55 frame detection   */
464 /**
465   * @}
466   */
467 
468 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout
469   * @{
470   */
471 #define UART_RECEIVER_TIMEOUT_DISABLE       0x00000000U                /*!< UART Receiver Timeout disable */
472 #define UART_RECEIVER_TIMEOUT_ENABLE        USART_CR2_RTOEN            /*!< UART Receiver Timeout enable  */
473 /**
474   * @}
475   */
476 
477 /** @defgroup UART_LIN    UART Local Interconnection Network mode
478   * @{
479   */
480 #define UART_LIN_DISABLE                    0x00000000U                /*!< Local Interconnect Network disable */
481 #define UART_LIN_ENABLE                     USART_CR2_LINEN            /*!< Local Interconnect Network enable  */
482 /**
483   * @}
484   */
485 
486 /** @defgroup UART_LIN_Break_Detection  UART LIN Break Detection
487   * @{
488   */
489 #define UART_LINBREAKDETECTLENGTH_10B       0x00000000U                /*!< LIN 10-bit break detection length */
490 #define UART_LINBREAKDETECTLENGTH_11B       USART_CR2_LBDL             /*!< LIN 11-bit break detection length  */
491 /**
492   * @}
493   */
494 
495 #if defined(HAL_DMA_MODULE_ENABLED)
496 /** @defgroup UART_DMA_Tx    UART DMA Tx
497   * @{
498   */
499 #define UART_DMA_TX_DISABLE                 0x00000000U                /*!< UART DMA TX disabled */
500 #define UART_DMA_TX_ENABLE                  USART_CR3_DMAT             /*!< UART DMA TX enabled  */
501 /**
502   * @}
503   */
504 
505 /** @defgroup UART_DMA_Rx   UART DMA Rx
506   * @{
507   */
508 #define UART_DMA_RX_DISABLE                 0x00000000U                 /*!< UART DMA RX disabled */
509 #define UART_DMA_RX_ENABLE                  USART_CR3_DMAR              /*!< UART DMA RX enabled  */
510 /**
511   * @}
512   */
513 #endif /* HAL_DMA_MODULE_ENABLED */
514 
515 /** @defgroup UART_Half_Duplex_Selection  UART Half Duplex Selection
516   * @{
517   */
518 #define UART_HALF_DUPLEX_DISABLE            0x00000000U                 /*!< UART half-duplex disabled */
519 #define UART_HALF_DUPLEX_ENABLE             USART_CR3_HDSEL             /*!< UART half-duplex enabled  */
520 /**
521   * @}
522   */
523 
524 /** @defgroup UART_WakeUp_Methods   UART WakeUp Methods
525   * @{
526   */
527 #define UART_WAKEUPMETHOD_IDLELINE          0x00000000U                 /*!< UART wake-up on idle line    */
528 #define UART_WAKEUPMETHOD_ADDRESSMARK       USART_CR1_WAKE              /*!< UART wake-up on address mark */
529 /**
530   * @}
531   */
532 
533 /** @defgroup UART_Request_Parameters UART Request Parameters
534   * @{
535   */
536 #define UART_AUTOBAUD_REQUEST               USART_RQR_ABRRQ        /*!< Auto-Baud Rate Request      */
537 #define UART_SENDBREAK_REQUEST              USART_RQR_SBKRQ        /*!< Send Break Request          */
538 #define UART_MUTE_MODE_REQUEST              USART_RQR_MMRQ         /*!< Mute Mode Request           */
539 #define UART_RXDATA_FLUSH_REQUEST           USART_RQR_RXFRQ        /*!< Receive Data flush Request  */
540 #define UART_TXDATA_FLUSH_REQUEST           USART_RQR_TXFRQ        /*!< Transmit data flush Request */
541 /**
542   * @}
543   */
544 
545 /** @defgroup UART_Advanced_Features_Initialization_Type  UART Advanced Feature Initialization Type
546   * @{
547   */
548 #define UART_ADVFEATURE_NO_INIT                 0x00000000U          /*!< No advanced feature initialization       */
549 #define UART_ADVFEATURE_TXINVERT_INIT           0x00000001U          /*!< TX pin active level inversion            */
550 #define UART_ADVFEATURE_RXINVERT_INIT           0x00000002U          /*!< RX pin active level inversion            */
551 #define UART_ADVFEATURE_DATAINVERT_INIT         0x00000004U          /*!< Binary data inversion                    */
552 #define UART_ADVFEATURE_SWAP_INIT               0x00000008U          /*!< TX/RX pins swap                          */
553 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT   0x00000010U          /*!< RX overrun disable                       */
554 #if defined(HAL_DMA_MODULE_ENABLED)
555 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT  0x00000020U          /*!< DMA disable on Reception Error           */
556 #endif /* HAL_DMA_MODULE_ENABLED */
557 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT       0x00000040U          /*!< Auto Baud rate detection initialization  */
558 #define UART_ADVFEATURE_MSBFIRST_INIT           0x00000080U          /*!< Most significant bit sent/received first */
559 /**
560   * @}
561   */
562 
563 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
564   * @{
565   */
566 #define UART_ADVFEATURE_TXINV_DISABLE       0x00000000U             /*!< TX pin active level inversion disable */
567 #define UART_ADVFEATURE_TXINV_ENABLE        USART_CR2_TXINV         /*!< TX pin active level inversion enable  */
568 /**
569   * @}
570   */
571 
572 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
573   * @{
574   */
575 #define UART_ADVFEATURE_RXINV_DISABLE       0x00000000U             /*!< RX pin active level inversion disable */
576 #define UART_ADVFEATURE_RXINV_ENABLE        USART_CR2_RXINV         /*!< RX pin active level inversion enable  */
577 /**
578   * @}
579   */
580 
581 /** @defgroup UART_Data_Inv  UART Advanced Feature Binary Data Inversion
582   * @{
583   */
584 #define UART_ADVFEATURE_DATAINV_DISABLE     0x00000000U             /*!< Binary data inversion disable */
585 #define UART_ADVFEATURE_DATAINV_ENABLE      USART_CR2_DATAINV       /*!< Binary data inversion enable  */
586 /**
587   * @}
588   */
589 
590 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
591   * @{
592   */
593 #define UART_ADVFEATURE_SWAP_DISABLE        0x00000000U             /*!< TX/RX pins swap disable */
594 #define UART_ADVFEATURE_SWAP_ENABLE         USART_CR2_SWAP          /*!< TX/RX pins swap enable  */
595 /**
596   * @}
597   */
598 
599 /** @defgroup UART_Overrun_Disable  UART Advanced Feature Overrun Disable
600   * @{
601   */
602 #define UART_ADVFEATURE_OVERRUN_ENABLE      0x00000000U             /*!< RX overrun enable  */
603 #define UART_ADVFEATURE_OVERRUN_DISABLE     USART_CR3_OVRDIS        /*!< RX overrun disable */
604 /**
605   * @}
606   */
607 
608 /** @defgroup UART_AutoBaudRate_Enable  UART Advanced Feature Auto BaudRate Enable
609   * @{
610   */
611 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE   0x00000000U          /*!< RX Auto Baud rate detection enable  */
612 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE    USART_CR2_ABREN      /*!< RX Auto Baud rate detection disable */
613 /**
614   * @}
615   */
616 
617 #if defined(HAL_DMA_MODULE_ENABLED)
618 /** @defgroup UART_DMA_Disable_on_Rx_Error   UART Advanced Feature DMA Disable On Rx Error
619   * @{
620   */
621 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR    0x00000000U          /*!< DMA enable on Reception Error  */
622 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR   USART_CR3_DDRE       /*!< DMA disable on Reception Error */
623 /**
624   * @}
625   */
626 #endif /* HAL_DMA_MODULE_ENABLED */
627 
628 /** @defgroup UART_MSB_First   UART Advanced Feature MSB First
629   * @{
630   */
631 #define UART_ADVFEATURE_MSBFIRST_DISABLE    0x00000000U             /*!< Most significant bit sent/received
632                                                                          first disable                      */
633 #define UART_ADVFEATURE_MSBFIRST_ENABLE     USART_CR2_MSBFIRST      /*!< Most significant bit sent/received
634                                                                          first enable                       */
635 /**
636   * @}
637   */
638 
639 /** @defgroup UART_Stop_Mode_Enable   UART Advanced Feature Stop Mode Enable
640   * @{
641   */
642 #define UART_ADVFEATURE_STOPMODE_DISABLE    0x00000000U             /*!< UART stop mode disable */
643 #define UART_ADVFEATURE_STOPMODE_ENABLE     USART_CR1_UESM          /*!< UART stop mode enable  */
644 /**
645   * @}
646   */
647 
648 /** @defgroup UART_Mute_Mode   UART Advanced Feature Mute Mode Enable
649   * @{
650   */
651 #define UART_ADVFEATURE_MUTEMODE_DISABLE    0x00000000U             /*!< UART mute mode disable */
652 #define UART_ADVFEATURE_MUTEMODE_ENABLE     USART_CR1_MME           /*!< UART mute mode enable  */
653 /**
654   * @}
655   */
656 
657 /** @defgroup UART_CR2_ADDRESS_LSB_POS    UART Address-matching LSB Position In CR2 Register
658   * @{
659   */
660 #define UART_CR2_ADDRESS_LSB_POS             24U             /*!< UART address-matching LSB position in CR2 register */
661 /**
662   * @}
663   */
664 
665 /** @defgroup UART_WakeUp_from_Stop_Selection   UART WakeUp From Stop Selection
666   * @{
667   */
668 #define UART_WAKEUP_ON_ADDRESS              0x00000000U             /*!< UART wake-up on address                     */
669 #define UART_WAKEUP_ON_READDATA_NONEMPTY    0x00000001U             /*!< UART wake-up on receive data register
670                                                                          not empty or RXFIFO is not empty            */
671 /**
672   * @}
673   */
674 
675 /** @defgroup UART_DriverEnable_Polarity      UART DriverEnable Polarity
676   * @{
677   */
678 #define UART_DE_POLARITY_HIGH               0x00000000U             /*!< Driver enable signal is active high */
679 #define UART_DE_POLARITY_LOW                USART_CR3_DEP           /*!< Driver enable signal is active low  */
680 /**
681   * @}
682   */
683 
684 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS    UART Driver Enable Assertion Time LSB Position In CR1 Register
685   * @{
686   */
687 #define UART_CR1_DEAT_ADDRESS_LSB_POS       21U      /*!< UART Driver Enable assertion time LSB
688                                                           position in CR1 register */
689 /**
690   * @}
691   */
692 
693 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS    UART Driver Enable DeAssertion Time LSB Position In CR1 Register
694   * @{
695   */
696 #define UART_CR1_DEDT_ADDRESS_LSB_POS       16U      /*!< UART Driver Enable de-assertion time LSB
697                                                           position in CR1 register */
698 /**
699   * @}
700   */
701 
702 /** @defgroup UART_Interruption_Mask    UART Interruptions Flag Mask
703   * @{
704   */
705 #define UART_IT_MASK                        0x001FU  /*!< UART interruptions flags mask */
706 /**
707   * @}
708   */
709 
710 /** @defgroup UART_TimeOut_Value    UART polling-based communications time-out value
711   * @{
712   */
713 #define HAL_UART_TIMEOUT_VALUE              0x1FFFFFFU  /*!< UART polling-based communications time-out value */
714 /**
715   * @}
716   */
717 
718 /** @defgroup UART_Flags     UART Status Flags
719   *        Elements values convention: 0xXXXX
720   *           - 0xXXXX  : Flag mask in the ISR register
721   * @{
722   */
723 #define UART_FLAG_TXFT                      USART_ISR_TXFT          /*!< UART TXFIFO threshold flag                */
724 #define UART_FLAG_RXFT                      USART_ISR_RXFT          /*!< UART RXFIFO threshold flag                */
725 #define UART_FLAG_RXFF                      USART_ISR_RXFF          /*!< UART RXFIFO Full flag                     */
726 #define UART_FLAG_TXFE                      USART_ISR_TXFE          /*!< UART TXFIFO Empty flag                    */
727 #define UART_FLAG_REACK                     USART_ISR_REACK         /*!< UART receive enable acknowledge flag      */
728 #define UART_FLAG_TEACK                     USART_ISR_TEACK         /*!< UART transmit enable acknowledge flag     */
729 #define UART_FLAG_RWU                       USART_ISR_RWU           /*!< UART receiver wake-up from mute mode flag */
730 #define UART_FLAG_SBKF                      USART_ISR_SBKF          /*!< UART send break flag                      */
731 #define UART_FLAG_CMF                       USART_ISR_CMF           /*!< UART character match flag                 */
732 #define UART_FLAG_BUSY                      USART_ISR_BUSY          /*!< UART busy flag                            */
733 #define UART_FLAG_ABRF                      USART_ISR_ABRF          /*!< UART auto Baud rate flag                  */
734 #define UART_FLAG_ABRE                      USART_ISR_ABRE          /*!< UART auto Baud rate error                 */
735 #define UART_FLAG_RTOF                      USART_ISR_RTOF          /*!< UART receiver timeout flag                */
736 #define UART_FLAG_CTS                       USART_ISR_CTS           /*!< UART clear to send flag                   */
737 #define UART_FLAG_CTSIF                     USART_ISR_CTSIF         /*!< UART clear to send interrupt flag         */
738 #define UART_FLAG_LBDF                      USART_ISR_LBDF          /*!< UART LIN break detection flag             */
739 #define UART_FLAG_TXE                       USART_ISR_TXE_TXFNF     /*!< UART transmit data register empty         */
740 #define UART_FLAG_TXFNF                     USART_ISR_TXE_TXFNF     /*!< UART TXFIFO not full                      */
741 #define UART_FLAG_TC                        USART_ISR_TC            /*!< UART transmission complete                */
742 #define UART_FLAG_RXNE                      USART_ISR_RXNE_RXFNE    /*!< UART read data register not empty         */
743 #define UART_FLAG_RXFNE                     USART_ISR_RXNE_RXFNE    /*!< UART RXFIFO not empty                     */
744 #define UART_FLAG_IDLE                      USART_ISR_IDLE          /*!< UART idle flag                            */
745 #define UART_FLAG_ORE                       USART_ISR_ORE           /*!< UART overrun error                        */
746 #define UART_FLAG_NE                        USART_ISR_NE            /*!< UART noise error                          */
747 #define UART_FLAG_FE                        USART_ISR_FE            /*!< UART frame error                          */
748 #define UART_FLAG_PE                        USART_ISR_PE            /*!< UART parity error                         */
749 /**
750   * @}
751   */
752 
753 /** @defgroup UART_Interrupt_definition   UART Interrupts Definition
754   *        Elements values convention: 000ZZZZZ0XXYYYYYb
755   *           - YYYYY  : Interrupt source position in the XX register (5bits)
756   *           - XX  : Interrupt source register (2bits)
757   *                 - 01: CR1 register
758   *                 - 10: CR2 register
759   *                 - 11: CR3 register
760   *           - ZZZZZ  : Flag position in the ISR register(5bits)
761   *        Elements values convention: 000000000XXYYYYYb
762   *           - YYYYY  : Interrupt source position in the XX register (5bits)
763   *           - XX  : Interrupt source register (2bits)
764   *                 - 01: CR1 register
765   *                 - 10: CR2 register
766   *                 - 11: CR3 register
767   *        Elements values convention: 0000ZZZZ00000000b
768   *           - ZZZZ  : Flag position in the ISR register(4bits)
769   * @{
770   */
771 #define UART_IT_PE                          0x0028U              /*!< UART parity error interruption                 */
772 #define UART_IT_TXE                         0x0727U              /*!< UART transmit data register empty interruption */
773 #define UART_IT_TXFNF                       0x0727U              /*!< UART TX FIFO not full interruption             */
774 #define UART_IT_TC                          0x0626U              /*!< UART transmission complete interruption        */
775 #define UART_IT_RXNE                        0x0525U              /*!< UART read data register not empty interruption */
776 #define UART_IT_RXFNE                       0x0525U              /*!< UART RXFIFO not empty interruption             */
777 #define UART_IT_IDLE                        0x0424U              /*!< UART idle interruption                         */
778 #define UART_IT_LBD                         0x0846U              /*!< UART LIN break detection interruption          */
779 #define UART_IT_CTS                         0x096AU              /*!< UART CTS interruption                          */
780 #define UART_IT_CM                          0x112EU              /*!< UART character match interruption              */
781 #define UART_IT_RXFF                        0x183FU              /*!< UART RXFIFO full interruption                  */
782 #define UART_IT_TXFE                        0x173EU              /*!< UART TXFIFO empty interruption                 */
783 #define UART_IT_RXFT                        0x1A7CU              /*!< UART RXFIFO threshold reached interruption     */
784 #define UART_IT_TXFT                        0x1B77U              /*!< UART TXFIFO threshold reached interruption     */
785 #define UART_IT_RTO                         0x0B3AU              /*!< UART receiver timeout interruption             */
786 
787 #define UART_IT_ERR                         0x0060U              /*!< UART error interruption                        */
788 
789 #define UART_IT_ORE                         0x0300U              /*!< UART overrun error interruption                */
790 #define UART_IT_NE                          0x0200U              /*!< UART noise error interruption                  */
791 #define UART_IT_FE                          0x0100U              /*!< UART frame error interruption                  */
792 /**
793   * @}
794   */
795 
796 /** @defgroup UART_IT_CLEAR_Flags  UART Interruption Clear Flags
797   * @{
798   */
799 #define UART_CLEAR_PEF                       USART_ICR_PECF            /*!< Parity Error Clear Flag           */
800 #define UART_CLEAR_FEF                       USART_ICR_FECF            /*!< Framing Error Clear Flag          */
801 #define UART_CLEAR_NEF                       USART_ICR_NECF            /*!< Noise Error detected Clear Flag   */
802 #define UART_CLEAR_OREF                      USART_ICR_ORECF           /*!< Overrun Error Clear Flag          */
803 #define UART_CLEAR_IDLEF                     USART_ICR_IDLECF          /*!< IDLE line detected Clear Flag     */
804 #define UART_CLEAR_TXFECF                    USART_ICR_TXFECF          /*!< TXFIFO empty clear flag           */
805 #define UART_CLEAR_TCF                       USART_ICR_TCCF            /*!< Transmission Complete Clear Flag  */
806 #define UART_CLEAR_LBDF                      USART_ICR_LBDCF           /*!< LIN Break Detection Clear Flag    */
807 #define UART_CLEAR_CTSF                      USART_ICR_CTSCF           /*!< CTS Interrupt Clear Flag          */
808 #define UART_CLEAR_CMF                       USART_ICR_CMCF            /*!< Character Match Clear Flag        */
809 #define UART_CLEAR_RTOF                      USART_ICR_RTOCF           /*!< UART receiver timeout clear flag  */
810 /**
811   * @}
812   */
813 
814 /** @defgroup UART_Reception_Type_Values  UART Reception type values
815   * @{
816   */
817 #define HAL_UART_RECEPTION_STANDARD          (0x00000000U)             /*!< Standard reception                       */
818 #define HAL_UART_RECEPTION_TOIDLE            (0x00000001U)             /*!< Reception till completion or IDLE event  */
819 #define HAL_UART_RECEPTION_TORTO             (0x00000002U)             /*!< Reception till completion or RTO event   */
820 #define HAL_UART_RECEPTION_TOCHARMATCH       (0x00000003U)             /*!< Reception till completion or CM event    */
821 /**
822   * @}
823   */
824 
825 /** @defgroup UART_RxEvent_Type_Values  UART RxEvent type values
826   * @{
827   */
828 #define HAL_UART_RXEVENT_TC                  (0x00000000U)             /*!< RxEvent linked to Transfer Complete event */
829 #define HAL_UART_RXEVENT_HT                  (0x00000001U)             /*!< RxEvent linked to Half Transfer event     */
830 #define HAL_UART_RXEVENT_IDLE                (0x00000002U)             /*!< RxEvent linked to IDLE event              */
831 /**
832   * @}
833   */
834 
835 /**
836   * @}
837   */
838 
839 /* Exported macros -----------------------------------------------------------*/
840 /** @defgroup UART_Exported_Macros UART Exported Macros
841   * @{
842   */
843 
844 /** @brief  Reset UART handle states.
845   * @param  __HANDLE__ UART handle.
846   * @retval None
847   */
848 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
849 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__)  do{                                                   \
850                                                        (__HANDLE__)->gState = HAL_UART_STATE_RESET;      \
851                                                        (__HANDLE__)->RxState = HAL_UART_STATE_RESET;     \
852                                                        (__HANDLE__)->MspInitCallback = NULL;             \
853                                                        (__HANDLE__)->MspDeInitCallback = NULL;           \
854                                                      } while(0U)
855 #else
856 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__)  do{                                                   \
857                                                        (__HANDLE__)->gState = HAL_UART_STATE_RESET;      \
858                                                        (__HANDLE__)->RxState = HAL_UART_STATE_RESET;     \
859                                                      } while(0U)
860 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */
861 
862 /** @brief  Flush the UART Data registers.
863   * @param  __HANDLE__ specifies the UART Handle.
864   * @retval None
865   */
866 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__)  \
867   do{                \
868     SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
869     SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
870   }  while(0U)
871 
872 /** @brief  Clear the specified UART pending flag.
873   * @param  __HANDLE__ specifies the UART Handle.
874   * @param  __FLAG__ specifies the flag to check.
875   *          This parameter can be any combination of the following values:
876   *            @arg @ref UART_CLEAR_PEF      Parity Error Clear Flag
877   *            @arg @ref UART_CLEAR_FEF      Framing Error Clear Flag
878   *            @arg @ref UART_CLEAR_NEF      Noise detected Clear Flag
879   *            @arg @ref UART_CLEAR_OREF     Overrun Error Clear Flag
880   *            @arg @ref UART_CLEAR_IDLEF    IDLE line detected Clear Flag
881   *            @arg @ref UART_CLEAR_TXFECF   TXFIFO empty clear Flag
882   *            @arg @ref UART_CLEAR_TCF      Transmission Complete Clear Flag
883   *            @arg @ref UART_CLEAR_RTOF     Receiver Timeout clear flag
884   *            @arg @ref UART_CLEAR_LBDF     LIN Break Detection Clear Flag
885   *            @arg @ref UART_CLEAR_CTSF     CTS Interrupt Clear Flag
886   *            @arg @ref UART_CLEAR_CMF      Character Match Clear Flag
887   * @retval None
888   */
889 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
890 
891 /** @brief  Clear the UART PE pending flag.
892   * @param  __HANDLE__ specifies the UART Handle.
893   * @retval None
894   */
895 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
896 
897 /** @brief  Clear the UART FE pending flag.
898   * @param  __HANDLE__ specifies the UART Handle.
899   * @retval None
900   */
901 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
902 
903 /** @brief  Clear the UART NE pending flag.
904   * @param  __HANDLE__ specifies the UART Handle.
905   * @retval None
906   */
907 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__)  __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
908 
909 /** @brief  Clear the UART ORE pending flag.
910   * @param  __HANDLE__ specifies the UART Handle.
911   * @retval None
912   */
913 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
914 
915 /** @brief  Clear the UART IDLE pending flag.
916   * @param  __HANDLE__ specifies the UART Handle.
917   * @retval None
918   */
919 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
920 
921 /** @brief  Clear the UART TX FIFO empty clear flag.
922   * @param  __HANDLE__ specifies the UART Handle.
923   * @retval None
924   */
925 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__)   __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF)
926 
927 /** @brief  Check whether the specified UART flag is set or not.
928   * @param  __HANDLE__ specifies the UART Handle.
929   * @param  __FLAG__ specifies the flag to check.
930   *        This parameter can be one of the following values:
931   *            @arg @ref UART_FLAG_TXFT  TXFIFO threshold flag
932   *            @arg @ref UART_FLAG_RXFT  RXFIFO threshold flag
933   *            @arg @ref UART_FLAG_RXFF  RXFIFO Full flag
934   *            @arg @ref UART_FLAG_TXFE  TXFIFO Empty flag
935   *            @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
936   *            @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
937   *            @arg @ref UART_FLAG_RWU   Receiver wake up flag (if the UART in mute mode)
938   *            @arg @ref UART_FLAG_SBKF  Send Break flag
939   *            @arg @ref UART_FLAG_CMF   Character match flag
940   *            @arg @ref UART_FLAG_BUSY  Busy flag
941   *            @arg @ref UART_FLAG_ABRF  Auto Baud rate detection flag
942   *            @arg @ref UART_FLAG_ABRE  Auto Baud rate detection error flag
943   *            @arg @ref UART_FLAG_CTS   CTS Change flag
944   *            @arg @ref UART_FLAG_LBDF  LIN Break detection flag
945   *            @arg @ref UART_FLAG_TXE   Transmit data register empty flag
946   *            @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag
947   *            @arg @ref UART_FLAG_TC    Transmission Complete flag
948   *            @arg @ref UART_FLAG_RXNE  Receive data register not empty flag
949   *            @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag
950   *            @arg @ref UART_FLAG_RTOF  Receiver Timeout flag
951   *            @arg @ref UART_FLAG_IDLE  Idle Line detection flag
952   *            @arg @ref UART_FLAG_ORE   Overrun Error flag
953   *            @arg @ref UART_FLAG_NE    Noise Error flag
954   *            @arg @ref UART_FLAG_FE    Framing Error flag
955   *            @arg @ref UART_FLAG_PE    Parity Error flag
956   * @retval The new state of __FLAG__ (TRUE or FALSE).
957   */
958 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
959 
960 /** @brief  Enable the specified UART interrupt.
961   * @param  __HANDLE__ specifies the UART Handle.
962   * @param  __INTERRUPT__ specifies the UART interrupt source to enable.
963   *          This parameter can be one of the following values:
964   *            @arg @ref UART_IT_RXFF  RXFIFO Full interrupt
965   *            @arg @ref UART_IT_TXFE  TXFIFO Empty interrupt
966   *            @arg @ref UART_IT_RXFT  RXFIFO threshold interrupt
967   *            @arg @ref UART_IT_TXFT  TXFIFO threshold interrupt
968   *            @arg @ref UART_IT_CM    Character match interrupt
969   *            @arg @ref UART_IT_CTS   CTS change interrupt
970   *            @arg @ref UART_IT_LBD   LIN Break detection interrupt
971   *            @arg @ref UART_IT_TXE   Transmit Data Register empty interrupt
972   *            @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
973   *            @arg @ref UART_IT_TC    Transmission complete interrupt
974   *            @arg @ref UART_IT_RXNE  Receive Data register not empty interrupt
975   *            @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
976   *            @arg @ref UART_IT_RTO   Receive Timeout interrupt
977   *            @arg @ref UART_IT_IDLE  Idle line detection interrupt
978   *            @arg @ref UART_IT_PE    Parity Error interrupt
979   *            @arg @ref UART_IT_ERR   Error interrupt (frame error, noise error, overrun error)
980   * @retval None
981   */
982 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__)   (\
983                                                            ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\
984                                                            ((__HANDLE__)->Instance->CR1 |= (1U <<\
985                                                                ((__INTERRUPT__) & UART_IT_MASK))): \
986                                                            ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\
987                                                            ((__HANDLE__)->Instance->CR2 |= (1U <<\
988                                                                ((__INTERRUPT__) & UART_IT_MASK))): \
989                                                            ((__HANDLE__)->Instance->CR3 |= (1U <<\
990                                                                ((__INTERRUPT__) & UART_IT_MASK))))
991 
992 /** @brief  Disable the specified UART interrupt.
993   * @param  __HANDLE__ specifies the UART Handle.
994   * @param  __INTERRUPT__ specifies the UART interrupt source to disable.
995   *          This parameter can be one of the following values:
996   *            @arg @ref UART_IT_RXFF  RXFIFO Full interrupt
997   *            @arg @ref UART_IT_TXFE  TXFIFO Empty interrupt
998   *            @arg @ref UART_IT_RXFT  RXFIFO threshold interrupt
999   *            @arg @ref UART_IT_TXFT  TXFIFO threshold interrupt
1000   *            @arg @ref UART_IT_CM    Character match interrupt
1001   *            @arg @ref UART_IT_CTS   CTS change interrupt
1002   *            @arg @ref UART_IT_LBD   LIN Break detection interrupt
1003   *            @arg @ref UART_IT_TXE   Transmit Data Register empty interrupt
1004   *            @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1005   *            @arg @ref UART_IT_TC    Transmission complete interrupt
1006   *            @arg @ref UART_IT_RXNE  Receive Data register not empty interrupt
1007   *            @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1008   *            @arg @ref UART_IT_RTO   Receive Timeout interrupt
1009   *            @arg @ref UART_IT_IDLE  Idle line detection interrupt
1010   *            @arg @ref UART_IT_PE    Parity Error interrupt
1011   *            @arg @ref UART_IT_ERR   Error interrupt (Frame error, noise error, overrun error)
1012   * @retval None
1013   */
1014 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__)  (\
1015                                                            ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\
1016                                                            ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\
1017                                                                ((__INTERRUPT__) & UART_IT_MASK))): \
1018                                                            ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\
1019                                                            ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\
1020                                                                ((__INTERRUPT__) & UART_IT_MASK))): \
1021                                                            ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\
1022                                                                ((__INTERRUPT__) & UART_IT_MASK))))
1023 
1024 /** @brief  Check whether the specified UART interrupt has occurred or not.
1025   * @param  __HANDLE__ specifies the UART Handle.
1026   * @param  __INTERRUPT__ specifies the UART interrupt to check.
1027   *          This parameter can be one of the following values:
1028   *            @arg @ref UART_IT_RXFF  RXFIFO Full interrupt
1029   *            @arg @ref UART_IT_TXFE  TXFIFO Empty interrupt
1030   *            @arg @ref UART_IT_RXFT  RXFIFO threshold interrupt
1031   *            @arg @ref UART_IT_TXFT  TXFIFO threshold interrupt
1032   *            @arg @ref UART_IT_CM    Character match interrupt
1033   *            @arg @ref UART_IT_CTS   CTS change interrupt
1034   *            @arg @ref UART_IT_LBD   LIN Break detection interrupt
1035   *            @arg @ref UART_IT_TXE   Transmit Data Register empty interrupt
1036   *            @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1037   *            @arg @ref UART_IT_TC    Transmission complete interrupt
1038   *            @arg @ref UART_IT_RXNE  Receive Data register not empty interrupt
1039   *            @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1040   *            @arg @ref UART_IT_RTO   Receive Timeout interrupt
1041   *            @arg @ref UART_IT_IDLE  Idle line detection interrupt
1042   *            @arg @ref UART_IT_PE    Parity Error interrupt
1043   *            @arg @ref UART_IT_ERR   Error interrupt (Frame error, noise error, overrun error)
1044   * @retval The new state of __INTERRUPT__ (SET or RESET).
1045   */
1046 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
1047                                                         & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET)
1048 
1049 /** @brief  Check whether the specified UART interrupt source is enabled or not.
1050   * @param  __HANDLE__ specifies the UART Handle.
1051   * @param  __INTERRUPT__ specifies the UART interrupt source to check.
1052   *          This parameter can be one of the following values:
1053   *            @arg @ref UART_IT_RXFF  RXFIFO Full interrupt
1054   *            @arg @ref UART_IT_TXFE  TXFIFO Empty interrupt
1055   *            @arg @ref UART_IT_RXFT  RXFIFO threshold interrupt
1056   *            @arg @ref UART_IT_TXFT  TXFIFO threshold interrupt
1057   *            @arg @ref UART_IT_CM    Character match interrupt
1058   *            @arg @ref UART_IT_CTS   CTS change interrupt
1059   *            @arg @ref UART_IT_LBD   LIN Break detection interrupt
1060   *            @arg @ref UART_IT_TXE   Transmit Data Register empty interrupt
1061   *            @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
1062   *            @arg @ref UART_IT_TC    Transmission complete interrupt
1063   *            @arg @ref UART_IT_RXNE  Receive Data register not empty interrupt
1064   *            @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
1065   *            @arg @ref UART_IT_RTO   Receive Timeout interrupt
1066   *            @arg @ref UART_IT_IDLE  Idle line detection interrupt
1067   *            @arg @ref UART_IT_PE    Parity Error interrupt
1068   *            @arg @ref UART_IT_ERR   Error interrupt (Frame error, noise error, overrun error)
1069   * @retval The new state of __INTERRUPT__ (SET or RESET).
1070   */
1071 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\
1072                                                                 (__HANDLE__)->Instance->CR1 : \
1073                                                                 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\
1074                                                                  (__HANDLE__)->Instance->CR2 : \
1075                                                                  (__HANDLE__)->Instance->CR3)) & (1U <<\
1076                                                                      (((uint16_t)(__INTERRUPT__)) &\
1077                                                                       UART_IT_MASK)))  != RESET) ? SET : RESET)
1078 
1079 /** @brief  Clear the specified UART ISR flag, in setting the proper ICR register flag.
1080   * @param  __HANDLE__ specifies the UART Handle.
1081   * @param  __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
1082   *                       to clear the corresponding interrupt
1083   *          This parameter can be one of the following values:
1084   *            @arg @ref UART_CLEAR_PEF    Parity Error Clear Flag
1085   *            @arg @ref UART_CLEAR_FEF    Framing Error Clear Flag
1086   *            @arg @ref UART_CLEAR_NEF    Noise detected Clear Flag
1087   *            @arg @ref UART_CLEAR_OREF   Overrun Error Clear Flag
1088   *            @arg @ref UART_CLEAR_IDLEF  IDLE line detected Clear Flag
1089   *            @arg @ref UART_CLEAR_RTOF   Receiver timeout clear flag
1090   *            @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag
1091   *            @arg @ref UART_CLEAR_TCF    Transmission Complete Clear Flag
1092   *            @arg @ref UART_CLEAR_LBDF   LIN Break Detection Clear Flag
1093   *            @arg @ref UART_CLEAR_CTSF   CTS Interrupt Clear Flag
1094   *            @arg @ref UART_CLEAR_CMF    Character Match Clear Flag
1095   * @retval None
1096   */
1097 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
1098 
1099 /** @brief  Set a specific UART request flag.
1100   * @param  __HANDLE__ specifies the UART Handle.
1101   * @param  __REQ__ specifies the request flag to set
1102   *          This parameter can be one of the following values:
1103   *            @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
1104   *            @arg @ref UART_SENDBREAK_REQUEST Send Break Request
1105   *            @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
1106   *            @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
1107   *            @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
1108   * @retval None
1109   */
1110 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
1111 
1112 /** @brief  Enable the UART one bit sample method.
1113   * @param  __HANDLE__ specifies the UART Handle.
1114   * @retval None
1115   */
1116 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
1117 
1118 /** @brief  Disable the UART one bit sample method.
1119   * @param  __HANDLE__ specifies the UART Handle.
1120   * @retval None
1121   */
1122 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
1123 
1124 /** @brief  Enable UART.
1125   * @param  __HANDLE__ specifies the UART Handle.
1126   * @retval None
1127   */
1128 #define __HAL_UART_ENABLE(__HANDLE__)                   ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
1129 
1130 /** @brief  Disable UART.
1131   * @param  __HANDLE__ specifies the UART Handle.
1132   * @retval None
1133   */
1134 #define __HAL_UART_DISABLE(__HANDLE__)                  ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
1135 
1136 /** @brief  Enable CTS flow control.
1137   * @note   This macro allows to enable CTS hardware flow control for a given UART instance,
1138   *         without need to call HAL_UART_Init() function.
1139   *         As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1140   * @note   As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1141   *         for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1142   *           - UART instance should have already been initialised (through call of HAL_UART_Init() )
1143   *           - macro could only be called when corresponding UART instance is disabled
1144   *             (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1145   *              macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1146   * @param  __HANDLE__ specifies the UART Handle.
1147   * @retval None
1148   */
1149 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__)               \
1150   do{                                                             \
1151     ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE);  \
1152     (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE;               \
1153   } while(0U)
1154 
1155 /** @brief  Disable CTS flow control.
1156   * @note   This macro allows to disable CTS hardware flow control for a given UART instance,
1157   *         without need to call HAL_UART_Init() function.
1158   *         As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1159   * @note   As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1160   *         for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1161   *           - UART instance should have already been initialised (through call of HAL_UART_Init() )
1162   *           - macro could only be called when corresponding UART instance is disabled
1163   *             (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1164   *              macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1165   * @param  __HANDLE__ specifies the UART Handle.
1166   * @retval None
1167   */
1168 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__)               \
1169   do{                                                              \
1170     ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1171     (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE);             \
1172   } while(0U)
1173 
1174 /** @brief  Enable RTS flow control.
1175   * @note   This macro allows to enable RTS hardware flow control for a given UART instance,
1176   *         without need to call HAL_UART_Init() function.
1177   *         As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1178   * @note   As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1179   *         for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1180   *           - UART instance should have already been initialised (through call of HAL_UART_Init() )
1181   *           - macro could only be called when corresponding UART instance is disabled
1182   *             (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1183   *              macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1184   * @param  __HANDLE__ specifies the UART Handle.
1185   * @retval None
1186   */
1187 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__)              \
1188   do{                                                            \
1189     ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1190     (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE;              \
1191   } while(0U)
1192 
1193 /** @brief  Disable RTS flow control.
1194   * @note   This macro allows to disable RTS hardware flow control for a given UART instance,
1195   *         without need to call HAL_UART_Init() function.
1196   *         As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1197   * @note   As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1198   *         for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1199   *           - UART instance should have already been initialised (through call of HAL_UART_Init() )
1200   *           - macro could only be called when corresponding UART instance is disabled
1201   *             (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable
1202   *              macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1203   * @param  __HANDLE__ specifies the UART Handle.
1204   * @retval None
1205   */
1206 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__)              \
1207   do{                                                             \
1208     ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
1209     (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE);            \
1210   } while(0U)
1211 /**
1212   * @}
1213   */
1214 
1215 /* Private macros --------------------------------------------------------*/
1216 /** @defgroup UART_Private_Macros   UART Private Macros
1217   * @{
1218   */
1219 /** @brief  Get UART clock division factor from clock prescaler value.
1220   * @param  __CLOCKPRESCALER__ UART prescaler value.
1221   * @retval UART clock division factor
1222   */
1223 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
1224   (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1)   ? 1U :       \
1225    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2)   ? 2U :       \
1226    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4)   ? 4U :       \
1227    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6)   ? 6U :       \
1228    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8)   ? 8U :       \
1229    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10)  ? 10U :      \
1230    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12)  ? 12U :      \
1231    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16)  ? 16U :      \
1232    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32)  ? 32U :      \
1233    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64)  ? 64U :      \
1234    ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : 256U)
1235 
1236 /** @brief  BRR division operation to set BRR register with LPUART.
1237   * @param  __PCLK__ LPUART clock.
1238   * @param  __BAUD__ Baud rate set by the user.
1239   * @param  __CLOCKPRESCALER__ UART prescaler value.
1240   * @retval Division result
1241   */
1242 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__)                        \
1243   ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \
1244                (uint32_t)((__BAUD__)/2U)) / (__BAUD__))                                \
1245   )
1246 
1247 /** @brief  BRR division operation to set BRR register in 8-bit oversampling mode.
1248   * @param  __PCLK__ UART clock.
1249   * @param  __BAUD__ Baud rate set by the user.
1250   * @param  __CLOCKPRESCALER__ UART prescaler value.
1251   * @retval Division result
1252   */
1253 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__)                        \
1254   (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__))
1255 
1256 /** @brief  BRR division operation to set BRR register in 16-bit oversampling mode.
1257   * @param  __PCLK__ UART clock.
1258   * @param  __BAUD__ Baud rate set by the user.
1259   * @param  __CLOCKPRESCALER__ UART prescaler value.
1260   * @retval Division result
1261   */
1262 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__)                       \
1263   ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__))
1264 
1265 /** @brief  Check whether or not UART instance is Low Power UART.
1266   * @param  __HANDLE__ specifies the UART Handle.
1267   * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
1268   */
1269 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance))
1270 
1271 /** @brief  Check UART Baud rate.
1272   * @param  __BAUDRATE__ Baudrate specified by the user.
1273   *         The maximum Baud Rate is derived from the maximum clock on U5 (i.e. 160 MHz)
1274   *         divided by the smallest oversampling used on the USART (i.e. 8)
1275   * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
1276   */
1277 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 20000000U)
1278 
1279 /** @brief  Check UART assertion time.
1280   * @param  __TIME__ 5-bit value assertion time.
1281   * @retval Test result (TRUE or FALSE).
1282   */
1283 #define IS_UART_ASSERTIONTIME(__TIME__)    ((__TIME__) <= 0x1FU)
1284 
1285 /** @brief  Check UART deassertion time.
1286   * @param  __TIME__ 5-bit value deassertion time.
1287   * @retval Test result (TRUE or FALSE).
1288   */
1289 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1290 
1291 /**
1292   * @brief Ensure that UART frame number of stop bits is valid.
1293   * @param __STOPBITS__ UART frame number of stop bits.
1294   * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1295   */
1296 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
1297                                         ((__STOPBITS__) == UART_STOPBITS_1)   || \
1298                                         ((__STOPBITS__) == UART_STOPBITS_1_5) || \
1299                                         ((__STOPBITS__) == UART_STOPBITS_2))
1300 
1301 /**
1302   * @brief Ensure that LPUART frame number of stop bits is valid.
1303   * @param __STOPBITS__ LPUART frame number of stop bits.
1304   * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1305   */
1306 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
1307                                           ((__STOPBITS__) == UART_STOPBITS_2))
1308 
1309 /**
1310   * @brief Ensure that UART frame parity is valid.
1311   * @param __PARITY__ UART frame parity.
1312   * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
1313   */
1314 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
1315                                     ((__PARITY__) == UART_PARITY_EVEN) || \
1316                                     ((__PARITY__) == UART_PARITY_ODD))
1317 
1318 /**
1319   * @brief Ensure that UART hardware flow control is valid.
1320   * @param __CONTROL__ UART hardware flow control.
1321   * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
1322   */
1323 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
1324   (((__CONTROL__) == UART_HWCONTROL_NONE) || \
1325    ((__CONTROL__) == UART_HWCONTROL_RTS)  || \
1326    ((__CONTROL__) == UART_HWCONTROL_CTS)  || \
1327    ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
1328 
1329 /**
1330   * @brief Ensure that UART communication mode is valid.
1331   * @param __MODE__ UART communication mode.
1332   * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1333   */
1334 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
1335 
1336 /**
1337   * @brief Ensure that UART state is valid.
1338   * @param __STATE__ UART state.
1339   * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
1340   */
1341 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
1342                                   ((__STATE__) == UART_STATE_ENABLE))
1343 
1344 /**
1345   * @brief Ensure that UART oversampling is valid.
1346   * @param __SAMPLING__ UART oversampling.
1347   * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
1348   */
1349 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
1350                                             ((__SAMPLING__) == UART_OVERSAMPLING_8))
1351 
1352 /**
1353   * @brief Ensure that UART frame sampling is valid.
1354   * @param __ONEBIT__ UART frame sampling.
1355   * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
1356   */
1357 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
1358                                             ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
1359 
1360 /**
1361   * @brief Ensure that UART auto Baud rate detection mode is valid.
1362   * @param __MODE__ UART auto Baud rate detection mode.
1363   * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1364   */
1365 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__)  (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT)    || \
1366                                                         ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
1367                                                         ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME)   || \
1368                                                         ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
1369 
1370 /**
1371   * @brief Ensure that UART receiver timeout setting is valid.
1372   * @param __TIMEOUT__ UART receiver timeout setting.
1373   * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
1374   */
1375 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__)  (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
1376                                                 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
1377 
1378 /** @brief  Check the receiver timeout value.
1379   * @note   The maximum UART receiver timeout value is 0xFFFFFF.
1380   * @param  __TIMEOUTVALUE__ receiver timeout value.
1381   * @retval Test result (TRUE or FALSE)
1382   */
1383 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__)  ((__TIMEOUTVALUE__) <= 0xFFFFFFU)
1384 
1385 /**
1386   * @brief Ensure that UART LIN state is valid.
1387   * @param __LIN__ UART LIN state.
1388   * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
1389   */
1390 #define IS_UART_LIN(__LIN__)        (((__LIN__) == UART_LIN_DISABLE) || \
1391                                      ((__LIN__) == UART_LIN_ENABLE))
1392 
1393 /**
1394   * @brief Ensure that UART LIN break detection length is valid.
1395   * @param __LENGTH__ UART LIN break detection length.
1396   * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
1397   */
1398 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
1399                                                      ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
1400 
1401 #if defined(HAL_DMA_MODULE_ENABLED)
1402 /**
1403   * @brief Ensure that UART DMA TX state is valid.
1404   * @param __DMATX__ UART DMA TX state.
1405   * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
1406   */
1407 #define IS_UART_DMA_TX(__DMATX__)     (((__DMATX__) == UART_DMA_TX_DISABLE) || \
1408                                        ((__DMATX__) == UART_DMA_TX_ENABLE))
1409 
1410 /**
1411   * @brief Ensure that UART DMA RX state is valid.
1412   * @param __DMARX__ UART DMA RX state.
1413   * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
1414   */
1415 #define IS_UART_DMA_RX(__DMARX__)     (((__DMARX__) == UART_DMA_RX_DISABLE) || \
1416                                        ((__DMARX__) == UART_DMA_RX_ENABLE))
1417 
1418 #endif /* HAL_DMA_MODULE_ENABLED */
1419 /**
1420   * @brief Ensure that UART half-duplex state is valid.
1421   * @param __HDSEL__ UART half-duplex state.
1422   * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
1423   */
1424 #define IS_UART_HALF_DUPLEX(__HDSEL__)     (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
1425                                             ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
1426 
1427 /**
1428   * @brief Ensure that UART wake-up method is valid.
1429   * @param __WAKEUP__ UART wake-up method .
1430   * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
1431   */
1432 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
1433                                           ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
1434 
1435 /**
1436   * @brief Ensure that UART request parameter is valid.
1437   * @param __PARAM__ UART request parameter.
1438   * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
1439   */
1440 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST)     || \
1441                                               ((__PARAM__) == UART_SENDBREAK_REQUEST)    || \
1442                                               ((__PARAM__) == UART_MUTE_MODE_REQUEST)    || \
1443                                               ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
1444                                               ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
1445 
1446 /**
1447   * @brief Ensure that UART advanced features initialization is valid.
1448   * @param __INIT__ UART advanced features initialization.
1449   * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
1450   */
1451 #if defined(HAL_DMA_MODULE_ENABLED)
1452 #define IS_UART_ADVFEATURE_INIT(__INIT__)   ((__INIT__) <= (UART_ADVFEATURE_NO_INIT                | \
1453                                                             UART_ADVFEATURE_TXINVERT_INIT          | \
1454                                                             UART_ADVFEATURE_RXINVERT_INIT          | \
1455                                                             UART_ADVFEATURE_DATAINVERT_INIT        | \
1456                                                             UART_ADVFEATURE_SWAP_INIT              | \
1457                                                             UART_ADVFEATURE_RXOVERRUNDISABLE_INIT  | \
1458                                                             UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
1459                                                             UART_ADVFEATURE_AUTOBAUDRATE_INIT      | \
1460                                                             UART_ADVFEATURE_MSBFIRST_INIT))
1461 #else
1462 #define IS_UART_ADVFEATURE_INIT(__INIT__)   ((__INIT__) <= (UART_ADVFEATURE_NO_INIT                | \
1463                                                             UART_ADVFEATURE_TXINVERT_INIT          | \
1464                                                             UART_ADVFEATURE_RXINVERT_INIT          | \
1465                                                             UART_ADVFEATURE_DATAINVERT_INIT        | \
1466                                                             UART_ADVFEATURE_SWAP_INIT              | \
1467                                                             UART_ADVFEATURE_RXOVERRUNDISABLE_INIT  | \
1468                                                             UART_ADVFEATURE_AUTOBAUDRATE_INIT      | \
1469                                                             UART_ADVFEATURE_MSBFIRST_INIT))
1470 #endif /* HAL_DMA_MODULE_ENABLED */
1471 
1472 /**
1473   * @brief Ensure that UART frame TX inversion setting is valid.
1474   * @param __TXINV__ UART frame TX inversion setting.
1475   * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
1476   */
1477 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
1478                                              ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
1479 
1480 /**
1481   * @brief Ensure that UART frame RX inversion setting is valid.
1482   * @param __RXINV__ UART frame RX inversion setting.
1483   * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
1484   */
1485 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
1486                                              ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
1487 
1488 /**
1489   * @brief Ensure that UART frame data inversion setting is valid.
1490   * @param __DATAINV__ UART frame data inversion setting.
1491   * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
1492   */
1493 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
1494                                                  ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
1495 
1496 /**
1497   * @brief Ensure that UART frame RX/TX pins swap setting is valid.
1498   * @param __SWAP__ UART frame RX/TX pins swap setting.
1499   * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
1500   */
1501 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
1502                                            ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
1503 
1504 /**
1505   * @brief Ensure that UART frame overrun setting is valid.
1506   * @param __OVERRUN__ UART frame overrun setting.
1507   * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
1508   */
1509 #define IS_UART_OVERRUN(__OVERRUN__)     (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
1510                                           ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
1511 
1512 /**
1513   * @brief Ensure that UART auto Baud rate state is valid.
1514   * @param __AUTOBAUDRATE__ UART auto Baud rate state.
1515   * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
1516   */
1517 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \
1518                                                             UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
1519                                                            ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
1520 
1521 #if defined(HAL_DMA_MODULE_ENABLED)
1522 /**
1523   * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
1524   * @param __DMA__ UART DMA enabling or disabling on error setting.
1525   * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
1526   */
1527 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__)  (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
1528                                                    ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
1529 #endif /* HAL_DMA_MODULE_ENABLED */
1530 
1531 /**
1532   * @brief Ensure that UART frame MSB first setting is valid.
1533   * @param __MSBFIRST__ UART frame MSB first setting.
1534   * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
1535   */
1536 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
1537                                                    ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
1538 
1539 /**
1540   * @brief Ensure that UART stop mode state is valid.
1541   * @param __STOPMODE__ UART stop mode state.
1542   * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
1543   */
1544 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
1545                                                    ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
1546 
1547 /**
1548   * @brief Ensure that UART mute mode state is valid.
1549   * @param __MUTE__ UART mute mode state.
1550   * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
1551   */
1552 #define IS_UART_MUTE_MODE(__MUTE__)       (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
1553                                            ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
1554 
1555 /**
1556   * @brief Ensure that UART wake-up selection is valid.
1557   * @param __WAKE__ UART wake-up selection.
1558   * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
1559   */
1560 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS)           || \
1561                                             ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
1562 
1563 /**
1564   * @brief Ensure that UART driver enable polarity is valid.
1565   * @param __POLARITY__ UART driver enable polarity.
1566   * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
1567   */
1568 #define IS_UART_DE_POLARITY(__POLARITY__)    (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
1569                                               ((__POLARITY__) == UART_DE_POLARITY_LOW))
1570 
1571 /**
1572   * @brief Ensure that UART Prescaler is valid.
1573   * @param __CLOCKPRESCALER__ UART Prescaler value.
1574   * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
1575   */
1576 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1)   || \
1577                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2)   || \
1578                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4)   || \
1579                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6)   || \
1580                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8)   || \
1581                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10)  || \
1582                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12)  || \
1583                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16)  || \
1584                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32)  || \
1585                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64)  || \
1586                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \
1587                                                ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256))
1588 
1589 /**
1590   * @}
1591   */
1592 
1593 /* Include UART HAL Extended module */
1594 #include "stm32u5xx_hal_uart_ex.h"
1595 
1596 /* Exported functions --------------------------------------------------------*/
1597 /** @addtogroup UART_Exported_Functions UART Exported Functions
1598   * @{
1599   */
1600 
1601 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
1602   * @{
1603   */
1604 
1605 /* Initialization and de-initialization functions  ****************************/
1606 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
1607 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
1608 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
1609 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
1610 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
1611 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
1612 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
1613 
1614 /* Callbacks Register/UnRegister functions  ***********************************/
1615 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1616 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
1617                                             pUART_CallbackTypeDef pCallback);
1618 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
1619 
1620 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback);
1621 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart);
1622 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1623 
1624 /**
1625   * @}
1626   */
1627 
1628 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
1629   * @{
1630   */
1631 
1632 /* IO operation functions *****************************************************/
1633 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
1634 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1635 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
1636 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1637 #if defined(HAL_DMA_MODULE_ENABLED)
1638 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size);
1639 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1640 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
1641 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
1642 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
1643 #endif /* HAL_DMA_MODULE_ENABLED */
1644 /* Transfer Abort functions */
1645 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
1646 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
1647 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
1648 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
1649 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
1650 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
1651 
1652 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
1653 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
1654 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
1655 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
1656 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
1657 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
1658 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
1659 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
1660 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
1661 
1662 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size);
1663 
1664 /**
1665   * @}
1666   */
1667 
1668 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
1669   * @{
1670   */
1671 
1672 /* Peripheral Control functions  ************************************************/
1673 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue);
1674 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart);
1675 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart);
1676 
1677 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
1678 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
1679 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
1680 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
1681 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
1682 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
1683 
1684 /**
1685   * @}
1686   */
1687 
1688 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
1689   * @{
1690   */
1691 
1692 /* Peripheral State and Errors functions  **************************************************/
1693 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart);
1694 uint32_t              HAL_UART_GetError(const UART_HandleTypeDef *huart);
1695 
1696 /**
1697   * @}
1698   */
1699 
1700 /**
1701   * @}
1702   */
1703 
1704 /* Private functions -----------------------------------------------------------*/
1705 /** @addtogroup UART_Private_Functions UART Private Functions
1706   * @{
1707   */
1708 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1709 void              UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
1710 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1711 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
1712 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
1713 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
1714                                               uint32_t Tickstart, uint32_t Timeout);
1715 void              UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
1716 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1717 #if defined(HAL_DMA_MODULE_ENABLED)
1718 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1719 #endif /* HAL_DMA_MODULE_ENABLED */
1720 
1721 /**
1722   * @}
1723   */
1724 
1725 /* Private variables -----------------------------------------------------------*/
1726 /** @defgroup UART_Private_variables UART Private variables
1727   * @{
1728   */
1729 /* Prescaler Table used in BRR computation macros.
1730    Declared as extern here to allow use of private UART macros, outside of HAL UART functions */
1731 extern const uint16_t UARTPrescTable[12];
1732 /**
1733   * @}
1734   */
1735 
1736 /**
1737   * @}
1738   */
1739 
1740 /**
1741   * @}
1742   */
1743 
1744 #ifdef __cplusplus
1745 }
1746 #endif
1747 
1748 #endif /* STM32U5xx_HAL_UART_H */
1749