1 /** 2 ****************************************************************************** 3 * @file stm32u5xx_hal_spi_ex.h 4 * @author MCD Application Team 5 * @brief Header file of SPI HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2021 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U5xx_HAL_SPI_EX_H 21 #define STM32U5xx_HAL_SPI_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u5xx_hal_def.h" 29 30 /** @addtogroup STM32U5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup SPIEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup SPIEx_Exported_Types SPIEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief SPI Autonomous Mode Configuration structure definition 45 */ 46 typedef struct 47 { 48 uint32_t TriggerState; /*!< Specifies the trigger state. This parameter can be a value 49 of @ref FunctionalState */ 50 51 uint32_t TriggerSelection; /*!< Specifies the autonomous mode trigger signal selection. This parameter 52 can be a value of @ref SPI_AutonomousMode_TriggerSelection */ 53 54 uint32_t TriggerPolarity; /*!< Specifies the autonomous mode trigger signal polarity sensitivity. This parameter 55 can be a value of @ref SPI_AutonomousMode_TriggerPolarity */ 56 57 } SPI_AutonomousModeConfTypeDef; 58 59 60 /** 61 * @} 62 */ 63 64 /* Exported constants --------------------------------------------------------*/ 65 /** @defgroup SPIEx_Exported_Constants SPIEx Exported Constants 66 * @{ 67 */ 68 69 /** @defgroup FunctionalState SPI Autonomous Mode State 70 * @{ 71 */ 72 #define SPI_AUTO_MODE_DISABLE (0x00000000UL) 73 #define SPI_AUTO_MODE_ENABLE SPI_AUTOCR_TRIGEN 74 /** 75 * @} 76 */ 77 78 /** @defgroup SPI_AutonomousMode_TriggerSelection Autonomous Mode Trigger Selection 79 * @{ 80 */ 81 #define SPI_TRIG_GRP1 (0x10000000U) /* Trigger Group for SPI1 and SPI2 */ 82 #if defined(SPI3) 83 #define SPI_TRIG_GRP2 (0x20000000U) /* Trigger Group for SPI3 */ 84 #endif /* GRP2_AVAILABILITY */ 85 86 /* HW Trigger signal is GPDMA_CH0_TRG */ 87 #define SPI_GRP1_GPDMA_CH0_TCF_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x00000000U)) 88 /* HW Trigger signal is GPDMA_CH1_TRG */ 89 #define SPI_GRP1_GPDMA_CH1_TCF_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x1U << SPI_AUTOCR_TRIGSEL_Pos)) 90 /* HW Trigger signal is GPDMA_CH2_TRG */ 91 #define SPI_GRP1_GPDMA_CH2_TCF_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x2U << SPI_AUTOCR_TRIGSEL_Pos)) 92 /* HW Trigger signal is GPDMA_CH3_TRG */ 93 #define SPI_GRP1_GPDMA_CH3_TCF_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x3U << SPI_AUTOCR_TRIGSEL_Pos)) 94 /* HW Trigger signal is EXTI4_TRG */ 95 #define SPI_GRP1_EXTI4_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x4U << SPI_AUTOCR_TRIGSEL_Pos)) 96 /* HW Trigger signal is EXTI9_TRG */ 97 #define SPI_GRP1_EXTI9_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x5U << SPI_AUTOCR_TRIGSEL_Pos)) 98 /* HW Trigger signal is LPTIM1_CH1_TRG */ 99 #define SPI_GRP1_LPTIM1_CH1_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x6U << SPI_AUTOCR_TRIGSEL_Pos)) 100 /* HW Trigger signal is LPTIM2_CH1_TRG */ 101 #define SPI_GRP1_LPTIM2_CH1_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x7U << SPI_AUTOCR_TRIGSEL_Pos)) 102 /* HW Trigger signal is COMP1_TRG */ 103 #define SPI_GRP1_COMP1_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x8U << SPI_AUTOCR_TRIGSEL_Pos)) 104 /* HW Trigger signal is COMP2_TRG */ 105 #define SPI_GRP1_COMP2_TRG (uint32_t)(SPI_TRIG_GRP1 | (0x9U << SPI_AUTOCR_TRIGSEL_Pos)) 106 /* HW Trigger signal is RTC_ALRA_TRG */ 107 #define SPI_GRP1_RTC_ALRA_TRG (uint32_t)(SPI_TRIG_GRP1 | (0xAU << SPI_AUTOCR_TRIGSEL_Pos)) 108 /* HW Trigger signal is RTC_WUT_TRG */ 109 #define SPI_GRP1_RTC_WUT_TRG (uint32_t)(SPI_TRIG_GRP1 | (0xBU << SPI_AUTOCR_TRIGSEL_Pos)) 110 111 #if defined(SPI3) 112 /* HW Trigger signal is LPDMA_CH0_TRG */ 113 #define SPI_GRP2_LPDMA_CH0_TCF_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x00000000U)) 114 /* HW Trigger signal is LPDMA_CH1_TRG */ 115 #define SPI_GRP2_LPDMA_CH1_TCF_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x1U << SPI_AUTOCR_TRIGSEL_Pos)) 116 /* HW Trigger signal is LPDMA_CH2_TRG */ 117 #define SPI_GRP2_LPDMA_CH2_TCF_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x2U << SPI_AUTOCR_TRIGSEL_Pos)) 118 /* HW Trigger signal is LPDMA_CH3_TRG */ 119 #define SPI_GRP2_LPDMA_CH3_TCF_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x3U << SPI_AUTOCR_TRIGSEL_Pos)) 120 /* HW Trigger signal is EXTI4_TRG */ 121 #define SPI_GRP2_EXTI4_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x4U << SPI_AUTOCR_TRIGSEL_Pos)) 122 /* HW Trigger signal is EXTI8_TRG */ 123 #define SPI_GRP2_EXTI8_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x5U << SPI_AUTOCR_TRIGSEL_Pos)) 124 /* HW Trigger signal is LPTIM1_CH1_TRG */ 125 #define SPI_GRP2_LPTIM1_CH1_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x6U << SPI_AUTOCR_TRIGSEL_Pos)) 126 /* HW Trigger signal is LPTIM3_CH1_TRG */ 127 #define SPI_GRP2_LPTIM3_CH1_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x7U << SPI_AUTOCR_TRIGSEL_Pos)) 128 /* HW Trigger signal is COMP1_TRG */ 129 #define SPI_GRP2_COMP1_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x8U << SPI_AUTOCR_TRIGSEL_Pos)) 130 /* HW Trigger signal is COMP2_TRG */ 131 #define SPI_GRP2_COMP2_TRG (uint32_t)(SPI_TRIG_GRP2 | (0x9U << SPI_AUTOCR_TRIGSEL_Pos)) 132 /* HW Trigger signal is RTC_ALRA_TRG */ 133 #define SPI_GRP2_RTC_ALRA_TRG (uint32_t)(SPI_TRIG_GRP2 | (0xAU << SPI_AUTOCR_TRIGSEL_Pos)) 134 /* HW Trigger signal is RTC_WUT_TRG */ 135 #define SPI_GRP2_RTC_WUT_TRG (uint32_t)(SPI_TRIG_GRP2 | (0xBU << SPI_AUTOCR_TRIGSEL_Pos)) 136 #endif /* GRP2_AVAILABILITY */ 137 /** 138 * @} 139 */ 140 141 /** @defgroup SPI_AutonomousMode_TriggerPolarity Autonomous Mode Trigger Polarity 142 * @{ 143 */ 144 #define SPI_TRIG_POLARITY_RISING (0x00000000UL) /* SPI HW Trigger signal on rising edge */ 145 #define SPI_TRIG_POLARITY_FALLING SPI_AUTOCR_TRIGPOL /* SPI HW Trigger signal on falling edge */ 146 /** 147 * @} 148 */ 149 150 /** 151 * @} 152 */ 153 154 /* Exported macros -----------------------------------------------------------*/ 155 /** @defgroup SPIEx_Exported_Macros SPIEx Extended Exported Macros 156 * @{ 157 */ 158 159 #define IS_SPI_AUTO_MODE(__MODE__) (((__MODE__) == SPI_AUTO_MODE_DISABLE) || \ 160 ((__MODE__) == SPI_AUTO_MODE_ENABLE)) 161 162 #if defined(SPI_TRIG_GRP2) 163 #define IS_SPI_AUTONOMOUS_INSTANCE(__INSTANCE__) (IS_SPI_GRP1_INSTANCE(__INSTANCE__) || \ 164 IS_SPI_GRP2_INSTANCE(__INSTANCE__)) 165 #else 166 #define IS_SPI_AUTONOMOUS_INSTANCE(__INSTANCE__) IS_SPI_GRP1_INSTANCE(__INSTANCE__) 167 #endif /* SPI_TRIG_GRP2 */ 168 169 #if defined(SPI_TRIG_GRP2) 170 #define IS_SPI_TRIG_SOURCE(__INSTANCE__, __SOURCE__) ((IS_SPI_GRP2_INSTANCE(__INSTANCE__)) ? \ 171 IS_SPI_GRP2_TRIG_SOURCE(__SOURCE__) : \ 172 IS_SPI_GRP1_TRIG_SOURCE(__SOURCE__)) 173 #endif /* SPI_TRIG_GRP2 */ 174 175 #define IS_SPI_GRP1_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == SPI_GRP1_GPDMA_CH0_TCF_TRG ) || \ 176 ((__SOURCE__) == SPI_GRP1_GPDMA_CH1_TCF_TRG ) || \ 177 ((__SOURCE__) == SPI_GRP1_GPDMA_CH2_TCF_TRG ) || \ 178 ((__SOURCE__) == SPI_GRP1_GPDMA_CH3_TCF_TRG ) || \ 179 ((__SOURCE__) == SPI_GRP1_EXTI4_TRG ) || \ 180 ((__SOURCE__) == SPI_GRP1_EXTI9_TRG ) || \ 181 ((__SOURCE__) == SPI_GRP1_LPTIM1_CH1_TRG ) || \ 182 ((__SOURCE__) == SPI_GRP1_LPTIM2_CH1_TRG ) || \ 183 ((__SOURCE__) == SPI_GRP1_COMP1_TRG ) || \ 184 ((__SOURCE__) == SPI_GRP1_COMP2_TRG ) || \ 185 ((__SOURCE__) == SPI_GRP1_RTC_ALRA_TRG ) || \ 186 ((__SOURCE__) == SPI_GRP1_RTC_WUT_TRG )) 187 188 #define IS_SPI_GRP2_TRIG_SOURCE(__SOURCE__) (((__SOURCE__) == SPI_GRP2_LPDMA_CH0_TCF_TRG ) || \ 189 ((__SOURCE__) == SPI_GRP2_LPDMA_CH1_TCF_TRG ) || \ 190 ((__SOURCE__) == SPI_GRP2_LPDMA_CH2_TCF_TRG ) || \ 191 ((__SOURCE__) == SPI_GRP2_LPDMA_CH3_TCF_TRG ) || \ 192 ((__SOURCE__) == SPI_GRP2_EXTI4_TRG ) || \ 193 ((__SOURCE__) == SPI_GRP2_EXTI8_TRG ) || \ 194 ((__SOURCE__) == SPI_GRP2_LPTIM1_CH1_TRG ) || \ 195 ((__SOURCE__) == SPI_GRP2_LPTIM3_CH1_TRG ) || \ 196 ((__SOURCE__) == SPI_GRP2_COMP1_TRG ) || \ 197 ((__SOURCE__) == SPI_GRP2_COMP2_TRG ) || \ 198 ((__SOURCE__) == SPI_GRP2_RTC_ALRA_TRG ) || \ 199 ((__SOURCE__) == SPI_GRP2_RTC_WUT_TRG )) 200 201 #define IS_SPI_AUTO_MODE_TRG_POL(__POLARITY__) (((__POLARITY__) == SPI_TRIG_POLARITY_RISING) || \ 202 ((__POLARITY__) == SPI_TRIG_POLARITY_FALLING)) 203 204 /** 205 * @} 206 */ 207 208 /* Exported functions --------------------------------------------------------*/ 209 /** @addtogroup SPIEx_Exported_Functions 210 * @{ 211 */ 212 213 /* Initialization and de-initialization functions ****************************/ 214 /* IO operation functions *****************************************************/ 215 /** @addtogroup SPIEx_Exported_Functions_Group1 216 * @{ 217 */ 218 HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(const SPI_HandleTypeDef *hspi); 219 HAL_StatusTypeDef HAL_SPIEx_EnableLockConfiguration(SPI_HandleTypeDef *hspi); 220 HAL_StatusTypeDef HAL_SPIEx_ConfigureUnderrun(SPI_HandleTypeDef *hspi, uint32_t UnderrunDetection, 221 uint32_t UnderrunBehaviour); 222 /** 223 * @} 224 */ 225 226 /** @addtogroup SPI_Autonomous_Mode_Functions Autonomous Mode Functions 227 * @{ 228 */ 229 HAL_StatusTypeDef HAL_SPIEx_SetConfigAutonomousMode(SPI_HandleTypeDef *hspi, 230 const SPI_AutonomousModeConfTypeDef *sConfig); 231 HAL_StatusTypeDef HAL_SPIEx_GetConfigAutonomousMode(const SPI_HandleTypeDef *hspi, 232 SPI_AutonomousModeConfTypeDef *sConfig); 233 HAL_StatusTypeDef HAL_SPIEx_ClearConfigAutonomousMode(SPI_HandleTypeDef *hspi); 234 /** 235 * @} 236 */ 237 /** 238 * @} 239 */ 240 241 /** 242 * @} 243 */ 244 245 /** 246 * @} 247 */ 248 249 250 #ifdef __cplusplus 251 } 252 #endif 253 254 #endif /* STM32U5xx_HAL_SPI_EX_H */ 255
