1 /** 2 ****************************************************************************** 3 * @file stm32u0xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32U0xx_HAL_UART_H 21 #define STM32U0xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32u0xx_hal_def.h" 29 30 /** @addtogroup STM32U0xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler 54 UART: 55 ===== 56 - If oversampling is 16 or in LIN mode, 57 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 58 - If oversampling is 8, 59 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 60 ((huart->Init.BaudRate)))[15:4] 61 Baud Rate Register[3] = 0 62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 63 ((huart->Init.BaudRate)))[3:0]) >> 1 64 where uart_ker_ck_pres is the UART input clock divided by a prescaler */ 65 66 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 67 This parameter can be a value of @ref UARTEx_Word_Length. */ 68 69 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 70 This parameter can be a value of @ref UART_Stop_Bits. */ 71 72 uint32_t Parity; /*!< Specifies the parity mode. 73 This parameter can be a value of @ref UART_Parity 74 @note When parity is enabled, the computed parity is inserted 75 at the MSB position of the transmitted data (9th bit when 76 the word length is set to 9 data bits; 8th bit when the 77 word length is set to 8 data bits). */ 78 79 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 80 This parameter can be a value of @ref UART_Mode. */ 81 82 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 83 or disabled. 84 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 85 86 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 87 to achieve higher speed (up to f_PCLK/8). 88 This parameter can be a value of @ref UART_Over_Sampling. */ 89 90 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 91 Selecting the single sample method increases the receiver tolerance to clock 92 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 93 94 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 95 This parameter can be a value of @ref UART_ClockPrescaler. */ 96 97 } UART_InitTypeDef; 98 99 /** 100 * @brief UART Advanced Features initialization structure definition 101 */ 102 typedef struct 103 { 104 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 105 Advanced Features may be initialized at the same time . 106 This parameter can be a value of 107 @ref UART_Advanced_Features_Initialization_Type. */ 108 109 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 110 This parameter can be a value of @ref UART_Tx_Inv. */ 111 112 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 113 This parameter can be a value of @ref UART_Rx_Inv. */ 114 115 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 116 vs negative/inverted logic). 117 This parameter can be a value of @ref UART_Data_Inv. */ 118 119 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 120 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 121 122 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 123 This parameter can be a value of @ref UART_Overrun_Disable. */ 124 125 #if defined(HAL_DMA_MODULE_ENABLED) 126 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 127 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 128 129 #endif /* HAL_DMA_MODULE_ENABLED */ 130 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 131 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 132 133 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 134 detection is carried out. 135 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 136 137 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 138 This parameter can be a value of @ref UART_MSB_First. */ 139 } UART_AdvFeatureInitTypeDef; 140 141 /** 142 * @brief HAL UART State definition 143 * @note HAL UART State value is a combination of 2 different substates: 144 * gState and RxState (see @ref UART_State_Definition). 145 * - gState contains UART state information related to global Handle management 146 * and also information related to Tx operations. 147 * gState value coding follow below described bitmap : 148 * b7-b6 Error information 149 * 00 : No Error 150 * 01 : (Not Used) 151 * 10 : Timeout 152 * 11 : Error 153 * b5 Peripheral initialization status 154 * 0 : Reset (Peripheral not initialized) 155 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 156 * b4-b3 (not used) 157 * xx : Should be set to 00 158 * b2 Intrinsic process state 159 * 0 : Ready 160 * 1 : Busy (Peripheral busy with some configuration or internal operations) 161 * b1 (not used) 162 * x : Should be set to 0 163 * b0 Tx state 164 * 0 : Ready (no Tx operation ongoing) 165 * 1 : Busy (Tx operation ongoing) 166 * - RxState contains information related to Rx operations. 167 * RxState value coding follow below described bitmap : 168 * b7-b6 (not used) 169 * xx : Should be set to 00 170 * b5 Peripheral initialization status 171 * 0 : Reset (Peripheral not initialized) 172 * 1 : Init done (Peripheral initialized) 173 * b4-b2 (not used) 174 * xxx : Should be set to 000 175 * b1 Rx state 176 * 0 : Ready (no Rx operation ongoing) 177 * 1 : Busy (Rx operation ongoing) 178 * b0 (not used) 179 * x : Should be set to 0. 180 */ 181 typedef uint32_t HAL_UART_StateTypeDef; 182 183 /** 184 * @brief HAL UART Reception type definition 185 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 186 * This parameter can be a value of @ref UART_Reception_Type_Values : 187 * HAL_UART_RECEPTION_STANDARD = 0x00U, 188 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 189 * HAL_UART_RECEPTION_TORTO = 0x02U, 190 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 191 */ 192 typedef uint32_t HAL_UART_RxTypeTypeDef; 193 194 /** 195 * @brief HAL UART Rx Event type definition 196 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 197 * leading to call of the RxEvent callback. 198 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 199 * HAL_UART_RXEVENT_TC = 0x00U, 200 * HAL_UART_RXEVENT_HT = 0x01U, 201 * HAL_UART_RXEVENT_IDLE = 0x02U, 202 */ 203 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 204 205 /** 206 * @brief UART handle Structure definition 207 */ 208 typedef struct __UART_HandleTypeDef 209 { 210 USART_TypeDef *Instance; /*!< UART registers base address */ 211 212 UART_InitTypeDef Init; /*!< UART communication parameters */ 213 214 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 215 216 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 217 218 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 219 220 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 221 222 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 223 224 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 225 226 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 227 228 uint16_t Mask; /*!< UART Rx RDR register mask */ 229 230 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 231 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 232 233 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 234 235 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 236 237 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 238 239 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 240 241 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 242 243 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 244 245 #if defined(HAL_DMA_MODULE_ENABLED) 246 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 247 248 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 249 250 #endif /* HAL_DMA_MODULE_ENABLED */ 251 HAL_LockTypeDef Lock; /*!< Locking object */ 252 253 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 254 and also related to Tx operations. This parameter 255 can be a value of @ref HAL_UART_StateTypeDef */ 256 257 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 258 parameter can be a value of @ref HAL_UART_StateTypeDef */ 259 260 __IO uint32_t ErrorCode; /*!< UART Error code */ 261 262 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 263 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 264 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 265 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 266 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 267 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 268 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 269 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 270 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 271 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 272 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 273 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 274 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 275 276 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 277 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 278 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 279 280 } UART_HandleTypeDef; 281 282 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 283 /** 284 * @brief HAL UART Callback ID enumeration definition 285 */ 286 typedef enum 287 { 288 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 289 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 290 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 291 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 292 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 293 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 294 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 295 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 296 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 297 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 298 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 299 300 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 301 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 302 303 } HAL_UART_CallbackIDTypeDef; 304 305 /** 306 * @brief HAL UART Callback pointer definition 307 */ 308 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 309 typedef void (*pUART_RxEventCallbackTypeDef) 310 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 311 312 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 313 314 /** 315 * @} 316 */ 317 318 /* Exported constants --------------------------------------------------------*/ 319 /** @defgroup UART_Exported_Constants UART Exported Constants 320 * @{ 321 */ 322 323 /** @defgroup UART_State_Definition UART State Code Definition 324 * @{ 325 */ 326 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 327 Value is allowed for gState and RxState */ 328 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 329 Value is allowed for gState and RxState */ 330 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 331 Value is allowed for gState only */ 332 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 333 Value is allowed for gState only */ 334 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 335 Value is allowed for RxState only */ 336 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 337 Not to be used for neither gState nor RxState.Value is result 338 of combination (Or) between gState and RxState values */ 339 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 340 Value is allowed for gState only */ 341 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 342 Value is allowed for gState only */ 343 /** 344 * @} 345 */ 346 347 /** @defgroup UART_Error_Definition UART Error Definition 348 * @{ 349 */ 350 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 351 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 352 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 353 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 354 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 355 #if defined(HAL_DMA_MODULE_ENABLED) 356 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 357 #endif /* HAL_DMA_MODULE_ENABLED */ 358 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 359 360 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 361 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 362 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 363 /** 364 * @} 365 */ 366 367 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 368 * @{ 369 */ 370 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 371 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 372 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 373 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 374 /** 375 * @} 376 */ 377 378 /** @defgroup UART_Parity UART Parity 379 * @{ 380 */ 381 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 382 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 383 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 384 /** 385 * @} 386 */ 387 388 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 389 * @{ 390 */ 391 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 392 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 393 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 394 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 395 /** 396 * @} 397 */ 398 399 /** @defgroup UART_Mode UART Transfer Mode 400 * @{ 401 */ 402 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 403 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 404 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 405 /** 406 * @} 407 */ 408 409 /** @defgroup UART_State UART State 410 * @{ 411 */ 412 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 413 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 414 /** 415 * @} 416 */ 417 418 /** @defgroup UART_Over_Sampling UART Over Sampling 419 * @{ 420 */ 421 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 422 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 423 /** 424 * @} 425 */ 426 427 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 428 * @{ 429 */ 430 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 431 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 432 /** 433 * @} 434 */ 435 436 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 437 * @{ 438 */ 439 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 440 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 441 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 442 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 443 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 444 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 445 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 446 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 447 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 448 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 449 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 450 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 451 /** 452 * @} 453 */ 454 455 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 456 * @{ 457 */ 458 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 459 on start bit */ 460 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 461 on falling edge */ 462 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 463 on 0x7F frame detection */ 464 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 465 on 0x55 frame detection */ 466 /** 467 * @} 468 */ 469 470 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 471 * @{ 472 */ 473 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 474 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 475 /** 476 * @} 477 */ 478 479 /** @defgroup UART_LIN UART Local Interconnection Network mode 480 * @{ 481 */ 482 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 483 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 484 /** 485 * @} 486 */ 487 488 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 489 * @{ 490 */ 491 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 492 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 493 /** 494 * @} 495 */ 496 497 #if defined(HAL_DMA_MODULE_ENABLED) 498 /** @defgroup UART_DMA_Tx UART DMA Tx 499 * @{ 500 */ 501 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 502 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 503 /** 504 * @} 505 */ 506 507 /** @defgroup UART_DMA_Rx UART DMA Rx 508 * @{ 509 */ 510 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 511 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 512 /** 513 * @} 514 */ 515 #endif /* HAL_DMA_MODULE_ENABLED */ 516 517 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 518 * @{ 519 */ 520 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 521 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 522 /** 523 * @} 524 */ 525 526 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 527 * @{ 528 */ 529 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 530 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 531 /** 532 * @} 533 */ 534 535 /** @defgroup UART_Request_Parameters UART Request Parameters 536 * @{ 537 */ 538 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 539 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 540 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 541 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 542 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 543 /** 544 * @} 545 */ 546 547 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 548 * @{ 549 */ 550 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 551 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 552 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 553 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 554 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 555 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 556 #if defined(HAL_DMA_MODULE_ENABLED) 557 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 558 #endif /* HAL_DMA_MODULE_ENABLED */ 559 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 560 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 561 /** 562 * @} 563 */ 564 565 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 566 * @{ 567 */ 568 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 569 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 570 /** 571 * @} 572 */ 573 574 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 575 * @{ 576 */ 577 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 578 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 579 /** 580 * @} 581 */ 582 583 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 584 * @{ 585 */ 586 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 587 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 588 /** 589 * @} 590 */ 591 592 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 593 * @{ 594 */ 595 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 596 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 597 /** 598 * @} 599 */ 600 601 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 602 * @{ 603 */ 604 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 605 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 606 /** 607 * @} 608 */ 609 610 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 611 * @{ 612 */ 613 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 614 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 615 /** 616 * @} 617 */ 618 619 #if defined(HAL_DMA_MODULE_ENABLED) 620 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 621 * @{ 622 */ 623 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 624 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 625 /** 626 * @} 627 */ 628 #endif /* HAL_DMA_MODULE_ENABLED */ 629 630 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 631 * @{ 632 */ 633 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 634 first disable */ 635 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 636 first enable */ 637 /** 638 * @} 639 */ 640 641 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 642 * @{ 643 */ 644 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 645 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 646 /** 647 * @} 648 */ 649 650 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 651 * @{ 652 */ 653 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 654 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 655 /** 656 * @} 657 */ 658 659 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 660 * @{ 661 */ 662 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 663 /** 664 * @} 665 */ 666 667 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 668 * @{ 669 */ 670 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 671 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 672 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 673 not empty or RXFIFO is not empty */ 674 /** 675 * @} 676 */ 677 678 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 679 * @{ 680 */ 681 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 682 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 683 /** 684 * @} 685 */ 686 687 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 688 * @{ 689 */ 690 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 691 position in CR1 register */ 692 /** 693 * @} 694 */ 695 696 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 697 * @{ 698 */ 699 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 700 position in CR1 register */ 701 /** 702 * @} 703 */ 704 705 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 706 * @{ 707 */ 708 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 709 /** 710 * @} 711 */ 712 713 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 714 * @{ 715 */ 716 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 717 /** 718 * @} 719 */ 720 721 /** @defgroup UART_Flags UART Status Flags 722 * Elements values convention: 0xXXXX 723 * - 0xXXXX : Flag mask in the ISR register 724 * @{ 725 */ 726 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 727 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 728 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 729 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 730 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 731 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 732 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 733 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 734 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 735 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 736 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 737 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 738 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 739 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 740 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 741 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 742 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 743 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 744 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 745 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 746 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 747 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 748 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 749 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 750 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 751 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 752 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 753 /** 754 * @} 755 */ 756 757 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 758 * Elements values convention: 000ZZZZZ0XXYYYYYb 759 * - YYYYY : Interrupt source position in the XX register (5bits) 760 * - XX : Interrupt source register (2bits) 761 * - 01: CR1 register 762 * - 10: CR2 register 763 * - 11: CR3 register 764 * - ZZZZZ : Flag position in the ISR register(5bits) 765 * Elements values convention: 000000000XXYYYYYb 766 * - YYYYY : Interrupt source position in the XX register (5bits) 767 * - XX : Interrupt source register (2bits) 768 * - 01: CR1 register 769 * - 10: CR2 register 770 * - 11: CR3 register 771 * Elements values convention: 0000ZZZZ00000000b 772 * - ZZZZ : Flag position in the ISR register(4bits) 773 * @{ 774 */ 775 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 776 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 777 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 778 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 779 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 780 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 781 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 782 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 783 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 784 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 785 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 786 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 787 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 788 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 789 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 790 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 791 792 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 793 794 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 795 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 796 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 797 /** 798 * @} 799 */ 800 801 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 802 * @{ 803 */ 804 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 805 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 806 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 807 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 808 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 809 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 810 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 811 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 812 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 813 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 814 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 815 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 816 /** 817 * @} 818 */ 819 820 /** @defgroup UART_Reception_Type_Values UART Reception type values 821 * @{ 822 */ 823 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 824 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 825 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 826 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 827 /** 828 * @} 829 */ 830 831 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 832 * @{ 833 */ 834 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 835 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 836 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 837 /** 838 * @} 839 */ 840 841 /** 842 * @} 843 */ 844 845 /* Exported macros -----------------------------------------------------------*/ 846 /** @defgroup UART_Exported_Macros UART Exported Macros 847 * @{ 848 */ 849 850 /** @brief Reset UART handle states. 851 * @param __HANDLE__ UART handle. 852 * @retval None 853 */ 854 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 855 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 856 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 857 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 858 (__HANDLE__)->MspInitCallback = NULL; \ 859 (__HANDLE__)->MspDeInitCallback = NULL; \ 860 } while(0U) 861 #else 862 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 863 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 864 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 865 } while(0U) 866 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 867 868 /** @brief Flush the UART Data registers. 869 * @param __HANDLE__ specifies the UART Handle. 870 * @retval None 871 */ 872 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 873 do{ \ 874 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 875 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 876 } while(0U) 877 878 /** @brief Clear the specified UART pending flag. 879 * @param __HANDLE__ specifies the UART Handle. 880 * @param __FLAG__ specifies the flag to check. 881 * This parameter can be any combination of the following values: 882 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 883 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 884 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 885 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 886 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 887 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 888 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 889 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 890 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 891 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 892 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 893 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 894 * @retval None 895 */ 896 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 897 898 /** @brief Clear the UART PE pending flag. 899 * @param __HANDLE__ specifies the UART Handle. 900 * @retval None 901 */ 902 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 903 904 /** @brief Clear the UART FE pending flag. 905 * @param __HANDLE__ specifies the UART Handle. 906 * @retval None 907 */ 908 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 909 910 /** @brief Clear the UART NE pending flag. 911 * @param __HANDLE__ specifies the UART Handle. 912 * @retval None 913 */ 914 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 915 916 /** @brief Clear the UART ORE pending flag. 917 * @param __HANDLE__ specifies the UART Handle. 918 * @retval None 919 */ 920 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 921 922 /** @brief Clear the UART IDLE pending flag. 923 * @param __HANDLE__ specifies the UART Handle. 924 * @retval None 925 */ 926 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 927 928 /** @brief Clear the UART TX FIFO empty clear flag. 929 * @param __HANDLE__ specifies the UART Handle. 930 * @retval None 931 */ 932 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 933 934 /** @brief Check whether the specified UART flag is set or not. 935 * @param __HANDLE__ specifies the UART Handle. 936 * @param __FLAG__ specifies the flag to check. 937 * This parameter can be one of the following values: 938 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 939 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 940 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 941 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 942 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 943 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 944 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 945 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 946 * @arg @ref UART_FLAG_SBKF Send Break flag 947 * @arg @ref UART_FLAG_CMF Character match flag 948 * @arg @ref UART_FLAG_BUSY Busy flag 949 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 950 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 951 * @arg @ref UART_FLAG_CTS CTS Change flag 952 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 953 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 954 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 955 * @arg @ref UART_FLAG_TC Transmission Complete flag 956 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 957 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 958 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 959 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 960 * @arg @ref UART_FLAG_ORE Overrun Error flag 961 * @arg @ref UART_FLAG_NE Noise Error flag 962 * @arg @ref UART_FLAG_FE Framing Error flag 963 * @arg @ref UART_FLAG_PE Parity Error flag 964 * @retval The new state of __FLAG__ (TRUE or FALSE). 965 */ 966 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 967 968 /** @brief Enable the specified UART interrupt. 969 * @param __HANDLE__ specifies the UART Handle. 970 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 971 * This parameter can be one of the following values: 972 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 973 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 974 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 975 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 976 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 977 * @arg @ref UART_IT_CM Character match interrupt 978 * @arg @ref UART_IT_CTS CTS change interrupt 979 * @arg @ref UART_IT_LBD LIN Break detection interrupt 980 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 981 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 982 * @arg @ref UART_IT_TC Transmission complete interrupt 983 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 984 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 985 * @arg @ref UART_IT_RTO Receive Timeout interrupt 986 * @arg @ref UART_IT_IDLE Idle line detection interrupt 987 * @arg @ref UART_IT_PE Parity Error interrupt 988 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 989 * @retval None 990 */ 991 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 992 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 993 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 994 ((__INTERRUPT__) & UART_IT_MASK))): \ 995 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 996 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 997 ((__INTERRUPT__) & UART_IT_MASK))): \ 998 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 999 ((__INTERRUPT__) & UART_IT_MASK)))) 1000 1001 /** @brief Disable the specified UART interrupt. 1002 * @param __HANDLE__ specifies the UART Handle. 1003 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1004 * This parameter can be one of the following values: 1005 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1006 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1007 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1008 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1009 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1010 * @arg @ref UART_IT_CM Character match interrupt 1011 * @arg @ref UART_IT_CTS CTS change interrupt 1012 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1013 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1014 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1015 * @arg @ref UART_IT_TC Transmission complete interrupt 1016 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1017 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1018 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1019 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1020 * @arg @ref UART_IT_PE Parity Error interrupt 1021 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1022 * @retval None 1023 */ 1024 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1025 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1026 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1027 ((__INTERRUPT__) & UART_IT_MASK))): \ 1028 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1029 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1030 ((__INTERRUPT__) & UART_IT_MASK))): \ 1031 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1032 ((__INTERRUPT__) & UART_IT_MASK)))) 1033 1034 /** @brief Check whether the specified UART interrupt has occurred or not. 1035 * @param __HANDLE__ specifies the UART Handle. 1036 * @param __INTERRUPT__ specifies the UART interrupt to check. 1037 * This parameter can be one of the following values: 1038 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1039 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1040 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1041 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1042 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1043 * @arg @ref UART_IT_CM Character match interrupt 1044 * @arg @ref UART_IT_CTS CTS change interrupt 1045 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1046 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1047 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1048 * @arg @ref UART_IT_TC Transmission complete interrupt 1049 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1050 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1051 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1052 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1053 * @arg @ref UART_IT_PE Parity Error interrupt 1054 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1055 * @retval The new state of __INTERRUPT__ (SET or RESET). 1056 */ 1057 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1058 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1059 1060 /** @brief Check whether the specified UART interrupt source is enabled or not. 1061 * @param __HANDLE__ specifies the UART Handle. 1062 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1063 * This parameter can be one of the following values: 1064 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1065 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1066 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1067 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1068 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1069 * @arg @ref UART_IT_CM Character match interrupt 1070 * @arg @ref UART_IT_CTS CTS change interrupt 1071 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1072 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1073 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1074 * @arg @ref UART_IT_TC Transmission complete interrupt 1075 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1076 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1077 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1078 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1079 * @arg @ref UART_IT_PE Parity Error interrupt 1080 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1081 * @retval The new state of __INTERRUPT__ (SET or RESET). 1082 */ 1083 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1084 (__HANDLE__)->Instance->CR1 : \ 1085 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1086 (__HANDLE__)->Instance->CR2 : \ 1087 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1088 (((uint16_t)(__INTERRUPT__)) &\ 1089 UART_IT_MASK))) != RESET) ? SET : RESET) 1090 1091 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1092 * @param __HANDLE__ specifies the UART Handle. 1093 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1094 * to clear the corresponding interrupt 1095 * This parameter can be one of the following values: 1096 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1097 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1098 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1099 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1100 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1101 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1102 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1103 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1104 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1105 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1106 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1107 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1108 * @retval None 1109 */ 1110 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1111 1112 /** @brief Set a specific UART request flag. 1113 * @param __HANDLE__ specifies the UART Handle. 1114 * @param __REQ__ specifies the request flag to set 1115 * This parameter can be one of the following values: 1116 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1117 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1118 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1119 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1120 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1121 * @retval None 1122 */ 1123 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1124 1125 /** @brief Enable the UART one bit sample method. 1126 * @param __HANDLE__ specifies the UART Handle. 1127 * @retval None 1128 */ 1129 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1130 1131 /** @brief Disable the UART one bit sample method. 1132 * @param __HANDLE__ specifies the UART Handle. 1133 * @retval None 1134 */ 1135 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1136 1137 /** @brief Enable UART. 1138 * @param __HANDLE__ specifies the UART Handle. 1139 * @retval None 1140 */ 1141 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1142 1143 /** @brief Disable UART. 1144 * @param __HANDLE__ specifies the UART Handle. 1145 * @retval None 1146 */ 1147 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1148 1149 /** @brief Enable CTS flow control. 1150 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1151 * without need to call HAL_UART_Init() function. 1152 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1153 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1154 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1155 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1156 * - macro could only be called when corresponding UART instance is disabled 1157 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1158 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1159 * @param __HANDLE__ specifies the UART Handle. 1160 * @retval None 1161 */ 1162 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1163 do{ \ 1164 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1165 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1166 } while(0U) 1167 1168 /** @brief Disable CTS flow control. 1169 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1170 * without need to call HAL_UART_Init() function. 1171 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1172 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1173 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1174 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1175 * - macro could only be called when corresponding UART instance is disabled 1176 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1177 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1178 * @param __HANDLE__ specifies the UART Handle. 1179 * @retval None 1180 */ 1181 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1182 do{ \ 1183 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1184 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1185 } while(0U) 1186 1187 /** @brief Enable RTS flow control. 1188 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1189 * without need to call HAL_UART_Init() function. 1190 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1191 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1192 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1193 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1194 * - macro could only be called when corresponding UART instance is disabled 1195 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1196 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1197 * @param __HANDLE__ specifies the UART Handle. 1198 * @retval None 1199 */ 1200 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1201 do{ \ 1202 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1203 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1204 } while(0U) 1205 1206 /** @brief Disable RTS flow control. 1207 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1208 * without need to call HAL_UART_Init() function. 1209 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1210 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1211 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1212 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1213 * - macro could only be called when corresponding UART instance is disabled 1214 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1215 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1216 * @param __HANDLE__ specifies the UART Handle. 1217 * @retval None 1218 */ 1219 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1220 do{ \ 1221 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1222 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1223 } while(0U) 1224 /** 1225 * @} 1226 */ 1227 1228 /* Private macros --------------------------------------------------------*/ 1229 /** @defgroup UART_Private_Macros UART Private Macros 1230 * @{ 1231 */ 1232 /** @brief Get UART clock division factor from clock prescaler value. 1233 * @param __CLOCKPRESCALER__ UART prescaler value. 1234 * @retval UART clock division factor 1235 */ 1236 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1237 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1238 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1239 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1240 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1241 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1242 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1243 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1244 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1245 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1246 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1247 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : 256U) 1248 1249 /** @brief BRR division operation to set BRR register with LPUART. 1250 * @param __PCLK__ LPUART clock. 1251 * @param __BAUD__ Baud rate set by the user. 1252 * @param __CLOCKPRESCALER__ UART prescaler value. 1253 * @retval Division result 1254 */ 1255 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1256 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1257 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1258 ) 1259 1260 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1261 * @param __PCLK__ UART clock. 1262 * @param __BAUD__ Baud rate set by the user. 1263 * @param __CLOCKPRESCALER__ UART prescaler value. 1264 * @retval Division result 1265 */ 1266 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1267 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1268 1269 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1270 * @param __PCLK__ UART clock. 1271 * @param __BAUD__ Baud rate set by the user. 1272 * @param __CLOCKPRESCALER__ UART prescaler value. 1273 * @retval Division result 1274 */ 1275 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1276 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1277 1278 /** @brief Check whether or not UART instance is Low Power UART. 1279 * @param __HANDLE__ specifies the UART Handle. 1280 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1281 */ 1282 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1283 1284 /** @brief Check UART Baud rate. 1285 * @param __BAUDRATE__ Baudrate specified by the user. 1286 * The maximum Baud Rate is derived from the maximum clock on U0 (i.e. 48 MHz) 1287 * divided by the smallest oversampling used on the USART (i.e. 8) 1288 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1289 */ 1290 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000000U) 1291 1292 /** @brief Check UART assertion time. 1293 * @param __TIME__ 5-bit value assertion time. 1294 * @retval Test result (TRUE or FALSE). 1295 */ 1296 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1297 1298 /** @brief Check UART deassertion time. 1299 * @param __TIME__ 5-bit value deassertion time. 1300 * @retval Test result (TRUE or FALSE). 1301 */ 1302 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1303 1304 /** 1305 * @brief Ensure that UART frame number of stop bits is valid. 1306 * @param __STOPBITS__ UART frame number of stop bits. 1307 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1308 */ 1309 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1310 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1311 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1312 ((__STOPBITS__) == UART_STOPBITS_2)) 1313 1314 /** 1315 * @brief Ensure that LPUART frame number of stop bits is valid. 1316 * @param __STOPBITS__ LPUART frame number of stop bits. 1317 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1318 */ 1319 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1320 ((__STOPBITS__) == UART_STOPBITS_2)) 1321 1322 /** 1323 * @brief Ensure that UART frame parity is valid. 1324 * @param __PARITY__ UART frame parity. 1325 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1326 */ 1327 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1328 ((__PARITY__) == UART_PARITY_EVEN) || \ 1329 ((__PARITY__) == UART_PARITY_ODD)) 1330 1331 /** 1332 * @brief Ensure that UART hardware flow control is valid. 1333 * @param __CONTROL__ UART hardware flow control. 1334 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1335 */ 1336 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1337 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1338 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1339 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1340 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1341 1342 /** 1343 * @brief Ensure that UART communication mode is valid. 1344 * @param __MODE__ UART communication mode. 1345 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1346 */ 1347 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1348 1349 /** 1350 * @brief Ensure that UART state is valid. 1351 * @param __STATE__ UART state. 1352 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1353 */ 1354 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1355 ((__STATE__) == UART_STATE_ENABLE)) 1356 1357 /** 1358 * @brief Ensure that UART oversampling is valid. 1359 * @param __SAMPLING__ UART oversampling. 1360 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1361 */ 1362 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1363 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1364 1365 /** 1366 * @brief Ensure that UART frame sampling is valid. 1367 * @param __ONEBIT__ UART frame sampling. 1368 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1369 */ 1370 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1371 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1372 1373 /** 1374 * @brief Ensure that UART auto Baud rate detection mode is valid. 1375 * @param __MODE__ UART auto Baud rate detection mode. 1376 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1377 */ 1378 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1379 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1380 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1381 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1382 1383 /** 1384 * @brief Ensure that UART receiver timeout setting is valid. 1385 * @param __TIMEOUT__ UART receiver timeout setting. 1386 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1387 */ 1388 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1389 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1390 1391 /** @brief Check the receiver timeout value. 1392 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1393 * @param __TIMEOUTVALUE__ receiver timeout value. 1394 * @retval Test result (TRUE or FALSE) 1395 */ 1396 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1397 1398 /** 1399 * @brief Ensure that UART LIN state is valid. 1400 * @param __LIN__ UART LIN state. 1401 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1402 */ 1403 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1404 ((__LIN__) == UART_LIN_ENABLE)) 1405 1406 /** 1407 * @brief Ensure that UART LIN break detection length is valid. 1408 * @param __LENGTH__ UART LIN break detection length. 1409 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1410 */ 1411 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1412 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1413 1414 #if defined(HAL_DMA_MODULE_ENABLED) 1415 /** 1416 * @brief Ensure that UART DMA TX state is valid. 1417 * @param __DMATX__ UART DMA TX state. 1418 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1419 */ 1420 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1421 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1422 1423 /** 1424 * @brief Ensure that UART DMA RX state is valid. 1425 * @param __DMARX__ UART DMA RX state. 1426 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1427 */ 1428 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1429 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1430 1431 #endif /* HAL_DMA_MODULE_ENABLED */ 1432 /** 1433 * @brief Ensure that UART half-duplex state is valid. 1434 * @param __HDSEL__ UART half-duplex state. 1435 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1436 */ 1437 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1438 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1439 1440 /** 1441 * @brief Ensure that UART wake-up method is valid. 1442 * @param __WAKEUP__ UART wake-up method . 1443 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1444 */ 1445 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1446 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1447 1448 /** 1449 * @brief Ensure that UART request parameter is valid. 1450 * @param __PARAM__ UART request parameter. 1451 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1452 */ 1453 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1454 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1455 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1456 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1457 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1458 1459 /** 1460 * @brief Ensure that UART advanced features initialization is valid. 1461 * @param __INIT__ UART advanced features initialization. 1462 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1463 */ 1464 #if defined(HAL_DMA_MODULE_ENABLED) 1465 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1466 UART_ADVFEATURE_TXINVERT_INIT | \ 1467 UART_ADVFEATURE_RXINVERT_INIT | \ 1468 UART_ADVFEATURE_DATAINVERT_INIT | \ 1469 UART_ADVFEATURE_SWAP_INIT | \ 1470 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1471 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1472 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1473 UART_ADVFEATURE_MSBFIRST_INIT)) 1474 #else 1475 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1476 UART_ADVFEATURE_TXINVERT_INIT | \ 1477 UART_ADVFEATURE_RXINVERT_INIT | \ 1478 UART_ADVFEATURE_DATAINVERT_INIT | \ 1479 UART_ADVFEATURE_SWAP_INIT | \ 1480 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1481 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1482 UART_ADVFEATURE_MSBFIRST_INIT)) 1483 #endif /* HAL_DMA_MODULE_ENABLED */ 1484 1485 /** 1486 * @brief Ensure that UART frame TX inversion setting is valid. 1487 * @param __TXINV__ UART frame TX inversion setting. 1488 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1489 */ 1490 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1491 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1492 1493 /** 1494 * @brief Ensure that UART frame RX inversion setting is valid. 1495 * @param __RXINV__ UART frame RX inversion setting. 1496 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1497 */ 1498 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1499 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1500 1501 /** 1502 * @brief Ensure that UART frame data inversion setting is valid. 1503 * @param __DATAINV__ UART frame data inversion setting. 1504 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1505 */ 1506 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1507 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1508 1509 /** 1510 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1511 * @param __SWAP__ UART frame RX/TX pins swap setting. 1512 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1513 */ 1514 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1515 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1516 1517 /** 1518 * @brief Ensure that UART frame overrun setting is valid. 1519 * @param __OVERRUN__ UART frame overrun setting. 1520 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1521 */ 1522 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1523 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1524 1525 /** 1526 * @brief Ensure that UART auto Baud rate state is valid. 1527 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1528 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1529 */ 1530 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1531 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1532 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1533 1534 #if defined(HAL_DMA_MODULE_ENABLED) 1535 /** 1536 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1537 * @param __DMA__ UART DMA enabling or disabling on error setting. 1538 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1539 */ 1540 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1541 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1542 #endif /* HAL_DMA_MODULE_ENABLED */ 1543 1544 /** 1545 * @brief Ensure that UART frame MSB first setting is valid. 1546 * @param __MSBFIRST__ UART frame MSB first setting. 1547 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1548 */ 1549 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1550 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1551 1552 /** 1553 * @brief Ensure that UART stop mode state is valid. 1554 * @param __STOPMODE__ UART stop mode state. 1555 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1556 */ 1557 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1558 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1559 1560 /** 1561 * @brief Ensure that UART mute mode state is valid. 1562 * @param __MUTE__ UART mute mode state. 1563 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1564 */ 1565 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1566 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1567 1568 /** 1569 * @brief Ensure that UART wake-up selection is valid. 1570 * @param __WAKE__ UART wake-up selection. 1571 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1572 */ 1573 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1574 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1575 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1576 1577 /** 1578 * @brief Ensure that UART driver enable polarity is valid. 1579 * @param __POLARITY__ UART driver enable polarity. 1580 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1581 */ 1582 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1583 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1584 1585 /** 1586 * @brief Ensure that UART Prescaler is valid. 1587 * @param __CLOCKPRESCALER__ UART Prescaler value. 1588 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1589 */ 1590 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1591 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1592 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1593 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1594 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1595 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1596 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1597 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1598 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1599 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1600 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1601 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1602 1603 /** 1604 * @} 1605 */ 1606 1607 /* Include UART HAL Extended module */ 1608 #include "stm32u0xx_hal_uart_ex.h" 1609 1610 /* Exported functions --------------------------------------------------------*/ 1611 /** @addtogroup UART_Exported_Functions UART Exported Functions 1612 * @{ 1613 */ 1614 1615 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1616 * @{ 1617 */ 1618 1619 /* Initialization and de-initialization functions ****************************/ 1620 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1621 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1622 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1623 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1624 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1625 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1626 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1627 1628 /* Callbacks Register/UnRegister functions ***********************************/ 1629 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1630 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1631 pUART_CallbackTypeDef pCallback); 1632 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1633 1634 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1635 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1636 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1637 1638 /** 1639 * @} 1640 */ 1641 1642 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1643 * @{ 1644 */ 1645 1646 /* IO operation functions *****************************************************/ 1647 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1648 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1649 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1650 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1651 #if defined(HAL_DMA_MODULE_ENABLED) 1652 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1653 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1654 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1655 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1656 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1657 #endif /* HAL_DMA_MODULE_ENABLED */ 1658 /* Transfer Abort functions */ 1659 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1660 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1661 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1662 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1663 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1664 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1665 1666 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1667 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1668 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1669 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1670 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1671 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1672 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1673 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1674 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1675 1676 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1677 1678 /** 1679 * @} 1680 */ 1681 1682 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1683 * @{ 1684 */ 1685 1686 /* Peripheral Control functions ************************************************/ 1687 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1688 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1689 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1690 1691 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1692 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1693 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1694 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1695 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1696 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1697 1698 /** 1699 * @} 1700 */ 1701 1702 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1703 * @{ 1704 */ 1705 1706 /* Peripheral State and Errors functions **************************************************/ 1707 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1708 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1709 1710 /** 1711 * @} 1712 */ 1713 1714 /** 1715 * @} 1716 */ 1717 1718 /* Private functions -----------------------------------------------------------*/ 1719 /** @addtogroup UART_Private_Functions UART Private Functions 1720 * @{ 1721 */ 1722 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1723 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1724 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1725 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1726 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1727 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1728 uint32_t Tickstart, uint32_t Timeout); 1729 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1730 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1731 #if defined(HAL_DMA_MODULE_ENABLED) 1732 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1733 #endif /* HAL_DMA_MODULE_ENABLED */ 1734 1735 /** 1736 * @} 1737 */ 1738 1739 /* Private variables -----------------------------------------------------------*/ 1740 /** @defgroup UART_Private_variables UART Private variables 1741 * @{ 1742 */ 1743 /* Prescaler Table used in BRR computation macros. 1744 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1745 extern const uint16_t UARTPrescTable[12]; 1746 /** 1747 * @} 1748 */ 1749 1750 /** 1751 * @} 1752 */ 1753 1754 /** 1755 * @} 1756 */ 1757 1758 #ifdef __cplusplus 1759 } 1760 #endif 1761 1762 #endif /* STM32U0xx_HAL_UART_H */ 1763 1764
