1 /**
2 ******************************************************************************
3 * @file stm32n6xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2023 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 @verbatim
18 ==============================================================================
19 ##### How to use this driver #####
20 ==============================================================================
21 [..]
22 The LL UTILS driver contains a set of generic APIs that can be
23 used by user:
24 (+) Device electronic signature
25 (+) Timing functions
26 (+) PLL configuration functions
27
28 @endverbatim
29 */
30
31 /* Define to prevent recursive inclusion -------------------------------------*/
32 #ifndef STM32N6xx_LL_UTILS_H
33 #define STM32N6xx_LL_UTILS_H
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 /* Includes ------------------------------------------------------------------*/
40 #include "stm32n6xx.h"
41 #include "stm32n6xx_ll_system.h"
42 #include "stm32n6xx_ll_bus.h"
43 #include "stm32n6xx_ll_rcc.h"
44
45 /** @addtogroup STM32N6xx_LL_Driver
46 * @{
47 */
48
49 /** @defgroup UTILS_LL UTILS
50 * @{
51 */
52
53 /* Private types -------------------------------------------------------------*/
54 /* Private variables ---------------------------------------------------------*/
55
56 /* Private constants ---------------------------------------------------------*/
57 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
58 * @{
59 */
60
61 /* Max delay can be used in LL_mDelay */
62 #define LL_MAX_DELAY 0xFFFFFFFFUL
63
64 /**
65 * @brief Unique device ID register base address
66 * Available from BSEC_OTP_DATA5...BSEC_OTP_DATA7
67 */
68 #define UID_BASE_ADDRESS (BSEC_BASE + 0x14U)
69
70 /**
71 * @brief Device RPN register base address
72 * Available from BSEC_OTP_DATA9
73 */
74 #define RPN_BASE_ADDRESS (BSEC_BASE + 0x24U)
75
76 /**
77 * @brief Package data register base address
78 * Available from BSEC_OTP_DATA122
79 */
80 #define PACKAGE_BASE_ADDRESS (BSEC_BASE + 0x1E8U)
81
82 /**
83 * @}
84 */
85
86 /* Private macros ------------------------------------------------------------*/
87 /* Exported types ------------------------------------------------------------*/
88 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
89 * @{
90 */
91
92 /**
93 * @brief UTILS PLL structure definition
94 */
95 typedef struct
96 {
97 uint32_t PLLM; /*!< Division factor M for PLL VCO input clock.
98 This parameter must be a number between Min_Data = 1 and Max_Data = 63
99 and shall ensure that VCO input is below 50 MHz.
100
101 This feature can be modified afterwards using unitary function
102 @ref LL_RCC_PLL1_SetM(). */
103
104 uint32_t PLLN; /*!< Multiplication factor N for PLL VCO output clock.
105 This parameter must be a number between Min_Data = 16 and Max_Data = 640
106 in integer mode and between Min_Data = 20 and Max_Data = 320 in fractional mode
107
108 This feature can be modified afterwards using unitary function
109 @ref LL_RCC_PLL1_SetN(). */
110
111 uint32_t PLLP1; /*!< Division factor level 1 for PLL VCO output clock.
112 This parameter must be a number between Min_Data = 1 and Max_Data = 7
113
114 This feature can be modified afterwards using unitary function
115 @ref LL_RCC_PLL1_SetP1(). */
116
117 uint32_t PLLP2; /*!< Division factor level 2 for PLL VCO output clock.
118 This parameter must be a number between Min_Data = 1 and Max_Data = 7
119
120 This feature can be modified afterwards using unitary function
121 @ref LL_RCC_PLL1_SetP2(). */
122
123 uint32_t FRACN; /*!< Fractional part of the multiplication factor for PLL VCO.
124 This parameter can be a value between 0 and (2^24)-1
125
126 This feature can be modified afterwards using unitary function
127 @ref LL_RCC_PLL1_SetFRACN(). */
128
129 } LL_UTILS_PLLInitTypeDef;
130
131 /**
132 * @brief UTILS IC structure definition
133 */
134 typedef struct
135 {
136 uint32_t IC1Source; /*!< The IC1 clock source for sysa_ck(cpu_ck) */
137 uint32_t IC1Divider; /*!< The IC1 clock divider for sysa_ck(cpu_ck) */
138 uint32_t IC2Source; /*!< The IC2 clock source for sysb_ck */
139 uint32_t IC2Divider; /*!< The IC2 clock divider for sysb_ck */
140 uint32_t IC6Source; /*!< The IC6 clock source for sysc_ck */
141 uint32_t IC6Divider; /*!< The IC6 clock divider for sysc_ck */
142 uint32_t IC11Source; /*!< The IC11 clock source for sysd_ck */
143 uint32_t IC11Divider; /*!< The IC11 clock divider for sysd_ck */
144
145 } LL_UTILS_ICInitTypeDef;
146
147 /**
148 * @brief UTILS System, AHB and APB buses clock configuration structure definition
149 */
150 typedef struct
151 {
152 uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
153 This parameter can be a value of @ref RCC_LL_EC_AHB_DIV
154
155 This feature can be modified afterwards using unitary function
156 @ref LL_RCC_SetAHBPrescaler(). */
157
158 uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
159 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
160
161 This feature can be modified afterwards using unitary function
162 @ref LL_RCC_SetAPB1Prescaler(). */
163
164 uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
165 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
166
167 This feature can be modified afterwards using unitary function
168 @ref LL_RCC_SetAPB2Prescaler(). */
169
170 uint32_t APB4CLKDivider; /*!< The APB4 clock (PCLK4) divider. This clock is derived from the AHB clock (HCLK).
171 This parameter can be a value of @ref RCC_LL_EC_APB4_DIV
172
173 This feature can be modified afterwards using unitary function
174 @ref LL_RCC_SetAPB4Prescaler(). */
175
176 uint32_t APB5CLKDivider; /*!< The APB5 clock (PCLK5) divider. This clock is derived from the AHB clock (HCLK).
177 This parameter can be a value of @ref RCC_LL_EC_APB5_DIV
178
179 This feature can be modified afterwards using unitary function
180 @ref LL_RCC_SetAPB5Prescaler(). */
181
182 } LL_UTILS_ClkInitTypeDef;
183
184 /**
185 * @}
186 */
187
188 /* Exported constants --------------------------------------------------------*/
189 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
190 * @{
191 */
192
193 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
194 * @{
195 */
196 #define LL_UTILS_HSEBYPASS_OFF 0U /*!< HSE Bypass is not enabled */
197 #define LL_UTILS_HSEBYPASS_ON 1U /*!< HSE Bypass is enabled */
198 /**
199 * @}
200 */
201
202 /** @defgroup UTILS_EC_DEVICE_RPN DEVICE RPN
203 * @{
204 */
205 #define LL_UTILS_DEVICE_STM32N657 0x2000U /*!< STM32N657 */
206 #define LL_UTILS_DEVICE_STM32N647 0x2200U /*!< STM32N647 */
207 #define LL_UTILS_DEVICE_STM32N655 0x6000U /*!< STM32N655 */
208 #define LL_UTILS_DEVICE_STM32N645 0x6200U /*!< STM32N645 */
209 /**
210 * @}
211 */
212
213 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
214 * @{
215 */
216 #define LL_UTILS_PACKAGETYPE_BGA142 2U /*!< BGA142 package type */
217 #define LL_UTILS_PACKAGETYPE_BGA169 4U /*!< BGA169 package type */
218 #define LL_UTILS_PACKAGETYPE_BGA178 6U /*!< BGA178 package type */
219 #define LL_UTILS_PACKAGETYPE_BGA198 8U /*!< BGA198 package type */
220 #define LL_UTILS_PACKAGETYPE_BGA223 10U /*!< BGA223 package type */
221 #define LL_UTILS_PACKAGETYPE_BGA264 12U /*!< BGA264 package type */
222 /**
223 * @}
224 */
225
226 /**
227 * @}
228 */
229
230 /* Exported macro ------------------------------------------------------------*/
231
232 /* Exported functions --------------------------------------------------------*/
233 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
234 * @{
235 */
236
237 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
238 * @{
239 */
240
241 /**
242 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
243 * @note The application must ensures that SYSCFG clock is enabled.
244 * @retval UID[31:0]
245 */
LL_GetUID_Word0(void)246 __STATIC_INLINE uint32_t LL_GetUID_Word0(void)
247 {
248 return (uint32_t)(READ_REG(*((__IO uint32_t *)UID_BASE_ADDRESS)));
249 }
250
251 /**
252 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
253 * @note The application must ensures that SYSCFG clock is enabled.
254 * @retval UID[63:32]
255 */
LL_GetUID_Word1(void)256 __STATIC_INLINE uint32_t LL_GetUID_Word1(void)
257 {
258 return (uint32_t)(READ_REG(*((__IO uint32_t *)(UID_BASE_ADDRESS + 4U))));
259 }
260
261 /**
262 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
263 * @note The application must ensures that SYSCFG clock is enabled.
264 * @retval UID[95:64]
265 */
LL_GetUID_Word2(void)266 __STATIC_INLINE uint32_t LL_GetUID_Word2(void)
267 {
268 return (uint32_t)(READ_REG(*((__IO uint32_t *)(UID_BASE_ADDRESS + 8U))));
269 }
270
271 /**
272 * @brief Get Package type
273 * @note The application must ensures that SYSCFG clock is enabled.
274 * @retval Returned value can be one of the following values:
275 * @arg @ref LL_UTILS_PACKAGETYPE_BGA142
276 * @arg @ref LL_UTILS_PACKAGETYPE_BGA169
277 * @arg @ref LL_UTILS_PACKAGETYPE_BGA178
278 * @arg @ref LL_UTILS_PACKAGETYPE_BGA198
279 * @arg @ref LL_UTILS_PACKAGETYPE_BGA223
280 * @arg @ref LL_UTILS_PACKAGETYPE_BGA264
281 */
LL_GetPackageType(void)282 __STATIC_INLINE uint32_t LL_GetPackageType(void)
283 {
284 return (uint32_t)(READ_REG(*((__IO uint32_t *)PACKAGE_BASE_ADDRESS)) & 0x0FUL);
285 }
286
287 /**
288 * @brief Get Device Part Number (RPN)
289 * @note The application must ensures that SYSCFG clock is enabled.
290 * @retval Returned value can be one of the following values:
291 * @arg @ref LL_UTILS_DEVICE_STM32N657
292 * @arg @ref LL_UTILS_DEVICE_STM32N647
293 * @arg @ref LL_UTILS_DEVICE_STM32N645
294 */
LL_GetDevicePartNumber(void)295 __STATIC_INLINE uint32_t LL_GetDevicePartNumber(void)
296 {
297 return (uint32_t)(READ_REG(*((__IO uint32_t *)RPN_BASE_ADDRESS)));
298 }
299
300 /**
301 * @}
302 */
303
304 /** @defgroup UTILS_LL_EF_DELAY DELAY
305 * @{
306 */
307
308 /**
309 * @brief This function configures the Cortex-M SysTick source of the time base.
310 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
311 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
312 * configuration by calling this function, for a delay use rather osDelay RTOS service.
313 * @param Ticks Number of ticks
314 * @retval None
315 */
LL_InitTick(uint32_t HCLKFrequency,uint32_t Ticks)316 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
317 {
318 if (Ticks > 0U)
319 {
320 /* Configure the SysTick to have interrupt in 1ms time base */
321 SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
322 SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
323 SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
324 SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
325 }
326 }
327
328 void LL_Init1msTick(uint32_t CPU_Frequency);
329 void LL_mDelay(uint32_t Delay);
330
331 /**
332 * @}
333 */
334
335 /** @defgroup UTILS_EF_SYSTEM SYSTEM
336 * @{
337 */
338
339 void LL_SetSystemCoreClock(uint32_t CPU_Frequency);
340 ErrorStatus LL_PLL_ConfigSystemClock_HSI(const LL_UTILS_PLLInitTypeDef *pUTILS_PLLInitStruct,
341 const LL_UTILS_ICInitTypeDef *pUTILS_ICInitStruct,
342 const LL_UTILS_ClkInitTypeDef *pUTILS_ClkInitStruct);
343 ErrorStatus LL_PLL_ConfigSystemClock_MSI(const LL_UTILS_PLLInitTypeDef *pUTILS_PLLInitStruct,
344 const LL_UTILS_ICInitTypeDef *pUTILS_ICInitStruct,
345 const LL_UTILS_ClkInitTypeDef *pUTILS_ClkInitStruct);
346 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency,
347 uint32_t HSEBypass,
348 const LL_UTILS_PLLInitTypeDef *pUTILS_PLLInitStruct,
349 const LL_UTILS_ICInitTypeDef *pUTILS_ICInitStruct,
350 const LL_UTILS_ClkInitTypeDef *pUTILS_ClkInitStruct);
351
352 /**
353 * @}
354 */
355
356 /**
357 * @}
358 */
359
360 /**
361 * @}
362 */
363
364 /**
365 * @}
366 */
367
368 #ifdef __cplusplus
369 }
370 #endif
371
372 #endif /* STM32N6xx_LL_UTILS_H */
373
