1 /** 2 ****************************************************************************** 3 * @file stm32n6xx_hal_bsec.h 4 * @author MCD Application Team 5 * @brief Header file of BSEC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2023 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32N6xx_HAL_BSEC_H 21 #define STM32N6xx_HAL_BSEC_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32n6xx_hal_def.h" 29 30 /** @addtogroup STM32N6xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup BSEC 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup BSEC_Exported_Types BSEC Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief HAL BSEC Handle Structure definition 45 */ 46 typedef struct 47 { 48 BSEC_TypeDef *Instance; /*!< BSEC registers base address */ 49 uint32_t ErrorCode; /*!< Error code in case of HAL driver internal error */ 50 } BSEC_HandleTypeDef; 51 52 /** 53 * @brief HAL BSEC Scratch and Write Once Scratch Register Structure definition 54 */ 55 typedef struct 56 { 57 uint32_t RegType; /*!< Type of the register 58 This parameter can be a value of @ref BSEC_Register_Type */ 59 uint32_t RegNumber; /*!< Number of the register 60 This parameter can be a value between 0 and 3 if RegType is HAL_BSEC_SCRATCH_REG 61 and between 0 and 7 if RegType is HAL_BSEC_WRITE_ONCE_SCRATCH_REG */ 62 } BSEC_ScratchRegTypeDef; 63 64 /** 65 * @brief HAL BSEC Debug configuration Structure definition 66 */ 67 typedef struct 68 { 69 uint32_t HDPL_Open_Dbg; /*!< Level at which debug may be opened 70 This parameter can be a value of @ref BSEC_Open_Dbg */ 71 uint32_t Sec_Dbg_Auth; /*!< Secure debug authorization 72 This parameter can be a value of @ref BSEC_Sec_Dbg_Auth */ 73 uint32_t NonSec_Dbg_Auth; /*!< Non-secure debug authorization 74 This parameter can be a value of @ref BSEC_NonSec_Dbg_Auth */ 75 } BSEC_DebugCfgTypeDef; 76 77 /** 78 * @} 79 */ 80 81 /* Exported constants --------------------------------------------------------*/ 82 /** @defgroup BSEC_Exported_Constants BSEC Exported Constants 83 * @{ 84 */ 85 86 /** @defgroup BSEC_Error_Code BSEC Error code 87 * @{ 88 */ 89 #define HAL_BSEC_ERROR_NONE (0U) /*!< No error */ 90 #define HAL_BSEC_ERROR_INVALID_PARAM (1U) /*!< Parameter error */ 91 #define HAL_BSEC_ERROR_UNDEFINED_VALUE (2U) /*!< Undefined value error */ 92 #define HAL_BSEC_ERROR_LOCK (4U) /*!< Locked operation error */ 93 #define HAL_BSEC_ERROR_UNALLOWED (8U) /*!< Not possible operation error */ 94 #define HAL_BSEC_ERROR_TIMEOUT (10U) /*!< Timeout error */ 95 96 #define HAL_BSEC_ERROR_PROGFAIL BSEC_OTPSR_PROGFAIL /*!< Programming failed */ 97 #define HAL_BSEC_ERROR_DISTURB BSEC_OTPSR_DISTURBF /*!< Disturb flag (unexpected error) */ 98 #define HAL_BSEC_ERROR_DED BSEC_OTPSR_DEDF /*!< Double error detection flag */ 99 #define HAL_BSEC_ERROR_SEC BSEC_OTPSR_SECF /*!< Single error detection flag */ 100 #define HAL_BSEC_ERROR_PPL BSEC_OTPSR_PPLF /*!< Permanent programming lock flag */ 101 #define HAL_BSEC_ERROR_PPLM BSEC_OTPSR_PPLMF /*!< Permanent programming lock mismatch flag */ 102 #define HAL_BSEC_ERROR_AME BSEC_OTPSR_AMEF /*!< Addresses mismatch error flag */ 103 /** 104 * @} 105 */ 106 107 /** @defgroup BSEC_Global_Lock BSEC Global write lock 108 * @{ 109 */ 110 #define HAL_BSEC_WRITE_REG_ALLOWED (0U) /*!< Write to BSEC registers are allowed */ 111 #define HAL_BSEC_WRITE_REG_IGNORED BSEC_LOCKR_GWLOCK /*!< Write to BSEC registers are ignored */ 112 /** 113 * @} 114 */ 115 116 /** @defgroup BSEC_Status BSEC Peripheral status 117 * @{ 118 */ 119 #define HAL_BSEC_INIT_DONE BSEC_OTPSR_INIT_DONE /*!< BSEC initialized following a cold or warm reset */ 120 #define HAL_BSEC_UPPER_FUSES_HIDDEN BSEC_OTPSR_HIDEUP /*!< Upper fuses are not accessible to the application */ 121 #define HAL_BSEC_OTP_NOT_VIRGIN BSEC_OTPSR_OTPNVIR /*!< BSEC is not virgin */ 122 /** 123 * @} 124 */ 125 126 /** @defgroup BSEC_Permanent_Lock BSEC Permanent lock 127 * @{ 128 */ 129 #define HAL_BSEC_NORMAL_PROG (0U) /*!< Fuse word is programmed normally */ 130 #define HAL_BSEC_LOCK_PROG BSEC_OTPCR_PPLOCK /*!< Fuse word is locked, preventing further modifications */ 131 /** 132 * @} 133 */ 134 135 /** @defgroup BSEC_Reload_Validity BSEC Validity of shadow register reload 136 * @{ 137 */ 138 #define HAL_BSEC_RELOAD_ERROR (0U) /*!< An error occurred while fuse word was last reloaded */ 139 #define HAL_BSEC_RELOAD_DONE (1U) /*!< Last reload of fuse word was done without error */ 140 /** 141 * @} 142 */ 143 144 /** @defgroup BSEC_State BSEC State 145 * @{ 146 */ 147 #define HAL_BSEC_FUSE_PROG_LOCKED (0x00000001U) /*!< Fuse word programming is silently ignored until next reset */ 148 #define HAL_BSEC_FUSE_WRITE_LOCKED (0x00000002U) /*!< Shadow register writing is silently ignored until next reset */ 149 #define HAL_BSEC_FUSE_RELOAD_LOCKED (0x00000004U) /*!< Fuse word loading is denied until next reset */ 150 #define HAL_BSEC_FUSE_LOCKED (0x00000008U) /*!< Fuse word is locked, preventing further modifications */ 151 #define HAL_BSEC_FUSE_SHADOWED (0x00000100U) /*!< Fuse word is shadowed */ 152 #define HAL_BSEC_FUSE_HIDDEN (0x00000200U) /*!< Fuse word is hidden */ 153 #define HAL_BSEC_FUSE_ERROR_DETECTED BSEC_OTPSR_OTPERR /*!< At least one error is detected during reset operations */ 154 #define HAL_BSEC_FUSE_ERROR_CORRECTED BSEC_OTPSR_OTPSEC /*!< At least one single-error correction is detected during reset operations */ 155 /** 156 * @} 157 */ 158 159 /** @defgroup BSEC_Lifecycle_State BSEC Device lifecycle state 160 * @{ 161 */ 162 #define HAL_BSEC_OPEN_STATE (0x16U << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in open state */ 163 #define HAL_BSEC_CLOSED_STATE (0x0DU << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in closed state */ 164 #define HAL_BSEC_INVALID_STATE (0x07U << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in invalid state */ 165 #define HAL_BSEC_INVALID_STATE_WITH_TAMPER (0x23U << BSEC_SR_NVSTATE_Pos) /*!< BSEC is in invalid state with an active confirmed tamper triggered */ 166 /** 167 * @} 168 */ 169 170 /** @defgroup BSEC_Epoch_Select BSEC Epoch selected register 171 * @{ 172 */ 173 #define HAL_BSEC_EPOCH_COUNTER_0 (0U) /*!< Epoch counter 0 */ 174 #define HAL_BSEC_EPOCH_COUNTER_1 (1U) /*!< Epoch counter 1 */ 175 /** 176 * @} 177 */ 178 179 /** @defgroup BSEC_HDPL BSEC Hide protection level 180 * @{ 181 */ 182 #define HAL_BSEC_HDPL_VALUE_0 (0xB4U) /*!< Level 0 */ 183 #define HAL_BSEC_HDPL_VALUE_1 (0x51U) /*!< Level 1 */ 184 #define HAL_BSEC_HDPL_VALUE_2 (0x8AU) /*!< Level 2 */ 185 #define HAL_BSEC_HDPL_VALUE_3 (0x6FU) /*!< Level 3 */ 186 /** 187 * @} 188 */ 189 190 /** @defgroup BSEC_INCR_HDPL BSEC Increment of Hide protection level sent to SAES 191 * @{ 192 */ 193 #define HAL_BSEC_HDPL_INCR_VALUE_0 (0U) /*!< HDPL sent to SAES incremented by 0 */ 194 #define HAL_BSEC_HDPL_INCR_VALUE_1 (1U) /*!< HDPL sent to SAES incremented by 1 */ 195 #define HAL_BSEC_HDPL_INCR_VALUE_2 (2U) /*!< HDPL sent to SAES incremented by 2 */ 196 #define HAL_BSEC_HDPL_INCR_VALUE_3 (3U) /*!< HDPL sent to SAES incremented by 3 */ 197 /** 198 * @} 199 */ 200 201 /** @defgroup BSEC_Register_Type BSEC Type of scratch register 202 * @{ 203 */ 204 #define HAL_BSEC_SCRATCH_REG (0U) /*!< Type of register is scratch register */ 205 #define HAL_BSEC_WRITE_ONCE_SCRATCH_REG (1U) /*!< Type of register is write once scratch register */ 206 /** 207 * @} 208 */ 209 210 /** @defgroup BSEC_Debug_Req BSEC Debug request 211 * @{ 212 */ 213 #define HAL_BSEC_DBG_NOT_REQUESTED (0U) /*!< Host debugger is not requesting debug */ 214 #define HAL_BSEC_DBG_REQUESTED BSEC_SR_DBGREQ /*!< Host debugger is requesting debug */ 215 /** 216 * @} 217 */ 218 219 /** @defgroup BSEC_Open_Dbg BSEC Open debug level 220 * @{ 221 */ 222 #define HAL_BSEC_OPEN_DBG_LEVEL_0 (0x00B40000U) /*!< Debug opened for HDPL0 */ 223 #define HAL_BSEC_OPEN_DBG_LEVEL_1 (0x00510000U) /*!< Debug opened for HDPL1 */ 224 #define HAL_BSEC_OPEN_DBG_LEVEL_2 (0x008A0000U) /*!< Debug opened for HDPL2 */ 225 #define HAL_BSEC_OPEN_DBG_LEVEL_3 (0x006F0000U) /*!< Debug opened for HDPL3 */ 226 /** 227 * @} 228 */ 229 230 /** @defgroup BSEC_Sec_Dbg_Auth BSEC Secure debug authorization 231 * @{ 232 */ 233 #define HAL_BSEC_SEC_DBG_UNAUTH (0x00000000U) /*!< Secure debug not authorized */ 234 #define HAL_BSEC_SEC_DBG_AUTH (0xB4000000U) /*!< Secure debug authorized */ 235 /** 236 * @} 237 */ 238 239 /** @defgroup BSEC_NonSec_Dbg_Auth BSEC Non-secure debug authorization 240 * @{ 241 */ 242 #define HAL_BSEC_NONSEC_DBG_UNAUTH (0x00000000U) /*!< Non-secure debug not authorized */ 243 #define HAL_BSEC_NONSEC_DBG_AUTH (0x0000B400U) /*!< Non-secure debug authorized */ 244 /** 245 * @} 246 */ 247 248 /** @defgroup BSEC_Debug_Lock BSEC Debug lock 249 * @{ 250 */ 251 #define HAL_BSEC_DEBUG_LOCKED (0x00000000U) /*!< DBG_MCU AP interface locked */ 252 #define HAL_BSEC_DEBUG_UNLOCKED (0x000000B4U) /*!< DBG_MCU AP interface unlocked */ 253 /** 254 * @} 255 */ 256 257 /** @defgroup BSEC_DHUK_Validity BSEC Derived hardware unique key validity 258 * @{ 259 */ 260 #define HAL_BSEC_DHUK_INVALID (0U) /*!< DHUK can't be used in SAES */ 261 #define HAL_BSEC_DHUK_VALID BSEC_SR_HVALID /*!< DHUK can be used in SAES */ 262 /** 263 * @} 264 */ 265 266 /** @defgroup BSEC_DHUK_Lock BSEC Derived hardware unique key lock 267 * @{ 268 */ 269 #define HAL_BSEC_DHUK_USABLE (0U) /*!< DHUK in SAES is usable */ 270 #define HAL_BSEC_DHUK_NOT_USABLE BSEC_LOCKR_HKLOCK /*!< DHUK in SAES is not usable */ 271 /** 272 * @} 273 */ 274 275 /** @defgroup BSEC_Reset_Type BSEC Type of reset 276 * @{ 277 */ 278 #define HAL_BSEC_HOT_RESET (0U) /*!< Type of reset is hot reset */ 279 #define HAL_BSEC_WARM_RESET (1U) /*!< Type of reset is warm reset */ 280 /** 281 * @} 282 */ 283 284 /** 285 * @} 286 */ 287 288 /* Exported macros -----------------------------------------------------------*/ 289 290 /** @defgroup BSEC_Exported_Macros BSEC Exported Macros 291 * @{ 292 */ 293 294 295 /** 296 * @} 297 */ 298 299 /* Exported functions --------------------------------------------------------*/ 300 /** @addtogroup BSEC_Exported_Functions 301 * @{ 302 */ 303 304 /** @addtogroup BSEC_Exported_Functions_Group1 305 * @{ 306 */ 307 HAL_StatusTypeDef HAL_BSEC_GetStatus(BSEC_HandleTypeDef * hbsec, uint32_t *pStatus); 308 HAL_StatusTypeDef HAL_BSEC_GlobalLock(BSEC_HandleTypeDef *hbsec); 309 HAL_StatusTypeDef HAL_BSEC_GetGlobalLockStatus(BSEC_HandleTypeDef * hbsec, uint32_t *pStatus); 310 HAL_StatusTypeDef HAL_BSEC_GetErrorCode(BSEC_HandleTypeDef * hbsec, uint32_t *pError); 311 /** 312 * @} 313 */ 314 315 /** @addtogroup BSEC_Exported_Functions_Group2 316 * @{ 317 */ 318 HAL_StatusTypeDef HAL_BSEC_OTP_Read(BSEC_HandleTypeDef * hbsec, uint32_t FuseId, uint32_t *pFuseData); 319 HAL_StatusTypeDef HAL_BSEC_OTP_Program(BSEC_HandleTypeDef *hbsec, uint32_t FuseId, uint32_t FuseData, uint32_t Lock); 320 HAL_StatusTypeDef HAL_BSEC_OTP_Reload(BSEC_HandleTypeDef *hbsec, uint32_t FuseId); 321 HAL_StatusTypeDef HAL_BSEC_OTP_Lock(BSEC_HandleTypeDef *hbsec, uint32_t FuseId, uint32_t Lock); 322 HAL_StatusTypeDef HAL_BSEC_OTP_GetState(BSEC_HandleTypeDef * hbsec, uint32_t FuseId, uint32_t *pState); 323 /** 324 * @} 325 */ 326 327 /** @addtogroup BSEC_Exported_Functions_Group3 328 * @{ 329 */ 330 HAL_StatusTypeDef HAL_BSEC_OTP_ReadShadow(BSEC_HandleTypeDef * hbsec, uint32_t RegId, uint32_t *pRegData); 331 HAL_StatusTypeDef HAL_BSEC_OTP_WriteShadow(BSEC_HandleTypeDef *hbsec, uint32_t RegId, uint32_t RegData); 332 HAL_StatusTypeDef HAL_BSEC_OTP_GetShadowState(BSEC_HandleTypeDef * hbsec, uint32_t RegId, uint32_t *pValidity); 333 /** 334 * @} 335 */ 336 337 /** @addtogroup BSEC_Exported_Functions_Group4 338 * @{ 339 */ 340 HAL_StatusTypeDef HAL_BSEC_GetDeviceLifeCycleState(BSEC_HandleTypeDef * hbsec, uint32_t *pState); 341 HAL_StatusTypeDef HAL_BSEC_ReadEpochCounter(BSEC_HandleTypeDef * hbsec, uint32_t CounterId, uint32_t *pCounterData); 342 HAL_StatusTypeDef HAL_BSEC_SelectEpochCounter(BSEC_HandleTypeDef *hbsec, uint32_t SelectedCounter); 343 HAL_StatusTypeDef HAL_BSEC_GetEpochCounterSelection(BSEC_HandleTypeDef * hbsec, uint32_t *pSelectedCounter); 344 /** 345 * @} 346 */ 347 348 /** @addtogroup BSEC_Exported_Functions_Group5 349 * @{ 350 */ 351 HAL_StatusTypeDef HAL_BSEC_GetHDPLValue(BSEC_HandleTypeDef * hbsec, uint32_t *pHDPL); 352 HAL_StatusTypeDef HAL_BSEC_IncrementHDPLValue(BSEC_HandleTypeDef *hbsec); 353 HAL_StatusTypeDef HAL_BSEC_ConfigSAESHDPLIncrementValue(BSEC_HandleTypeDef *hbsec, uint32_t Increment); 354 HAL_StatusTypeDef HAL_BSEC_GetSAESHDPLIncrementValue(BSEC_HandleTypeDef * hbsec, uint32_t *pIncrement); 355 /** 356 * @} 357 */ 358 359 /** @addtogroup BSEC_Exported_Functions_Group6 360 * @{ 361 */ 362 HAL_StatusTypeDef HAL_BSEC_WriteScratchValue(BSEC_HandleTypeDef *hbsec, const BSEC_ScratchRegTypeDef *pRegAddr, uint32_t Value); 363 HAL_StatusTypeDef HAL_BSEC_ReadScratchValue(BSEC_HandleTypeDef * hbsec, const BSEC_ScratchRegTypeDef *pRegAddr, uint32_t *pValue); 364 /** 365 * @} 366 */ 367 368 /** @addtogroup BSEC_Exported_Functions_Group7 369 * @{ 370 */ 371 HAL_StatusTypeDef HAL_BSEC_GetDebugRequest(BSEC_HandleTypeDef * hbsec, uint32_t *pDbgReq); 372 HAL_StatusTypeDef HAL_BSEC_SendJTAGData(BSEC_HandleTypeDef *hbsec, uint32_t Data); 373 HAL_StatusTypeDef HAL_BSEC_ReceiveJTAGData(BSEC_HandleTypeDef * hbsec, uint32_t *pData); 374 HAL_StatusTypeDef HAL_BSEC_ConfigDebug(BSEC_HandleTypeDef *hbsec,const BSEC_DebugCfgTypeDef *pCfg); 375 HAL_StatusTypeDef HAL_BSEC_GetDebugConfig(BSEC_HandleTypeDef * hbsec, BSEC_DebugCfgTypeDef *pDbgCfg); 376 HAL_StatusTypeDef HAL_BSEC_LockDebug(BSEC_HandleTypeDef *hbsec); 377 HAL_StatusTypeDef HAL_BSEC_UnlockDebug(BSEC_HandleTypeDef *hbsec); 378 HAL_StatusTypeDef HAL_BSEC_GetDebugLockState(BSEC_HandleTypeDef * hbsec, uint32_t *pStatus); 379 /** 380 * @} 381 */ 382 383 /** @addtogroup BSEC_Exported_Functions_Group8 384 * @{ 385 */ 386 HAL_StatusTypeDef HAL_BSEC_GetDHUKValidity(BSEC_HandleTypeDef * hbsec, uint32_t *pValidity); 387 HAL_StatusTypeDef HAL_BSEC_LockDHUKUse(BSEC_HandleTypeDef *hbsec); 388 HAL_StatusTypeDef HAL_BSEC_GetDHUKLockStatus(BSEC_HandleTypeDef * hbsec, uint32_t *pStatus); 389 /** 390 * @} 391 */ 392 393 /** @addtogroup BSEC_Exported_Functions_Group9 394 * @{ 395 */ 396 HAL_StatusTypeDef HAL_BSEC_GetNumberOfResets(BSEC_HandleTypeDef * hbsec, uint32_t ResetType, uint32_t *pResetNumber); 397 /** 398 * @} 399 */ 400 401 /** 402 * @} 403 */ 404 405 /* Private macros --------------------------------------------------------*/ 406 /** 407 @cond 0 408 */ 409 #define IS_BSEC_PERMANENT_LOCK(VALUE) (((VALUE) == HAL_BSEC_NORMAL_PROG) || ((VALUE) == HAL_BSEC_LOCK_PROG)) 410 411 #define IS_BSEC_LOCK_CFG(CFG) ((CFG) <= (HAL_BSEC_FUSE_PROG_LOCKED | HAL_BSEC_FUSE_WRITE_LOCKED | HAL_BSEC_FUSE_RELOAD_LOCKED)) 412 413 #define IS_BSEC_STATE(STATE) (((STATE) == HAL_BSEC_OPEN_STATE) || ((STATE) == HAL_BSEC_CLOSED_STATE) \ 414 || ((STATE) == HAL_BSEC_INVALID_STATE) || ((STATE) == HAL_BSEC_INVALID_STATE_WITH_TAMPER)) 415 416 #define IS_BSEC_EPOCHSEL(VALUE) (((VALUE) == HAL_BSEC_EPOCH_COUNTER_0) || ((VALUE) == HAL_BSEC_EPOCH_COUNTER_1)) 417 418 #define IS_BSEC_HDPL(LEVEL) (((LEVEL) == HAL_BSEC_HDPL_VALUE_0) || ((LEVEL) == HAL_BSEC_HDPL_VALUE_1) \ 419 || ((LEVEL) == HAL_BSEC_HDPL_VALUE_2) || ((LEVEL) == HAL_BSEC_HDPL_VALUE_3)) 420 421 #define IS_BSEC_NEXTHDPL(VALUE) (((VALUE) == HAL_BSEC_HDPL_INCR_VALUE_0) || ((VALUE) == HAL_BSEC_HDPL_INCR_VALUE_1) \ 422 || ((VALUE) == HAL_BSEC_HDPL_INCR_VALUE_2) || ((VALUE) == HAL_BSEC_HDPL_INCR_VALUE_3)) 423 424 #define IS_BSEC_REGTYPE(TYPE) (((TYPE) == HAL_BSEC_SCRATCH_REG) || ((TYPE) == HAL_BSEC_WRITE_ONCE_SCRATCH_REG)) 425 426 #define IS_BSEC_OPENDBG(LEVEL) (((LEVEL) == HAL_BSEC_OPEN_DBG_LEVEL_0) || ((LEVEL) == HAL_BSEC_OPEN_DBG_LEVEL_1) \ 427 || ((LEVEL) == HAL_BSEC_OPEN_DBG_LEVEL_2) || ((LEVEL) == HAL_BSEC_OPEN_DBG_LEVEL_3)) 428 429 #define IS_BSEC_SECDBGAUTH(AUTH) (((AUTH) == HAL_BSEC_SEC_DBG_UNAUTH) || ((AUTH) == HAL_BSEC_SEC_DBG_AUTH)) 430 431 #define IS_BSEC_NSDBGAUTH(AUTH) (((AUTH) == HAL_BSEC_NONSEC_DBG_UNAUTH) || ((AUTH) == HAL_BSEC_NONSEC_DBG_AUTH)) 432 433 #define IS_BSEC_DEBUGLOCK(VALUE) (((VALUE) == HAL_BSEC_DEBUG_LOCKED) || ((VALUE) == HAL_BSEC_DEBUG_UNLOCKED)) 434 435 #define IS_BSEC_RESETTYPE(TYPE) (((TYPE) == HAL_BSEC_HOT_RESET) || ((TYPE) == HAL_BSEC_WARM_RESET)) 436 /** 437 @endcond 438 */ 439 440 /** 441 * @} 442 */ 443 444 /** 445 * @} 446 */ 447 448 #ifdef __cplusplus 449 } 450 #endif 451 452 #endif /* STM32N6xx_HAL_BSEC_H */ 453
