1 /**
2   ******************************************************************************
3   * @file    stm32mp1xx_hal_dfsdm.c
4   * @author  MCD Application Team
5   * @brief   This file provides firmware functions to manage the following
6   *          functionalities of the Digital Filter for Sigma-Delta Modulators
7   *          (DFSDM) peripherals:
8   *           + Initialization and configuration of channels and filters
9   *           + Regular channels configuration
10   *           + Injected channels configuration
11   *           + Regular/Injected Channels DMA Configuration
12   *           + Interrupts and flags management
13   *           + Analog watchdog feature
14   *           + Short-circuit detector feature
15   *           + Extremes detector feature
16   *           + Clock absence detector feature
17   *           + Break generation on analog watchdog or short-circuit event
18   *
19   ******************************************************************************
20   * @attention
21   *
22   * Copyright (c) 2019 STMicroelectronics.
23   * All rights reserved.
24   *
25   * This software is licensed under terms that can be found in the LICENSE file
26   * in the root directory of this software component.
27   * If no LICENSE file comes with this software, it is provided AS-IS.
28   *
29   ******************************************************************************
30   @verbatim
31   ==============================================================================
32                      ##### How to use this driver #####
33   ==============================================================================
34   [..]
35     *** Channel initialization ***
36     ==============================
37     [..]
38       (#) User has first to initialize channels (before filters initialization).
39       (#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
40         (++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
41         (++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
42         (++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
43         (++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
44             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
45       (#) Configure the output clock, input, serial interface, analog watchdog,
46           offset and data right bit shift parameters for this channel using the
47           HAL_DFSDM_ChannelInit() function.
48 
49     *** Channel clock absence detector ***
50     ======================================
51     [..]
52       (#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
53           HAL_DFSDM_ChannelCkabStart_IT().
54       (#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
55           absence.
56       (#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
57           clock absence is detected.
58       (#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
59           HAL_DFSDM_ChannelCkabStop_IT().
60       (#) Please note that the same mode (polling or interrupt) has to be used
61           for all channels because the channels are sharing the same interrupt.
62       (#) Please note also that in interrupt mode, if clock absence detector is
63           stopped for one channel, interrupt will be disabled for all channels.
64 
65     *** Channel short circuit detector ***
66     ======================================
67     [..]
68       (#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
69           or HAL_DFSDM_ChannelScdStart_IT().
70       (#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
71           circuit.
72       (#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
73           short circuit is detected.
74       (#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
75           or HAL_DFSDM_ChannelScdStop_IT().
76       (#) Please note that the same mode (polling or interrupt) has to be used
77           for all channels because the channels are sharing the same interrupt.
78       (#) Please note also that in interrupt mode, if short circuit detector is
79           stopped for one channel, interrupt will be disabled for all channels.
80 
81     *** Channel analog watchdog value ***
82     =====================================
83     [..]
84       (#) Get analog watchdog filter value of a channel using
85           HAL_DFSDM_ChannelGetAwdValue().
86 
87     *** Channel offset value ***
88     =====================================
89     [..]
90       (#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
91 
92     *** Filter initialization ***
93     =============================
94     [..]
95       (#) After channel initialization, user has to init filters.
96       (#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
97         (++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
98             interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
99             Please note that DFSDMz_FLT0 global interrupt could be already
100             enabled if interrupt is used for channel.
101         (++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
102             with DFSDMz filter handle using __HAL_LINKDMA().
103       (#) Configure the regular conversion, injected conversion and filter
104           parameters for this filter using the HAL_DFSDM_FilterInit() function.
105 
106     *** Filter regular channel conversion ***
107     =========================================
108     [..]
109       (#) Select regular channel and enable/disable continuous mode using
110           HAL_DFSDM_FilterConfigRegChannel().
111       (#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
112           HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
113           HAL_DFSDM_FilterRegularMsbStart_DMA().
114       (#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
115           the end of regular conversion.
116       (#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
117           at the end of regular conversion.
118       (#) Get value of regular conversion and corresponding channel using
119           HAL_DFSDM_FilterGetRegularValue().
120       (#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
121           HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
122           half transfer and at the transfer complete. Please note that
123           HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
124           circular mode.
125       (#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
126           HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
127 
128     *** Filter injected channels conversion ***
129     ===========================================
130     [..]
131       (#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
132       (#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
133           HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
134           HAL_DFSDM_FilterInjectedMsbStart_DMA().
135       (#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
136           the end of injected conversion.
137       (#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
138           at the end of injected conversion.
139       (#) Get value of injected conversion and corresponding channel using
140           HAL_DFSDM_FilterGetInjectedValue().
141       (#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
142           HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
143           half transfer and at the transfer complete. Please note that
144           HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
145           circular mode.
146       (#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
147           HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
148 
149     *** Filter analog watchdog ***
150     ==============================
151     [..]
152       (#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
153       (#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
154       (#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
155 
156     *** Filter extreme detector ***
157     ===============================
158     [..]
159       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
160       (#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
161       (#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
162       (#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
163 
164     *** Filter conversion time ***
165     ==============================
166     [..]
167       (#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
168 
169     *** Callback registration ***
170     =============================
171     [..]
172     The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS when set to 1
173     allows the user to configure dynamically the driver callbacks.
174     Use functions HAL_DFSDM_Channel_RegisterCallback(),
175     HAL_DFSDM_Filter_RegisterCallback() or
176     HAL_DFSDM_Filter_RegisterAwdCallback() to register a user callback.
177 
178     [..]
179     Function HAL_DFSDM_Channel_RegisterCallback() allows to register
180     following callbacks:
181       (+) CkabCallback      : DFSDM channel clock absence detection callback.
182       (+) ScdCallback       : DFSDM channel short circuit detection callback.
183       (+) MspInitCallback   : DFSDM channel MSP init callback.
184       (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
185     [..]
186     This function takes as parameters the HAL peripheral handle, the Callback ID
187     and a pointer to the user callback function.
188 
189     [..]
190     Function HAL_DFSDM_Filter_RegisterCallback() allows to register
191     following callbacks:
192       (+) RegConvCpltCallback     : DFSDM filter regular conversion complete callback.
193       (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
194       (+) InjConvCpltCallback     : DFSDM filter injected conversion complete callback.
195       (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
196       (+) ErrorCallback           : DFSDM filter error callback.
197       (+) MspInitCallback         : DFSDM filter MSP init callback.
198       (+) MspDeInitCallback       : DFSDM filter MSP de-init callback.
199     [..]
200     This function takes as parameters the HAL peripheral handle, the Callback ID
201     and a pointer to the user callback function.
202 
203     [..]
204     For specific DFSDM filter analog watchdog callback use dedicated register callback:
205     HAL_DFSDM_Filter_RegisterAwdCallback().
206 
207     [..]
208     Use functions HAL_DFSDM_Channel_UnRegisterCallback() or
209     HAL_DFSDM_Filter_UnRegisterCallback() to reset a callback to the default
210     weak function.
211 
212     [..]
213     HAL_DFSDM_Channel_UnRegisterCallback() takes as parameters the HAL peripheral handle,
214     and the Callback ID.
215     [..]
216     This function allows to reset following callbacks:
217       (+) CkabCallback      : DFSDM channel clock absence detection callback.
218       (+) ScdCallback       : DFSDM channel short circuit detection callback.
219       (+) MspInitCallback   : DFSDM channel MSP init callback.
220       (+) MspDeInitCallback : DFSDM channel MSP de-init callback.
221 
222     [..]
223     HAL_DFSDM_Filter_UnRegisterCallback() takes as parameters the HAL peripheral handle,
224     and the Callback ID.
225     [..]
226     This function allows to reset following callbacks:
227       (+) RegConvCpltCallback     : DFSDM filter regular conversion complete callback.
228       (+) RegConvHalfCpltCallback : DFSDM filter half regular conversion complete callback.
229       (+) InjConvCpltCallback     : DFSDM filter injected conversion complete callback.
230       (+) InjConvHalfCpltCallback : DFSDM filter half injected conversion complete callback.
231       (+) ErrorCallback           : DFSDM filter error callback.
232       (+) MspInitCallback         : DFSDM filter MSP init callback.
233       (+) MspDeInitCallback       : DFSDM filter MSP de-init callback.
234 
235     [..]
236     For specific DFSDM filter analog watchdog callback use dedicated unregister callback:
237     HAL_DFSDM_Filter_UnRegisterAwdCallback().
238 
239     [..]
240     By default, after the call of init function and if the state is RESET
241     all callbacks are reset to the corresponding legacy weak functions:
242     examples HAL_DFSDM_ChannelScdCallback(), HAL_DFSDM_FilterErrorCallback().
243     Exception done for MspInit and MspDeInit callbacks that are respectively
244     reset to the legacy weak functions in the init and de-init only when these
245     callbacks are null (not registered beforehand).
246     If not, MspInit or MspDeInit are not null, the init and de-init keep and use
247     the user MspInit/MspDeInit callbacks (registered beforehand)
248 
249     [..]
250     Callbacks can be registered/unregistered in READY state only.
251     Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
252     in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
253     during the init/de-init.
254     In that case first register the MspInit/MspDeInit user callbacks using
255     HAL_DFSDM_Channel_RegisterCallback() or
256     HAL_DFSDM_Filter_RegisterCallback() before calling init or de-init function.
257 
258     [..]
259     When The compilation define USE_HAL_DFSDM_REGISTER_CALLBACKS is set to 0 or
260     not defined, the callback registering feature is not available
261     and weak callbacks are used.
262 
263     @endverbatim
264   */
265 
266 /* Includes ------------------------------------------------------------------*/
267 #include "stm32mp1xx_hal.h"
268 
269 /** @addtogroup STM32MP1xx_HAL_Driver
270   * @{
271   */
272 #ifdef HAL_DFSDM_MODULE_ENABLED
273 
274 /** @defgroup DFSDM DFSDM
275   * @brief DFSDM HAL driver module
276   * @{
277   */
278 
279 /* Private typedef -----------------------------------------------------------*/
280 /* Private define ------------------------------------------------------------*/
281 /** @defgroup DFSDM_Private_Define DFSDM Private Define
282  * @{
283  */
284 #define DFSDM_FLTCR1_MSB_RCH_OFFSET     8
285 #define DFSDM_MSB_MASK                  0xFFFF0000U
286 #define DFSDM_LSB_MASK                  0x0000FFFFU
287 #define DFSDM_CKAB_TIMEOUT              5000U
288 #define DFSDM1_CHANNEL_NUMBER           8U
289 /**
290   * @}
291   */
292 
293 /* Private macro -------------------------------------------------------------*/
294 /* Private variables ---------------------------------------------------------*/
295 /** @defgroup DFSDM_Private_Variables DFSDM Private Variables
296   * @{
297   */
298 static __IO uint32_t                v_dfsdm1ChannelCounter = 0;
299 static DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
300 /**
301   * @}
302   */
303 
304 /* Private function prototypes -----------------------------------------------*/
305 /** @defgroup DFSDM_Private_Functions DFSDM Private Functions
306   * @{
307   */
308 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
309 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef* Instance);
310 static void     DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
311 static void     DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
312 static void     DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
313 static void     DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
314 static void     DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
315 static void     DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
316 static void     DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
317 static void     DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
318 static void     DFSDM_DMAError(DMA_HandleTypeDef *hdma);
319 /**
320   * @}
321   */
322 
323 /* Exported functions --------------------------------------------------------*/
324 /** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
325   * @{
326   */
327 
328 /** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
329  *  @brief    Channel initialization and de-initialization functions
330  *
331 @verbatim
332   ==============================================================================
333         ##### Channel initialization and de-initialization functions #####
334   ==============================================================================
335     [..]  This section provides functions allowing to:
336       (+) Initialize the DFSDM channel.
337       (+) De-initialize the DFSDM channel.
338 @endverbatim
339   * @{
340   */
341 
342 /**
343   * @brief  Initialize the DFSDM channel according to the specified parameters
344   *         in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
345   * @param  hdfsdm_channel DFSDM channel handle.
346   * @retval HAL status.
347   */
HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)348 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
349 {
350   /* Check DFSDM Channel handle */
351   if(hdfsdm_channel == NULL)
352   {
353     return HAL_ERROR;
354   }
355 
356   /* Check parameters */
357   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
358   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
359   assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
360   assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
361   assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
362   assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
363   assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
364   assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
365   assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
366   assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
367   assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
368 
369   /* Check that channel has not been already initialized */
370   if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
371   {
372     return HAL_ERROR;
373   }
374 
375 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
376   /* Reset callback pointers to the weak predefined callbacks */
377   hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
378   hdfsdm_channel->ScdCallback  = HAL_DFSDM_ChannelScdCallback;
379 
380   /* Call MSP init function */
381   if(hdfsdm_channel->MspInitCallback == NULL)
382   {
383     hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
384   }
385   hdfsdm_channel->MspInitCallback(hdfsdm_channel);
386 #else
387   /* Call MSP init function */
388   HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
389 #endif
390 
391   /* Update the channel counter */
392   v_dfsdm1ChannelCounter++;
393 
394   /* Configure output serial clock and enable global DFSDM interface only for first channel */
395   if(v_dfsdm1ChannelCounter == 1U)
396   {
397     assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
398     /* Set the output serial clock source */
399     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
400     DFSDM1_Channel0->CHCFGR1 |= hdfsdm_channel->Init.OutputClock.Selection;
401 
402     /* Reset clock divider */
403     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
404     if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
405     {
406       assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
407       /* Set the output clock divider */
408       DFSDM1_Channel0->CHCFGR1 |= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
409                                              DFSDM_CHCFGR1_CKOUTDIV_Pos);
410     }
411 
412     /* enable the DFSDM global interface */
413     DFSDM1_Channel0->CHCFGR1 |= DFSDM_CHCFGR1_DFSDMEN;
414   }
415 
416   /* Set channel input parameters */
417   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK | DFSDM_CHCFGR1_DATMPX |
418                                          DFSDM_CHCFGR1_CHINSEL);
419   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.Input.Multiplexer |
420                                         hdfsdm_channel->Init.Input.DataPacking |
421                                         hdfsdm_channel->Init.Input.Pins);
422 
423   /* Set serial interface parameters */
424   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP | DFSDM_CHCFGR1_SPICKSEL);
425   hdfsdm_channel->Instance->CHCFGR1 |= (hdfsdm_channel->Init.SerialInterface.Type |
426                                         hdfsdm_channel->Init.SerialInterface.SpiClock);
427 
428   /* Set analog watchdog parameters */
429   hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD | DFSDM_CHAWSCDR_AWFOSR);
430   hdfsdm_channel->Instance->CHAWSCDR |= (hdfsdm_channel->Init.Awd.FilterOrder |
431                                        ((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_AWFOSR_Pos));
432 
433   /* Set channel offset and right bit shift */
434   hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET | DFSDM_CHCFGR2_DTRBS);
435   hdfsdm_channel->Instance->CHCFGR2 |= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_Pos) |
436                                         (hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_Pos));
437 
438   /* Enable DFSDM channel */
439   hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CHEN;
440 
441   /* Set DFSDM Channel to ready state */
442   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
443 
444   /* Store channel handle in DFSDM channel handle table */
445   a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
446 
447   return HAL_OK;
448 }
449 
450 /**
451   * @brief  De-initialize the DFSDM channel.
452   * @param  hdfsdm_channel DFSDM channel handle.
453   * @retval HAL status.
454   */
HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)455 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
456 {
457   /* Check DFSDM Channel handle */
458   if(hdfsdm_channel == NULL)
459   {
460     return HAL_ERROR;
461   }
462 
463   /* Check parameters */
464   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
465 
466   /* Check that channel has not been already deinitialized */
467   if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
468   {
469     return HAL_ERROR;
470   }
471 
472   /* Disable the DFSDM channel */
473   hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
474 
475   /* Update the channel counter */
476   v_dfsdm1ChannelCounter--;
477 
478   /* Disable global DFSDM at deinit of last channel */
479   if(v_dfsdm1ChannelCounter == 0U)
480   {
481     DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
482   }
483 
484   /* Call MSP deinit function */
485 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
486   if(hdfsdm_channel->MspDeInitCallback == NULL)
487   {
488     hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
489   }
490   hdfsdm_channel->MspDeInitCallback(hdfsdm_channel);
491 #else
492   HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
493 #endif
494 
495   /* Set DFSDM Channel in reset state */
496   hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
497 
498   /* Reset channel handle in DFSDM channel handle table */
499   a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
500 
501   return HAL_OK;
502 }
503 
504 /**
505   * @brief  Initialize the DFSDM channel MSP.
506   * @param  hdfsdm_channel DFSDM channel handle.
507   * @retval None
508   */
HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)509 __weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
510 {
511   /* Prevent unused argument(s) compilation warning */
512   UNUSED(hdfsdm_channel);
513 
514   /* NOTE : This function should not be modified, when the function is needed,
515             the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
516    */
517 }
518 
519 /**
520   * @brief  De-initialize the DFSDM channel MSP.
521   * @param  hdfsdm_channel DFSDM channel handle.
522   * @retval None
523   */
HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)524 __weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
525 {
526   /* Prevent unused argument(s) compilation warning */
527   UNUSED(hdfsdm_channel);
528 
529   /* NOTE : This function should not be modified, when the function is needed,
530             the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
531    */
532 }
533 
534 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
535 /**
536   * @brief  Register a user DFSDM channel callback
537   *         to be used instead of the weak predefined callback.
538   * @param  hdfsdm_channel DFSDM channel handle.
539   * @param  CallbackID ID of the callback to be registered.
540   *         This parameter can be one of the following values:
541   *           @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
542   *           @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
543   *           @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
544   *           @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
545   * @param  pCallback pointer to the callback function.
546   * @retval HAL status.
547   */
HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,pDFSDM_Channel_CallbackTypeDef pCallback)548 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef        *hdfsdm_channel,
549                                                      HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
550                                                      pDFSDM_Channel_CallbackTypeDef      pCallback)
551 {
552   HAL_StatusTypeDef status = HAL_OK;
553 
554   if(pCallback == NULL)
555   {
556     /* update return status */
557     status = HAL_ERROR;
558   }
559   else
560   {
561     if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
562     {
563       switch (CallbackID)
564       {
565       case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
566         hdfsdm_channel->CkabCallback = pCallback;
567         break;
568       case HAL_DFSDM_CHANNEL_SCD_CB_ID :
569         hdfsdm_channel->ScdCallback = pCallback;
570         break;
571       case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
572         hdfsdm_channel->MspInitCallback = pCallback;
573         break;
574       case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
575         hdfsdm_channel->MspDeInitCallback = pCallback;
576         break;
577       default :
578         /* update return status */
579         status = HAL_ERROR;
580         break;
581       }
582     }
583     else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
584     {
585       switch (CallbackID)
586       {
587       case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
588         hdfsdm_channel->MspInitCallback = pCallback;
589         break;
590       case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
591         hdfsdm_channel->MspDeInitCallback = pCallback;
592         break;
593       default :
594         /* update return status */
595         status = HAL_ERROR;
596         break;
597       }
598     }
599     else
600     {
601       /* update return status */
602       status = HAL_ERROR;
603     }
604   }
605   return status;
606 }
607 
608 /**
609   * @brief  Unregister a user DFSDM channel callback.
610   *         DFSDM channel callback is redirected to the weak predefined callback.
611   * @param  hdfsdm_channel DFSDM channel handle.
612   * @param  CallbackID ID of the callback to be unregistered.
613   *         This parameter can be one of the following values:
614   *           @arg @ref HAL_DFSDM_CHANNEL_CKAB_CB_ID clock absence detection callback ID.
615   *           @arg @ref HAL_DFSDM_CHANNEL_SCD_CB_ID short circuit detection callback ID.
616   *           @arg @ref HAL_DFSDM_CHANNEL_MSPINIT_CB_ID MSP init callback ID.
617   *           @arg @ref HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID MSP de-init callback ID.
618   * @retval HAL status.
619   */
HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)620 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef        *hdfsdm_channel,
621                                                        HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID)
622 {
623   HAL_StatusTypeDef status = HAL_OK;
624 
625   if(HAL_DFSDM_CHANNEL_STATE_READY == hdfsdm_channel->State)
626   {
627     switch (CallbackID)
628     {
629     case HAL_DFSDM_CHANNEL_CKAB_CB_ID :
630       hdfsdm_channel->CkabCallback = HAL_DFSDM_ChannelCkabCallback;
631       break;
632     case HAL_DFSDM_CHANNEL_SCD_CB_ID :
633       hdfsdm_channel->ScdCallback = HAL_DFSDM_ChannelScdCallback;
634       break;
635     case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
636       hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
637       break;
638     case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
639       hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
640       break;
641     default :
642       /* update return status */
643       status = HAL_ERROR;
644       break;
645     }
646   }
647   else if(HAL_DFSDM_CHANNEL_STATE_RESET == hdfsdm_channel->State)
648   {
649     switch (CallbackID)
650     {
651     case HAL_DFSDM_CHANNEL_MSPINIT_CB_ID :
652       hdfsdm_channel->MspInitCallback = HAL_DFSDM_ChannelMspInit;
653       break;
654     case HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID :
655       hdfsdm_channel->MspDeInitCallback = HAL_DFSDM_ChannelMspDeInit;
656       break;
657     default :
658       /* update return status */
659       status = HAL_ERROR;
660       break;
661     }
662   }
663   else
664   {
665     /* update return status */
666     status = HAL_ERROR;
667   }
668   return status;
669 }
670 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
671 
672 /**
673   * @}
674   */
675 
676 /** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
677  *  @brief    Channel operation functions
678  *
679 @verbatim
680   ==============================================================================
681                    ##### Channel operation functions #####
682   ==============================================================================
683     [..]  This section provides functions allowing to:
684       (+) Manage clock absence detector feature.
685       (+) Manage short circuit detector feature.
686       (+) Get analog watchdog value.
687       (+) Modify offset value.
688 @endverbatim
689   * @{
690   */
691 
692 /**
693   * @brief  This function allows to start clock absence detection in polling mode.
694   * @note   Same mode has to be used for all channels.
695   * @note   If clock is not available on this channel during 5 seconds,
696   *         clock absence detection will not be activated and function
697   *         will return HAL_TIMEOUT error.
698   * @param  hdfsdm_channel DFSDM channel handle.
699   * @retval HAL status
700   */
HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)701 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
702 {
703   HAL_StatusTypeDef status = HAL_OK;
704   uint32_t channel;
705   uint32_t tickstart;
706 
707   /* Check parameters */
708   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
709 
710   /* Check DFSDM channel state */
711   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
712   {
713     /* Return error status */
714     status = HAL_ERROR;
715   }
716   else
717   {
718     /* Get channel number from channel instance */
719     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
720 
721     /* Get timeout */
722     tickstart = HAL_GetTick();
723 
724     /* Clear clock absence flag */
725     while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
726     {
727       DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
728 
729       /* Check the Timeout */
730       if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
731       {
732         /* Set timeout status */
733         status = HAL_TIMEOUT;
734         break;
735       }
736     }
737 
738     if(status == HAL_OK)
739     {
740       /* Start clock absence detection */
741       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
742     }
743   }
744   /* Return function status */
745   return status;
746 }
747 
748 /**
749   * @brief  This function allows to poll for the clock absence detection.
750   * @param  hdfsdm_channel DFSDM channel handle.
751   * @param  Timeout Timeout value in milliseconds.
752   * @retval HAL status
753   */
HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)754 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
755                                                uint32_t Timeout)
756 {
757   uint32_t tickstart;
758   uint32_t channel;
759 
760   /* Check parameters */
761   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
762 
763   /* Check DFSDM channel state */
764   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
765   {
766     /* Return error status */
767     return HAL_ERROR;
768   }
769   else
770   {
771     /* Get channel number from channel instance */
772     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
773 
774     /* Get timeout */
775     tickstart = HAL_GetTick();
776 
777     /* Wait clock absence detection */
778     while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) == 0U)
779     {
780       /* Check the Timeout */
781       if(Timeout != HAL_MAX_DELAY)
782       {
783         if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
784         {
785           /* Return timeout status */
786           return HAL_TIMEOUT;
787         }
788       }
789     }
790 
791     /* Clear clock absence detection flag */
792     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
793 
794     /* Return function status */
795     return HAL_OK;
796   }
797 }
798 
799 /**
800   * @brief  This function allows to stop clock absence detection in polling mode.
801   * @param  hdfsdm_channel DFSDM channel handle.
802   * @retval HAL status
803   */
HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)804 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
805 {
806   HAL_StatusTypeDef status = HAL_OK;
807   uint32_t channel;
808 
809   /* Check parameters */
810   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
811 
812   /* Check DFSDM channel state */
813   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
814   {
815     /* Return error status */
816     status = HAL_ERROR;
817   }
818   else
819   {
820     /* Stop clock absence detection */
821     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
822 
823     /* Clear clock absence flag */
824     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
825     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
826   }
827   /* Return function status */
828   return status;
829 }
830 
831 /**
832   * @brief  This function allows to start clock absence detection in interrupt mode.
833   * @note   Same mode has to be used for all channels.
834   * @note   If clock is not available on this channel during 5 seconds,
835   *         clock absence detection will not be activated and function
836   *         will return HAL_TIMEOUT error.
837   * @param  hdfsdm_channel DFSDM channel handle.
838   * @retval HAL status
839   */
HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)840 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
841 {
842   HAL_StatusTypeDef status = HAL_OK;
843   uint32_t channel;
844   uint32_t tickstart;
845 
846   /* Check parameters */
847   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
848 
849   /* Check DFSDM channel state */
850   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
851   {
852     /* Return error status */
853     status = HAL_ERROR;
854   }
855   else
856   {
857     /* Get channel number from channel instance */
858     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
859 
860     /* Get timeout */
861     tickstart = HAL_GetTick();
862 
863     /* Clear clock absence flag */
864     while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_Pos + channel)) & 1U) != 0U)
865     {
866       DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
867 
868       /* Check the Timeout */
869       if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
870       {
871         /* Set timeout status */
872         status = HAL_TIMEOUT;
873         break;
874       }
875     }
876 
877     if(status == HAL_OK)
878     {
879       /* Activate clock absence detection interrupt */
880       DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_CKABIE;
881 
882       /* Start clock absence detection */
883       hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_CKABEN;
884     }
885   }
886   /* Return function status */
887   return status;
888 }
889 
890 /**
891   * @brief  Clock absence detection callback.
892   * @param  hdfsdm_channel DFSDM channel handle.
893   * @retval None
894   */
HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)895 __weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
896 {
897   /* Prevent unused argument(s) compilation warning */
898   UNUSED(hdfsdm_channel);
899 
900   /* NOTE : This function should not be modified, when the callback is needed,
901             the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
902    */
903 }
904 
905 /**
906   * @brief  This function allows to stop clock absence detection in interrupt mode.
907   * @note   Interrupt will be disabled for all channels
908   * @param  hdfsdm_channel DFSDM channel handle.
909   * @retval HAL status
910   */
HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)911 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
912 {
913   HAL_StatusTypeDef status = HAL_OK;
914   uint32_t channel;
915 
916   /* Check parameters */
917   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
918 
919   /* Check DFSDM channel state */
920   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
921   {
922     /* Return error status */
923     status = HAL_ERROR;
924   }
925   else
926   {
927     /* Stop clock absence detection */
928     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
929 
930     /* Clear clock absence flag */
931     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
932     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
933 
934     /* Disable clock absence detection interrupt */
935     DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
936   }
937   /* Return function status */
938   return status;
939 }
940 
941 /**
942   * @brief  This function allows to start short circuit detection in polling mode.
943   * @note   Same mode has to be used for all channels
944   * @param  hdfsdm_channel DFSDM channel handle.
945   * @param  Threshold Short circuit detector threshold.
946   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.
947   * @param  BreakSignal Break signals assigned to short circuit event.
948   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.
949   * @retval HAL status
950   */
HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)951 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
952                                             uint32_t Threshold,
953                                             uint32_t BreakSignal)
954 {
955   HAL_StatusTypeDef status = HAL_OK;
956 
957   /* Check parameters */
958   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
959   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
960   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
961 
962   /* Check DFSDM channel state */
963   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
964   {
965     /* Return error status */
966     status = HAL_ERROR;
967   }
968   else
969   {
970     /* Configure threshold and break signals */
971     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
972     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
973                                          Threshold);
974 
975     /* Start short circuit detection */
976     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
977   }
978   /* Return function status */
979   return status;
980 }
981 
982 /**
983   * @brief  This function allows to poll for the short circuit detection.
984   * @param  hdfsdm_channel DFSDM channel handle.
985   * @param  Timeout Timeout value in milliseconds.
986   * @retval HAL status
987   */
HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Timeout)988 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
989                                               uint32_t Timeout)
990 {
991   uint32_t tickstart;
992   uint32_t channel;
993 
994   /* Check parameters */
995   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
996 
997   /* Check DFSDM channel state */
998   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
999   {
1000     /* Return error status */
1001     return HAL_ERROR;
1002   }
1003   else
1004   {
1005     /* Get channel number from channel instance */
1006     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1007 
1008     /* Get timeout */
1009     tickstart = HAL_GetTick();
1010 
1011     /* Wait short circuit detection */
1012     while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_Pos + channel)) == 0U)
1013     {
1014       /* Check the Timeout */
1015       if(Timeout != HAL_MAX_DELAY)
1016       {
1017         if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
1018         {
1019           /* Return timeout status */
1020           return HAL_TIMEOUT;
1021         }
1022       }
1023     }
1024 
1025     /* Clear short circuit detection flag */
1026     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1027 
1028     /* Return function status */
1029     return HAL_OK;
1030   }
1031 }
1032 
1033 /**
1034   * @brief  This function allows to stop short circuit detection in polling mode.
1035   * @param  hdfsdm_channel DFSDM channel handle.
1036   * @retval HAL status
1037   */
HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1038 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1039 {
1040   HAL_StatusTypeDef status = HAL_OK;
1041   uint32_t channel;
1042 
1043   /* Check parameters */
1044   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1045 
1046   /* Check DFSDM channel state */
1047   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1048   {
1049     /* Return error status */
1050     status = HAL_ERROR;
1051   }
1052   else
1053   {
1054     /* Stop short circuit detection */
1055     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1056 
1057     /* Clear short circuit detection flag */
1058     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1059     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1060   }
1061   /* Return function status */
1062   return status;
1063 }
1064 
1065 /**
1066   * @brief  This function allows to start short circuit detection in interrupt mode.
1067   * @note   Same mode has to be used for all channels
1068   * @param  hdfsdm_channel DFSDM channel handle.
1069   * @param  Threshold Short circuit detector threshold.
1070   *         This parameter must be a number between Min_Data = 0 and Max_Data = 255.
1071   * @param  BreakSignal Break signals assigned to short circuit event.
1072   *         This parameter can be a values combination of @ref DFSDM_BreakSignals.
1073   * @retval HAL status
1074   */
HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,uint32_t Threshold,uint32_t BreakSignal)1075 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1076                                                uint32_t Threshold,
1077                                                uint32_t BreakSignal)
1078 {
1079   HAL_StatusTypeDef status = HAL_OK;
1080 
1081   /* Check parameters */
1082   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1083   assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
1084   assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
1085 
1086   /* Check DFSDM channel state */
1087   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1088   {
1089     /* Return error status */
1090     status = HAL_ERROR;
1091   }
1092   else
1093   {
1094     /* Activate short circuit detection interrupt */
1095     DFSDM1_Filter0->FLTCR2 |= DFSDM_FLTCR2_SCDIE;
1096 
1097     /* Configure threshold and break signals */
1098     hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD | DFSDM_CHAWSCDR_SCDT);
1099     hdfsdm_channel->Instance->CHAWSCDR |= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_Pos) | \
1100                                          Threshold);
1101 
1102     /* Start short circuit detection */
1103     hdfsdm_channel->Instance->CHCFGR1 |= DFSDM_CHCFGR1_SCDEN;
1104   }
1105   /* Return function status */
1106   return status;
1107 }
1108 
1109 /**
1110   * @brief  Short circuit detection callback.
1111   * @param  hdfsdm_channel DFSDM channel handle.
1112   * @retval None
1113   */
HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1114 __weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1115 {
1116   /* Prevent unused argument(s) compilation warning */
1117   UNUSED(hdfsdm_channel);
1118 
1119   /* NOTE : This function should not be modified, when the callback is needed,
1120             the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
1121    */
1122 }
1123 
1124 /**
1125   * @brief  This function allows to stop short circuit detection in interrupt mode.
1126   * @note   Interrupt will be disabled for all channels
1127   * @param  hdfsdm_channel DFSDM channel handle.
1128   * @retval HAL status
1129   */
HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1130 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1131 {
1132   HAL_StatusTypeDef status = HAL_OK;
1133   uint32_t channel;
1134 
1135   /* Check parameters */
1136   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1137 
1138   /* Check DFSDM channel state */
1139   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1140   {
1141     /* Return error status */
1142     status = HAL_ERROR;
1143   }
1144   else
1145   {
1146     /* Stop short circuit detection */
1147     hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
1148 
1149     /* Clear short circuit detection flag */
1150     channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
1151     DFSDM1_Filter0->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
1152 
1153     /* Disable short circuit detection interrupt */
1154     DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
1155   }
1156   /* Return function status */
1157   return status;
1158 }
1159 
1160 /**
1161   * @brief  This function allows to get channel analog watchdog value.
1162   * @param  hdfsdm_channel DFSDM channel handle.
1163   * @retval Channel analog watchdog value.
1164   */
HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1165 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1166 {
1167   return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
1168 }
1169 
1170 /**
1171   * @brief  This function allows to modify channel offset value.
1172   * @param  hdfsdm_channel DFSDM channel handle.
1173   * @param  Offset DFSDM channel offset.
1174   *         This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
1175   * @retval HAL status.
1176   */
HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef * hdfsdm_channel,int32_t Offset)1177 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
1178                                                 int32_t Offset)
1179 {
1180   HAL_StatusTypeDef status = HAL_OK;
1181 
1182   /* Check parameters */
1183   assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
1184   assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
1185 
1186   /* Check DFSDM channel state */
1187   if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
1188   {
1189     /* Return error status */
1190     status = HAL_ERROR;
1191   }
1192   else
1193   {
1194     /* Modify channel offset */
1195     hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
1196     hdfsdm_channel->Instance->CHCFGR2 |= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_Pos);
1197   }
1198   /* Return function status */
1199   return status;
1200 }
1201 
1202 /**
1203   * @}
1204   */
1205 
1206 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
1207  *  @brief    Channel state function
1208  *
1209 @verbatim
1210   ==============================================================================
1211                    ##### Channel state function #####
1212   ==============================================================================
1213     [..]  This section provides function allowing to:
1214       (+) Get channel handle state.
1215 @endverbatim
1216   * @{
1217   */
1218 
1219 /**
1220   * @brief  This function allows to get the current DFSDM channel handle state.
1221   * @param  hdfsdm_channel DFSDM channel handle.
1222   * @retval DFSDM channel state.
1223   */
HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef * hdfsdm_channel)1224 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
1225 {
1226   /* Return DFSDM channel handle state */
1227   return hdfsdm_channel->State;
1228 }
1229 
1230 /**
1231   * @}
1232   */
1233 
1234 /** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
1235  *  @brief    Filter initialization and de-initialization functions
1236  *
1237 @verbatim
1238   ==============================================================================
1239         ##### Filter initialization and de-initialization functions #####
1240   ==============================================================================
1241     [..]  This section provides functions allowing to:
1242       (+) Initialize the DFSDM filter.
1243       (+) De-initialize the DFSDM filter.
1244 @endverbatim
1245   * @{
1246   */
1247 
1248 /**
1249   * @brief  Initialize the DFSDM filter according to the specified parameters
1250   *         in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
1251   * @param  hdfsdm_filter DFSDM filter handle.
1252   * @retval HAL status.
1253   */
HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1254 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1255 {
1256   /* Check DFSDM Channel handle */
1257   if(hdfsdm_filter == NULL)
1258   {
1259     return HAL_ERROR;
1260   }
1261 
1262   /* Check parameters */
1263   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1264   assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
1265   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
1266   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
1267   assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
1268   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
1269   assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
1270   assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
1271   assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
1272   assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
1273 
1274   /* Check parameters compatibility */
1275   if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
1276     ((hdfsdm_filter->Init.RegularParam.Trigger  == DFSDM_FILTER_SYNC_TRIGGER) ||
1277      (hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
1278   {
1279     return HAL_ERROR;
1280   }
1281 
1282   /* Initialize DFSDM filter variables with default values */
1283   hdfsdm_filter->RegularContMode     = DFSDM_CONTINUOUS_CONV_OFF;
1284   hdfsdm_filter->InjectedChannelsNbr = 1;
1285   hdfsdm_filter->InjConvRemaining    = 1;
1286   hdfsdm_filter->ErrorCode           = DFSDM_FILTER_ERROR_NONE;
1287 
1288 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1289   /* Reset callback pointers to the weak predefined callbacks */
1290   hdfsdm_filter->AwdCallback             = HAL_DFSDM_FilterAwdCallback;
1291   hdfsdm_filter->RegConvCpltCallback     = HAL_DFSDM_FilterRegConvCpltCallback;
1292   hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1293   hdfsdm_filter->InjConvCpltCallback     = HAL_DFSDM_FilterInjConvCpltCallback;
1294   hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1295   hdfsdm_filter->ErrorCallback           = HAL_DFSDM_FilterErrorCallback;
1296 
1297   /* Call MSP init function */
1298   if(hdfsdm_filter->MspInitCallback == NULL)
1299   {
1300     hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1301   }
1302   hdfsdm_filter->MspInitCallback(hdfsdm_filter);
1303 #else
1304   /* Call MSP init function */
1305   HAL_DFSDM_FilterMspInit(hdfsdm_filter);
1306 #endif
1307 
1308   /* Set regular parameters */
1309   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
1310   if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
1311   {
1312     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_FAST;
1313   }
1314   else
1315   {
1316     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
1317   }
1318 
1319   if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
1320   {
1321     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RDMAEN;
1322   }
1323   else
1324   {
1325     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
1326   }
1327 
1328   /* Set injected parameters */
1329   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC | DFSDM_FLTCR1_JEXTEN | DFSDM_FLTCR1_JEXTSEL);
1330   if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
1331   {
1332     assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
1333     assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
1334     hdfsdm_filter->Instance->FLTCR1 |= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
1335   }
1336 
1337   if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
1338   {
1339     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSCAN;
1340   }
1341   else
1342   {
1343     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
1344   }
1345 
1346   if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
1347   {
1348     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JDMAEN;
1349   }
1350   else
1351   {
1352     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
1353   }
1354 
1355   /* Set filter parameters */
1356   hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD | DFSDM_FLTFCR_FOSR | DFSDM_FLTFCR_IOSR);
1357   hdfsdm_filter->Instance->FLTFCR |= (hdfsdm_filter->Init.FilterParam.SincOrder |
1358                                     ((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_Pos) |
1359                                      (hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
1360 
1361   /* Store regular and injected triggers and injected scan mode*/
1362   hdfsdm_filter->RegularTrigger   = hdfsdm_filter->Init.RegularParam.Trigger;
1363   hdfsdm_filter->InjectedTrigger  = hdfsdm_filter->Init.InjectedParam.Trigger;
1364   hdfsdm_filter->ExtTriggerEdge   = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
1365   hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
1366 
1367   /* Enable DFSDM filter */
1368   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
1369 
1370   /* Set DFSDM filter to ready state */
1371   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
1372 
1373   return HAL_OK;
1374 }
1375 
1376 /**
1377   * @brief  De-initializes the DFSDM filter.
1378   * @param  hdfsdm_filter DFSDM filter handle.
1379   * @retval HAL status.
1380   */
HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1381 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1382 {
1383   /* Check DFSDM filter handle */
1384   if(hdfsdm_filter == NULL)
1385   {
1386     return HAL_ERROR;
1387   }
1388 
1389   /* Check parameters */
1390   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1391 
1392   /* Disable the DFSDM filter */
1393   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
1394 
1395   /* Call MSP deinit function */
1396 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1397   if(hdfsdm_filter->MspDeInitCallback == NULL)
1398   {
1399     hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1400   }
1401   hdfsdm_filter->MspDeInitCallback(hdfsdm_filter);
1402 #else
1403   HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
1404 #endif
1405 
1406   /* Set DFSDM filter in reset state */
1407   hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
1408 
1409   return HAL_OK;
1410 }
1411 
1412 /**
1413   * @brief  Initializes the DFSDM filter MSP.
1414   * @param  hdfsdm_filter DFSDM filter handle.
1415   * @retval None
1416   */
HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1417 __weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1418 {
1419   /* Prevent unused argument(s) compilation warning */
1420   UNUSED(hdfsdm_filter);
1421 
1422   /* NOTE : This function should not be modified, when the function is needed,
1423             the HAL_DFSDM_FilterMspInit could be implemented in the user file.
1424    */
1425 }
1426 
1427 /**
1428   * @brief  De-initializes the DFSDM filter MSP.
1429   * @param  hdfsdm_filter DFSDM filter handle.
1430   * @retval None
1431   */
HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1432 __weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1433 {
1434   /* Prevent unused argument(s) compilation warning */
1435   UNUSED(hdfsdm_filter);
1436 
1437   /* NOTE : This function should not be modified, when the function is needed,
1438             the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
1439    */
1440 }
1441 
1442 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1443 /**
1444   * @brief  Register a user DFSDM filter callback
1445   *         to be used instead of the weak predefined callback.
1446   * @param  hdfsdm_filter DFSDM filter handle.
1447   * @param  CallbackID ID of the callback to be registered.
1448   *         This parameter can be one of the following values:
1449   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1450   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1451   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1452   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1453   *           @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1454   *           @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1455   *           @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1456   * @param  pCallback pointer to the callback function.
1457   * @retval HAL status.
1458   */
HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,pDFSDM_Filter_CallbackTypeDef pCallback)1459 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef        *hdfsdm_filter,
1460                                                     HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
1461                                                     pDFSDM_Filter_CallbackTypeDef      pCallback)
1462 {
1463   HAL_StatusTypeDef status = HAL_OK;
1464 
1465   if(pCallback == NULL)
1466   {
1467     /* update the error code */
1468     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1469     /* update return status */
1470     status = HAL_ERROR;
1471   }
1472   else
1473   {
1474     if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1475     {
1476       switch (CallbackID)
1477       {
1478       case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1479         hdfsdm_filter->RegConvCpltCallback = pCallback;
1480         break;
1481       case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1482         hdfsdm_filter->RegConvHalfCpltCallback = pCallback;
1483         break;
1484       case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1485         hdfsdm_filter->InjConvCpltCallback = pCallback;
1486         break;
1487       case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1488         hdfsdm_filter->InjConvHalfCpltCallback = pCallback;
1489         break;
1490       case HAL_DFSDM_FILTER_ERROR_CB_ID :
1491         hdfsdm_filter->ErrorCallback = pCallback;
1492         break;
1493       case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1494         hdfsdm_filter->MspInitCallback = pCallback;
1495         break;
1496       case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1497         hdfsdm_filter->MspDeInitCallback = pCallback;
1498         break;
1499       default :
1500         /* update the error code */
1501         hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1502         /* update return status */
1503         status = HAL_ERROR;
1504         break;
1505       }
1506     }
1507     else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1508     {
1509       switch (CallbackID)
1510       {
1511       case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1512         hdfsdm_filter->MspInitCallback = pCallback;
1513         break;
1514       case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1515         hdfsdm_filter->MspDeInitCallback = pCallback;
1516         break;
1517       default :
1518         /* update the error code */
1519         hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1520         /* update return status */
1521         status = HAL_ERROR;
1522         break;
1523       }
1524     }
1525     else
1526     {
1527       /* update the error code */
1528       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1529       /* update return status */
1530       status = HAL_ERROR;
1531     }
1532   }
1533   return status;
1534 }
1535 
1536 /**
1537   * @brief  Unregister a user DFSDM filter callback.
1538   *         DFSDM filter callback is redirected to the weak predefined callback.
1539   * @param  hdfsdm_filter DFSDM filter handle.
1540   * @param  CallbackID ID of the callback to be unregistered.
1541   *         This parameter can be one of the following values:
1542   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID regular conversion complete callback ID.
1543   *           @arg @ref HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID half regular conversion complete callback ID.
1544   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID injected conversion complete callback ID.
1545   *           @arg @ref HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID half injected conversion complete callback ID.
1546   *           @arg @ref HAL_DFSDM_FILTER_ERROR_CB_ID error callback ID.
1547   *           @arg @ref HAL_DFSDM_FILTER_MSPINIT_CB_ID MSP init callback ID.
1548   *           @arg @ref HAL_DFSDM_FILTER_MSPDEINIT_CB_ID MSP de-init callback ID.
1549   * @retval HAL status.
1550   */
HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)1551 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef        *hdfsdm_filter,
1552                                                       HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID)
1553 {
1554   HAL_StatusTypeDef status = HAL_OK;
1555 
1556   if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1557   {
1558     switch (CallbackID)
1559     {
1560     case HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID :
1561       hdfsdm_filter->RegConvCpltCallback = HAL_DFSDM_FilterRegConvCpltCallback;
1562       break;
1563     case HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID :
1564       hdfsdm_filter->RegConvHalfCpltCallback = HAL_DFSDM_FilterRegConvHalfCpltCallback;
1565       break;
1566     case HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID :
1567       hdfsdm_filter->InjConvCpltCallback = HAL_DFSDM_FilterInjConvCpltCallback;
1568       break;
1569     case HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID :
1570       hdfsdm_filter->InjConvHalfCpltCallback = HAL_DFSDM_FilterInjConvHalfCpltCallback;
1571       break;
1572     case HAL_DFSDM_FILTER_ERROR_CB_ID :
1573       hdfsdm_filter->ErrorCallback = HAL_DFSDM_FilterErrorCallback;
1574       break;
1575     case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1576       hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1577       break;
1578     case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1579       hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1580       break;
1581     default :
1582       /* update the error code */
1583       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1584       /* update return status */
1585       status = HAL_ERROR;
1586       break;
1587     }
1588   }
1589   else if(HAL_DFSDM_FILTER_STATE_RESET == hdfsdm_filter->State)
1590   {
1591     switch (CallbackID)
1592     {
1593     case HAL_DFSDM_FILTER_MSPINIT_CB_ID :
1594       hdfsdm_filter->MspInitCallback = HAL_DFSDM_FilterMspInit;
1595       break;
1596     case HAL_DFSDM_FILTER_MSPDEINIT_CB_ID :
1597       hdfsdm_filter->MspDeInitCallback = HAL_DFSDM_FilterMspDeInit;
1598       break;
1599     default :
1600       /* update the error code */
1601       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1602       /* update return status */
1603       status = HAL_ERROR;
1604       break;
1605     }
1606   }
1607   else
1608   {
1609     /* update the error code */
1610     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1611     /* update return status */
1612     status = HAL_ERROR;
1613   }
1614   return status;
1615 }
1616 
1617 /**
1618   * @brief  Register a user DFSDM filter analog watchdog callback
1619   *         to be used instead of the weak predefined callback.
1620   * @param  hdfsdm_filter DFSDM filter handle.
1621   * @param  pCallback pointer to the DFSDM filter analog watchdog callback function.
1622   * @retval HAL status.
1623   */
HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,pDFSDM_Filter_AwdCallbackTypeDef pCallback)1624 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef      *hdfsdm_filter,
1625                                                        pDFSDM_Filter_AwdCallbackTypeDef pCallback)
1626 {
1627   HAL_StatusTypeDef status = HAL_OK;
1628 
1629   if(pCallback == NULL)
1630   {
1631     /* update the error code */
1632     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1633     /* update return status */
1634     status = HAL_ERROR;
1635   }
1636   else
1637   {
1638     if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1639     {
1640       hdfsdm_filter->AwdCallback = pCallback;
1641     }
1642     else
1643     {
1644       /* update the error code */
1645       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1646       /* update return status */
1647       status = HAL_ERROR;
1648     }
1649   }
1650   return status;
1651 }
1652 
1653 /**
1654   * @brief  Unregister a user DFSDM filter analog watchdog callback.
1655   *         DFSDM filter AWD callback is redirected to the weak predefined callback.
1656   * @param  hdfsdm_filter DFSDM filter handle.
1657   * @retval HAL status.
1658   */
HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1659 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1660 {
1661   HAL_StatusTypeDef status = HAL_OK;
1662 
1663   if(HAL_DFSDM_FILTER_STATE_READY == hdfsdm_filter->State)
1664   {
1665     hdfsdm_filter->AwdCallback = HAL_DFSDM_FilterAwdCallback;
1666   }
1667   else
1668   {
1669     /* update the error code */
1670     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INVALID_CALLBACK;
1671     /* update return status */
1672     status = HAL_ERROR;
1673   }
1674   return status;
1675 }
1676 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
1677 
1678 /**
1679   * @}
1680   */
1681 
1682 /** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
1683  *  @brief    Filter control functions
1684  *
1685 @verbatim
1686   ==============================================================================
1687                     ##### Filter control functions #####
1688   ==============================================================================
1689     [..]  This section provides functions allowing to:
1690       (+) Select channel and enable/disable continuous mode for regular conversion.
1691       (+) Select channels for injected conversion.
1692 @endverbatim
1693   * @{
1694   */
1695 
1696 /**
1697   * @brief  This function allows to select channel and to enable/disable
1698   *         continuous mode for regular conversion.
1699   * @param  hdfsdm_filter DFSDM filter handle.
1700   * @param  Channel Channel for regular conversion.
1701   *         This parameter can be a value of @ref DFSDM_Channel_Selection.
1702   * @param  ContinuousMode Enable/disable continuous mode for regular conversion.
1703   *         This parameter can be a value of @ref DFSDM_ContinuousMode.
1704   * @retval HAL status
1705   */
HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t ContinuousMode)1706 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1707                                                    uint32_t                    Channel,
1708                                                    uint32_t                    ContinuousMode)
1709 {
1710   HAL_StatusTypeDef status = HAL_OK;
1711 
1712   /* Check parameters */
1713   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1714   assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
1715   assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
1716 
1717   /* Check DFSDM filter state */
1718   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1719      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1720   {
1721     /* Configure channel and continuous mode for regular conversion */
1722     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH | DFSDM_FLTCR1_RCONT);
1723     if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
1724     {
1725       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) |
1726                                                      DFSDM_FLTCR1_RCONT);
1727     }
1728     else
1729     {
1730       hdfsdm_filter->Instance->FLTCR1 |= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
1731     }
1732     /* Store continuous mode information */
1733     hdfsdm_filter->RegularContMode = ContinuousMode;
1734   }
1735   else
1736   {
1737     status = HAL_ERROR;
1738   }
1739 
1740   /* Return function status */
1741   return status;
1742 }
1743 
1744 /**
1745   * @brief  This function allows to select channels for injected conversion.
1746   * @param  hdfsdm_filter DFSDM filter handle.
1747   * @param  Channel Channels for injected conversion.
1748   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.
1749   * @retval HAL status
1750   */
HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)1751 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1752                                                    uint32_t                    Channel)
1753 {
1754   HAL_StatusTypeDef status = HAL_OK;
1755 
1756   /* Check parameters */
1757   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1758   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
1759 
1760   /* Check DFSDM filter state */
1761   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
1762      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
1763   {
1764     /* Configure channel for injected conversion */
1765     hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
1766     /* Store number of injected channels */
1767     hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
1768     /* Update number of injected channels remaining */
1769     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
1770                                       hdfsdm_filter->InjectedChannelsNbr : 1U;
1771   }
1772   else
1773   {
1774     status = HAL_ERROR;
1775   }
1776   /* Return function status */
1777   return status;
1778 }
1779 
1780 /**
1781   * @}
1782   */
1783 
1784 /** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
1785  *  @brief    Filter operation functions
1786  *
1787 @verbatim
1788   ==============================================================================
1789                     ##### Filter operation functions #####
1790   ==============================================================================
1791     [..]  This section provides functions allowing to:
1792       (+) Start conversion of regular/injected channel.
1793       (+) Poll for the end of regular/injected conversion.
1794       (+) Stop conversion of regular/injected channel.
1795       (+) Start conversion of regular/injected channel and enable interrupt.
1796       (+) Call the callback functions at the end of regular/injected conversions.
1797       (+) Stop conversion of regular/injected channel and disable interrupt.
1798       (+) Start conversion of regular/injected channel and enable DMA transfer.
1799       (+) Stop conversion of regular/injected channel and disable DMA transfer.
1800       (+) Start analog watchdog and enable interrupt.
1801       (+) Call the callback function when analog watchdog occurs.
1802       (+) Stop analog watchdog and disable interrupt.
1803       (+) Start extreme detector.
1804       (+) Stop extreme detector.
1805       (+) Get result of regular channel conversion.
1806       (+) Get result of injected channel conversion.
1807       (+) Get extreme detector maximum and minimum values.
1808       (+) Get conversion time.
1809       (+) Handle DFSDM interrupt request.
1810 @endverbatim
1811   * @{
1812   */
1813 
1814 /**
1815   * @brief  This function allows to start regular conversion in polling mode.
1816   * @note   This function should be called only when DFSDM filter instance is
1817   *         in idle state or if injected conversion is ongoing.
1818   * @param  hdfsdm_filter DFSDM filter handle.
1819   * @retval HAL status
1820   */
HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1821 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1822 {
1823   HAL_StatusTypeDef status = HAL_OK;
1824 
1825   /* Check parameters */
1826   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1827 
1828   /* Check DFSDM filter state */
1829   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1830      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1831   {
1832     /* Start regular conversion */
1833     DFSDM_RegConvStart(hdfsdm_filter);
1834   }
1835   else
1836   {
1837     status = HAL_ERROR;
1838   }
1839   /* Return function status */
1840   return status;
1841 }
1842 
1843 /**
1844   * @brief  This function allows to poll for the end of regular conversion.
1845   * @note   This function should be called only if regular conversion is ongoing.
1846   * @param  hdfsdm_filter DFSDM filter handle.
1847   * @param  Timeout Timeout value in milliseconds.
1848   * @retval HAL status
1849   */
HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)1850 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
1851                                                        uint32_t                    Timeout)
1852 {
1853   uint32_t tickstart;
1854 
1855   /* Check parameters */
1856   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1857 
1858   /* Check DFSDM filter state */
1859   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1860      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1861   {
1862     /* Return error status */
1863     return HAL_ERROR;
1864   }
1865   else
1866   {
1867     /* Get timeout */
1868     tickstart = HAL_GetTick();
1869 
1870     /* Wait end of regular conversion */
1871     while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
1872     {
1873       /* Check the Timeout */
1874       if(Timeout != HAL_MAX_DELAY)
1875       {
1876         if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
1877         {
1878           /* Return timeout status */
1879           return HAL_TIMEOUT;
1880         }
1881       }
1882     }
1883     /* Check if overrun occurs */
1884     if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
1885     {
1886       /* Update error code and call error callback */
1887       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
1888 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
1889       hdfsdm_filter->ErrorCallback(hdfsdm_filter);
1890 #else
1891       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
1892 #endif
1893 
1894       /* Clear regular overrun flag */
1895       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
1896     }
1897     /* Update DFSDM filter state only if not continuous conversion and SW trigger */
1898     if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
1899        (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
1900     {
1901       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
1902                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
1903     }
1904     /* Return function status */
1905     return HAL_OK;
1906   }
1907 }
1908 
1909 /**
1910   * @brief  This function allows to stop regular conversion in polling mode.
1911   * @note   This function should be called only if regular conversion is ongoing.
1912   * @param  hdfsdm_filter DFSDM filter handle.
1913   * @retval HAL status
1914   */
HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1915 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1916 {
1917   HAL_StatusTypeDef status = HAL_OK;
1918 
1919   /* Check parameters */
1920   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1921 
1922   /* Check DFSDM filter state */
1923   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1924      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1925   {
1926     /* Return error status */
1927     status = HAL_ERROR;
1928   }
1929   else
1930   {
1931     /* Stop regular conversion */
1932     DFSDM_RegConvStop(hdfsdm_filter);
1933   }
1934   /* Return function status */
1935   return status;
1936 }
1937 
1938 /**
1939   * @brief  This function allows to start regular conversion in interrupt mode.
1940   * @note   This function should be called only when DFSDM filter instance is
1941   *         in idle state or if injected conversion is ongoing.
1942   * @param  hdfsdm_filter DFSDM filter handle.
1943   * @retval HAL status
1944   */
HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1945 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1946 {
1947   HAL_StatusTypeDef status = HAL_OK;
1948 
1949   /* Check parameters */
1950   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1951 
1952   /* Check DFSDM filter state */
1953   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
1954      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
1955   {
1956     /* Enable interrupts for regular conversions */
1957     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
1958 
1959     /* Start regular conversion */
1960     DFSDM_RegConvStart(hdfsdm_filter);
1961   }
1962   else
1963   {
1964     status = HAL_ERROR;
1965   }
1966   /* Return function status */
1967   return status;
1968 }
1969 
1970 /**
1971   * @brief  This function allows to stop regular conversion in interrupt mode.
1972   * @note   This function should be called only if regular conversion is ongoing.
1973   * @param  hdfsdm_filter DFSDM filter handle.
1974   * @retval HAL status
1975   */
HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)1976 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
1977 {
1978   HAL_StatusTypeDef status = HAL_OK;
1979 
1980   /* Check parameters */
1981   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
1982 
1983   /* Check DFSDM filter state */
1984   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
1985      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
1986   {
1987     /* Return error status */
1988     status = HAL_ERROR;
1989   }
1990   else
1991   {
1992     /* Disable interrupts for regular conversions */
1993     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE | DFSDM_FLTCR2_ROVRIE);
1994 
1995     /* Stop regular conversion */
1996     DFSDM_RegConvStop(hdfsdm_filter);
1997   }
1998   /* Return function status */
1999   return status;
2000 }
2001 
2002 /**
2003   * @brief  This function allows to start regular conversion in DMA mode.
2004   * @note   This function should be called only when DFSDM filter instance is
2005   *         in idle state or if injected conversion is ongoing.
2006   *         Please note that data on buffer will contain signed regular conversion
2007   *         value on 24 most significant bits and corresponding channel on 3 least
2008   *         significant bits.
2009   * @param  hdfsdm_filter DFSDM filter handle.
2010   * @param  pData The destination buffer address.
2011   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2012   * @retval HAL status
2013   */
HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2014 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2015                                                    int32_t                    *pData,
2016                                                    uint32_t                    Length)
2017 {
2018   HAL_StatusTypeDef status = HAL_OK;
2019 
2020   /* Check parameters */
2021   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2022 
2023   /* Check destination address and length */
2024   if((pData == NULL) || (Length == 0U))
2025   {
2026     status = HAL_ERROR;
2027   }
2028   /* Check that DMA is enabled for regular conversion */
2029   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2030   {
2031     status = HAL_ERROR;
2032   }
2033   /* Check parameters compatibility */
2034   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2035           (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2036           (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2037           (Length != 1U))
2038   {
2039     status = HAL_ERROR;
2040   }
2041   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2042           (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2043           (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2044   {
2045     status = HAL_ERROR;
2046   }
2047   /* Check DFSDM filter state */
2048   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2049           (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2050   {
2051     /* Set callbacks on DMA handler */
2052     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2053     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2054     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
2055                                                    DFSDM_DMARegularHalfConvCplt : NULL;
2056 
2057     /* Start DMA in interrupt mode */
2058     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
2059                         (uint32_t) pData, Length) != HAL_OK)
2060     {
2061       /* Set DFSDM filter in error state */
2062       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2063       status = HAL_ERROR;
2064     }
2065     else
2066     {
2067       /* Start regular conversion */
2068       DFSDM_RegConvStart(hdfsdm_filter);
2069     }
2070   }
2071   else
2072   {
2073     status = HAL_ERROR;
2074   }
2075   /* Return function status */
2076   return status;
2077 }
2078 
2079 /**
2080   * @brief  This function allows to start regular conversion in DMA mode and to get
2081   *         only the 16 most significant bits of conversion.
2082   * @note   This function should be called only when DFSDM filter instance is
2083   *         in idle state or if injected conversion is ongoing.
2084   *         Please note that data on buffer will contain signed 16 most significant
2085   *         bits of regular conversion.
2086   * @param  hdfsdm_filter DFSDM filter handle.
2087   * @param  pData The destination buffer address.
2088   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2089   * @retval HAL status
2090   */
HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2091 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2092                                                       int16_t                    *pData,
2093                                                       uint32_t                    Length)
2094 {
2095   HAL_StatusTypeDef status = HAL_OK;
2096 
2097   /* Check parameters */
2098   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2099 
2100   /* Check destination address and length */
2101   if((pData == NULL) || (Length == 0U))
2102   {
2103     status = HAL_ERROR;
2104   }
2105   /* Check that DMA is enabled for regular conversion */
2106   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
2107   {
2108     status = HAL_ERROR;
2109   }
2110   /* Check parameters compatibility */
2111   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2112           (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2113           (hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
2114           (Length != 1U))
2115   {
2116     status = HAL_ERROR;
2117   }
2118   else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2119           (hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2120           (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
2121   {
2122     status = HAL_ERROR;
2123   }
2124   /* Check DFSDM filter state */
2125   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2126           (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
2127   {
2128     /* Set callbacks on DMA handler */
2129     hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
2130     hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
2131     hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
2132                                                    DFSDM_DMARegularHalfConvCplt : NULL;
2133 
2134     /* Start DMA in interrupt mode */
2135     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
2136                         (uint32_t) pData, Length) != HAL_OK)
2137     {
2138       /* Set DFSDM filter in error state */
2139       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2140       status = HAL_ERROR;
2141     }
2142     else
2143     {
2144       /* Start regular conversion */
2145       DFSDM_RegConvStart(hdfsdm_filter);
2146     }
2147   }
2148   else
2149   {
2150     status = HAL_ERROR;
2151   }
2152   /* Return function status */
2153   return status;
2154 }
2155 
2156 /**
2157   * @brief  This function allows to stop regular conversion in DMA mode.
2158   * @note   This function should be called only if regular conversion is ongoing.
2159   * @param  hdfsdm_filter DFSDM filter handle.
2160   * @retval HAL status
2161   */
HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2162 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2163 {
2164   HAL_StatusTypeDef status = HAL_OK;
2165 
2166   /* Check parameters */
2167   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2168 
2169   /* Check DFSDM filter state */
2170   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
2171      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2172   {
2173     /* Return error status */
2174     status = HAL_ERROR;
2175   }
2176   else
2177   {
2178     /* Stop current DMA transfer */
2179     if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
2180     {
2181       /* Set DFSDM filter in error state */
2182       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2183       status = HAL_ERROR;
2184     }
2185     else
2186     {
2187       /* Stop regular conversion */
2188       DFSDM_RegConvStop(hdfsdm_filter);
2189     }
2190   }
2191   /* Return function status */
2192   return status;
2193 }
2194 
2195 /**
2196   * @brief  This function allows to get regular conversion value.
2197   * @param  hdfsdm_filter DFSDM filter handle.
2198   * @param  Channel Corresponding channel of regular conversion.
2199   * @retval Regular conversion value
2200   */
HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2201 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2202                                         uint32_t                   *Channel)
2203 {
2204   uint32_t reg;
2205   int32_t  value;
2206 
2207   /* Check parameters */
2208   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2209   assert_param(Channel != (void *)0);
2210 
2211   /* Get value of data register for regular channel */
2212   reg = hdfsdm_filter->Instance->FLTRDATAR;
2213 
2214   /* Extract channel and regular conversion value */
2215   *Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
2216   /* Regular conversion value is a signed value located on 24 MSB of register */
2217   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2218   reg &= DFSDM_FLTRDATAR_RDATA;
2219   value = ((int32_t)reg) / 256;
2220 
2221   /* return regular conversion value */
2222   return value;
2223 }
2224 
2225 /**
2226   * @brief  This function allows to start injected conversion in polling mode.
2227   * @note   This function should be called only when DFSDM filter instance is
2228   *         in idle state or if regular conversion is ongoing.
2229   * @param  hdfsdm_filter DFSDM filter handle.
2230   * @retval HAL status
2231   */
HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2232 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2233 {
2234   HAL_StatusTypeDef status = HAL_OK;
2235 
2236   /* Check parameters */
2237   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2238 
2239   /* Check DFSDM filter state */
2240   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2241      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2242   {
2243     /* Start injected conversion */
2244     DFSDM_InjConvStart(hdfsdm_filter);
2245   }
2246   else
2247   {
2248     status = HAL_ERROR;
2249   }
2250   /* Return function status */
2251   return status;
2252 }
2253 
2254 /**
2255   * @brief  This function allows to poll for the end of injected conversion.
2256   * @note   This function should be called only if injected conversion is ongoing.
2257   * @param  hdfsdm_filter DFSDM filter handle.
2258   * @param  Timeout Timeout value in milliseconds.
2259   * @retval HAL status
2260   */
HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Timeout)2261 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2262                                                        uint32_t                    Timeout)
2263 {
2264   uint32_t tickstart;
2265 
2266   /* Check parameters */
2267   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2268 
2269   /* Check DFSDM filter state */
2270   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2271      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2272   {
2273     /* Return error status */
2274     return HAL_ERROR;
2275   }
2276   else
2277   {
2278     /* Get timeout */
2279     tickstart = HAL_GetTick();
2280 
2281     /* Wait end of injected conversions */
2282     while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
2283     {
2284       /* Check the Timeout */
2285       if(Timeout != HAL_MAX_DELAY)
2286       {
2287         if(((HAL_GetTick()-tickstart) > Timeout) || (Timeout == 0U))
2288         {
2289           /* Return timeout status */
2290           return HAL_TIMEOUT;
2291         }
2292       }
2293     }
2294     /* Check if overrun occurs */
2295     if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
2296     {
2297       /* Update error code and call error callback */
2298       hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2299 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2300       hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2301 #else
2302       HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2303 #endif
2304 
2305       /* Clear injected overrun flag */
2306       hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2307     }
2308 
2309     /* Update remaining injected conversions */
2310     hdfsdm_filter->InjConvRemaining--;
2311     if(hdfsdm_filter->InjConvRemaining == 0U)
2312     {
2313       /* Update DFSDM filter state only if trigger is software */
2314       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2315       {
2316         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2317                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2318       }
2319 
2320       /* end of injected sequence, reset the value */
2321       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2322                                          hdfsdm_filter->InjectedChannelsNbr : 1U;
2323     }
2324 
2325     /* Return function status */
2326     return HAL_OK;
2327   }
2328 }
2329 
2330 /**
2331   * @brief  This function allows to stop injected conversion in polling mode.
2332   * @note   This function should be called only if injected conversion is ongoing.
2333   * @param  hdfsdm_filter DFSDM filter handle.
2334   * @retval HAL status
2335   */
HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2336 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2337 {
2338   HAL_StatusTypeDef status = HAL_OK;
2339 
2340   /* Check parameters */
2341   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2342 
2343   /* Check DFSDM filter state */
2344   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2345      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2346   {
2347     /* Return error status */
2348     status = HAL_ERROR;
2349   }
2350   else
2351   {
2352     /* Stop injected conversion */
2353     DFSDM_InjConvStop(hdfsdm_filter);
2354   }
2355   /* Return function status */
2356   return status;
2357 }
2358 
2359 /**
2360   * @brief  This function allows to start injected conversion in interrupt mode.
2361   * @note   This function should be called only when DFSDM filter instance is
2362   *         in idle state or if regular conversion is ongoing.
2363   * @param  hdfsdm_filter DFSDM filter handle.
2364   * @retval HAL status
2365   */
HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2366 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2367 {
2368   HAL_StatusTypeDef status = HAL_OK;
2369 
2370   /* Check parameters */
2371   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2372 
2373   /* Check DFSDM filter state */
2374   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2375      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2376   {
2377     /* Enable interrupts for injected conversions */
2378     hdfsdm_filter->Instance->FLTCR2 |= (DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2379 
2380     /* Start injected conversion */
2381     DFSDM_InjConvStart(hdfsdm_filter);
2382   }
2383   else
2384   {
2385     status = HAL_ERROR;
2386   }
2387   /* Return function status */
2388   return status;
2389 }
2390 
2391 /**
2392   * @brief  This function allows to stop injected conversion in interrupt mode.
2393   * @note   This function should be called only if injected conversion is ongoing.
2394   * @param  hdfsdm_filter DFSDM filter handle.
2395   * @retval HAL status
2396   */
HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2397 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2398 {
2399   HAL_StatusTypeDef status = HAL_OK;
2400 
2401   /* Check parameters */
2402   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2403 
2404   /* Check DFSDM filter state */
2405   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2406      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2407   {
2408     /* Return error status */
2409     status = HAL_ERROR;
2410   }
2411   else
2412   {
2413     /* Disable interrupts for injected conversions */
2414     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE | DFSDM_FLTCR2_JOVRIE);
2415 
2416     /* Stop injected conversion */
2417     DFSDM_InjConvStop(hdfsdm_filter);
2418   }
2419   /* Return function status */
2420   return status;
2421 }
2422 
2423 /**
2424   * @brief  This function allows to start injected conversion in DMA mode.
2425   * @note   This function should be called only when DFSDM filter instance is
2426   *         in idle state or if regular conversion is ongoing.
2427   *         Please note that data on buffer will contain signed injected conversion
2428   *         value on 24 most significant bits and corresponding channel on 3 least
2429   *         significant bits.
2430   * @param  hdfsdm_filter DFSDM filter handle.
2431   * @param  pData The destination buffer address.
2432   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2433   * @retval HAL status
2434   */
HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int32_t * pData,uint32_t Length)2435 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2436                                                     int32_t                    *pData,
2437                                                     uint32_t                    Length)
2438 {
2439   HAL_StatusTypeDef status = HAL_OK;
2440 
2441   /* Check parameters */
2442   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2443 
2444   /* Check destination address and length */
2445   if((pData == NULL) || (Length == 0U))
2446   {
2447     status = HAL_ERROR;
2448   }
2449   /* Check that DMA is enabled for injected conversion */
2450   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2451   {
2452     status = HAL_ERROR;
2453   }
2454   /* Check parameters compatibility */
2455   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2456           (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2457           (Length > hdfsdm_filter->InjConvRemaining))
2458   {
2459     status = HAL_ERROR;
2460   }
2461   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2462           (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2463   {
2464     status = HAL_ERROR;
2465   }
2466   /* Check DFSDM filter state */
2467   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2468           (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2469   {
2470     /* Set callbacks on DMA handler */
2471     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2472     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2473     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2474                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;
2475 
2476     /* Start DMA in interrupt mode */
2477     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
2478                         (uint32_t) pData, Length) != HAL_OK)
2479     {
2480       /* Set DFSDM filter in error state */
2481       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2482       status = HAL_ERROR;
2483     }
2484     else
2485     {
2486       /* Start injected conversion */
2487       DFSDM_InjConvStart(hdfsdm_filter);
2488     }
2489   }
2490   else
2491   {
2492     status = HAL_ERROR;
2493   }
2494   /* Return function status */
2495   return status;
2496 }
2497 
2498 /**
2499   * @brief  This function allows to start injected conversion in DMA mode and to get
2500   *         only the 16 most significant bits of conversion.
2501   * @note   This function should be called only when DFSDM filter instance is
2502   *         in idle state or if regular conversion is ongoing.
2503   *         Please note that data on buffer will contain signed 16 most significant
2504   *         bits of injected conversion.
2505   * @param  hdfsdm_filter DFSDM filter handle.
2506   * @param  pData The destination buffer address.
2507   * @param  Length The length of data to be transferred from DFSDM filter to memory.
2508   * @retval HAL status
2509   */
HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,int16_t * pData,uint32_t Length)2510 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2511                                                        int16_t                    *pData,
2512                                                        uint32_t                    Length)
2513 {
2514   HAL_StatusTypeDef status = HAL_OK;
2515 
2516   /* Check parameters */
2517   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2518 
2519   /* Check destination address and length */
2520   if((pData == NULL) || (Length == 0U))
2521   {
2522     status = HAL_ERROR;
2523   }
2524   /* Check that DMA is enabled for injected conversion */
2525   else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
2526   {
2527     status = HAL_ERROR;
2528   }
2529   /* Check parameters compatibility */
2530   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2531           (hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
2532           (Length > hdfsdm_filter->InjConvRemaining))
2533   {
2534     status = HAL_ERROR;
2535   }
2536   else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
2537           (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
2538   {
2539     status = HAL_ERROR;
2540   }
2541   /* Check DFSDM filter state */
2542   else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) || \
2543           (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
2544   {
2545     /* Set callbacks on DMA handler */
2546     hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
2547     hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
2548     hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
2549                                                    DFSDM_DMAInjectedHalfConvCplt : NULL;
2550 
2551     /* Start DMA in interrupt mode */
2552     if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
2553                         (uint32_t) pData, Length) != HAL_OK)
2554     {
2555       /* Set DFSDM filter in error state */
2556       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2557       status = HAL_ERROR;
2558     }
2559     else
2560     {
2561       /* Start injected conversion */
2562       DFSDM_InjConvStart(hdfsdm_filter);
2563     }
2564   }
2565   else
2566   {
2567     status = HAL_ERROR;
2568   }
2569   /* Return function status */
2570   return status;
2571 }
2572 
2573 /**
2574   * @brief  This function allows to stop injected conversion in DMA mode.
2575   * @note   This function should be called only if injected conversion is ongoing.
2576   * @param  hdfsdm_filter DFSDM filter handle.
2577   * @retval HAL status
2578   */
HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2579 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2580 {
2581   HAL_StatusTypeDef status = HAL_OK;
2582 
2583   /* Check parameters */
2584   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2585 
2586   /* Check DFSDM filter state */
2587   if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
2588      (hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
2589   {
2590     /* Return error status */
2591     status = HAL_ERROR;
2592   }
2593   else
2594   {
2595     /* Stop current DMA transfer */
2596     if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
2597     {
2598       /* Set DFSDM filter in error state */
2599       hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
2600       status = HAL_ERROR;
2601     }
2602     else
2603     {
2604       /* Stop regular conversion */
2605       DFSDM_InjConvStop(hdfsdm_filter);
2606     }
2607   }
2608   /* Return function status */
2609   return status;
2610 }
2611 
2612 /**
2613   * @brief  This function allows to get injected conversion value.
2614   * @param  hdfsdm_filter DFSDM filter handle.
2615   * @param  Channel Corresponding channel of injected conversion.
2616   * @retval Injected conversion value
2617   */
HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2618 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2619                                          uint32_t                   *Channel)
2620 {
2621   uint32_t reg;
2622   int32_t  value;
2623 
2624   /* Check parameters */
2625   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2626   assert_param(Channel != (void *)0);
2627 
2628   /* Get value of data register for injected channel */
2629   reg = hdfsdm_filter->Instance->FLTJDATAR;
2630 
2631   /* Extract channel and injected conversion value */
2632   *Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
2633   /* Injected conversion value is a signed value located on 24 MSB of register */
2634   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2635   reg &= DFSDM_FLTJDATAR_JDATA;
2636   value = ((int32_t)reg) / 256;
2637 
2638   /* return regular conversion value */
2639   return value;
2640 }
2641 
2642 /**
2643   * @brief  This function allows to start filter analog watchdog in interrupt mode.
2644   * @param  hdfsdm_filter DFSDM filter handle.
2645   * @param  awdParam DFSDM filter analog watchdog parameters.
2646   * @retval HAL status
2647   */
HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,DFSDM_Filter_AwdParamTypeDef * awdParam)2648 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef   *hdfsdm_filter,
2649                                               DFSDM_Filter_AwdParamTypeDef *awdParam)
2650 {
2651   HAL_StatusTypeDef status = HAL_OK;
2652 
2653   /* Check parameters */
2654   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2655   assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
2656   assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
2657   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
2658   assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
2659   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
2660   assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
2661 
2662   /* Check DFSDM filter state */
2663   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2664      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2665   {
2666     /* Return error status */
2667     status = HAL_ERROR;
2668   }
2669   else
2670   {
2671     /* Set analog watchdog data source */
2672     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2673     hdfsdm_filter->Instance->FLTCR1 |= awdParam->DataSource;
2674 
2675     /* Set thresholds and break signals */
2676     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2677     hdfsdm_filter->Instance->FLTAWHTR |= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_AWHT_Pos) | \
2678                                         awdParam->HighBreakSignal);
2679     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2680     hdfsdm_filter->Instance->FLTAWLTR |= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_AWLT_Pos) | \
2681                                         awdParam->LowBreakSignal);
2682 
2683     /* Set channels and interrupt for analog watchdog */
2684     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
2685     hdfsdm_filter->Instance->FLTCR2 |= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_Pos) | \
2686                                         DFSDM_FLTCR2_AWDIE);
2687   }
2688   /* Return function status */
2689   return status;
2690 }
2691 
2692 /**
2693   * @brief  This function allows to stop filter analog watchdog in interrupt mode.
2694   * @param  hdfsdm_filter DFSDM filter handle.
2695   * @retval HAL status
2696   */
HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2697 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2698 {
2699   HAL_StatusTypeDef status = HAL_OK;
2700 
2701   /* Check parameters */
2702   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2703 
2704   /* Check DFSDM filter state */
2705   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2706      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2707   {
2708     /* Return error status */
2709     status = HAL_ERROR;
2710   }
2711   else
2712   {
2713     /* Reset channels for analog watchdog and deactivate interrupt */
2714     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH | DFSDM_FLTCR2_AWDIE);
2715 
2716     /* Clear all analog watchdog flags */
2717     hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF | DFSDM_FLTAWCFR_CLRAWLTF);
2718 
2719     /* Reset thresholds and break signals */
2720     hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT | DFSDM_FLTAWHTR_BKAWH);
2721     hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT | DFSDM_FLTAWLTR_BKAWL);
2722 
2723     /* Reset analog watchdog data source */
2724     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
2725   }
2726   /* Return function status */
2727   return status;
2728 }
2729 
2730 /**
2731   * @brief  This function allows to start extreme detector feature.
2732   * @param  hdfsdm_filter DFSDM filter handle.
2733   * @param  Channel Channels where extreme detector is enabled.
2734   *         This parameter can be a values combination of @ref DFSDM_Channel_Selection.
2735   * @retval HAL status
2736   */
HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel)2737 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2738                                            uint32_t                    Channel)
2739 {
2740   HAL_StatusTypeDef status = HAL_OK;
2741 
2742   /* Check parameters */
2743   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2744   assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
2745 
2746   /* Check DFSDM filter state */
2747   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2748      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2749   {
2750     /* Return error status */
2751     status = HAL_ERROR;
2752   }
2753   else
2754   {
2755     /* Set channels for extreme detector */
2756     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2757     hdfsdm_filter->Instance->FLTCR2 |= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_Pos);
2758   }
2759   /* Return function status */
2760   return status;
2761 }
2762 
2763 /**
2764   * @brief  This function allows to stop extreme detector feature.
2765   * @param  hdfsdm_filter DFSDM filter handle.
2766   * @retval HAL status
2767   */
HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2768 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2769 {
2770   HAL_StatusTypeDef status = HAL_OK;
2771   __IO uint32_t     reg1;
2772   __IO uint32_t     reg2;
2773 
2774   /* Check parameters */
2775   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2776 
2777   /* Check DFSDM filter state */
2778   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) || \
2779      (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
2780   {
2781     /* Return error status */
2782     status = HAL_ERROR;
2783   }
2784   else
2785   {
2786     /* Reset channels for extreme detector */
2787     hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
2788 
2789     /* Clear extreme detector values */
2790     reg1 = hdfsdm_filter->Instance->FLTEXMAX;
2791     reg2 = hdfsdm_filter->Instance->FLTEXMIN;
2792     UNUSED(reg1); /* To avoid GCC warning */
2793     UNUSED(reg2); /* To avoid GCC warning */
2794   }
2795   /* Return function status */
2796   return status;
2797 }
2798 
2799 /**
2800   * @brief  This function allows to get extreme detector maximum value.
2801   * @param  hdfsdm_filter DFSDM filter handle.
2802   * @param  Channel Corresponding channel.
2803   * @retval Extreme detector maximum value
2804   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.
2805   */
HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2806 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2807                                        uint32_t                   *Channel)
2808 {
2809   uint32_t reg;
2810   int32_t  value;
2811 
2812   /* Check parameters */
2813   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2814   assert_param(Channel != (void *)0);
2815 
2816   /* Get value of extreme detector maximum register */
2817   reg = hdfsdm_filter->Instance->FLTEXMAX;
2818 
2819   /* Extract channel and extreme detector maximum value */
2820   *Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
2821   /* Extreme detector maximum value is a signed value located on 24 MSB of register */
2822   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2823   reg &= DFSDM_FLTEXMAX_EXMAX;
2824   value = ((int32_t)reg) / 256;
2825 
2826   /* return extreme detector maximum value */
2827   return value;
2828 }
2829 
2830 /**
2831   * @brief  This function allows to get extreme detector minimum value.
2832   * @param  hdfsdm_filter DFSDM filter handle.
2833   * @param  Channel Corresponding channel.
2834   * @retval Extreme detector minimum value
2835   *         This value is between Min_Data = -8388608 and Max_Data = 8388607.
2836   */
HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t * Channel)2837 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
2838                                        uint32_t                   *Channel)
2839 {
2840   uint32_t reg;
2841   int32_t  value;
2842 
2843   /* Check parameters */
2844   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2845   assert_param(Channel != (void *)0);
2846 
2847   /* Get value of extreme detector minimum register */
2848   reg = hdfsdm_filter->Instance->FLTEXMIN;
2849 
2850   /* Extract channel and extreme detector minimum value */
2851   *Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
2852   /* Extreme detector minimum value is a signed value located on 24 MSB of register */
2853   /* So after applying a mask on these bits we have to perform a division by 256 (2 raised to the power of 8) */
2854   reg &= DFSDM_FLTEXMIN_EXMIN;
2855   value = ((int32_t)reg) / 256;
2856 
2857   /* return extreme detector minimum value */
2858   return value;
2859 }
2860 
2861 /**
2862   * @brief  This function allows to get conversion time value.
2863   * @param  hdfsdm_filter DFSDM filter handle.
2864   * @retval Conversion time value
2865   * @note   To get time in second, this value has to be divided by DFSDM clock frequency.
2866   */
HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2867 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2868 {
2869   uint32_t reg;
2870   uint32_t value;
2871 
2872   /* Check parameters */
2873   assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
2874 
2875   /* Get value of conversion timer register */
2876   reg = hdfsdm_filter->Instance->FLTCNVTIMR;
2877 
2878   /* Extract conversion time value */
2879   value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_CNVCNT_Pos);
2880 
2881   /* return extreme detector minimum value */
2882   return value;
2883 }
2884 
2885 /**
2886   * @brief  This function handles the DFSDM interrupts.
2887   * @param  hdfsdm_filter DFSDM filter handle.
2888   * @retval None
2889   */
HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)2890 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
2891 {
2892   /* Get FTLISR and FLTCR2 register values */
2893   const uint32_t temp_fltisr = hdfsdm_filter->Instance->FLTISR;
2894   const uint32_t temp_fltcr2 = hdfsdm_filter->Instance->FLTCR2;
2895 
2896   /* Check if overrun occurs during regular conversion */
2897   if(((temp_fltisr & DFSDM_FLTISR_ROVRF) != 0U) && \
2898      ((temp_fltcr2 & DFSDM_FLTCR2_ROVRIE) != 0U))
2899   {
2900     /* Clear regular overrun flag */
2901     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
2902 
2903     /* Update error code */
2904     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
2905 
2906     /* Call error callback */
2907 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2908     hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2909 #else
2910     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2911 #endif
2912   }
2913   /* Check if overrun occurs during injected conversion */
2914   else if(((temp_fltisr & DFSDM_FLTISR_JOVRF) != 0U) && \
2915           ((temp_fltcr2 & DFSDM_FLTCR2_JOVRIE) != 0U))
2916   {
2917     /* Clear injected overrun flag */
2918     hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
2919 
2920     /* Update error code */
2921     hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
2922 
2923     /* Call error callback */
2924 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2925     hdfsdm_filter->ErrorCallback(hdfsdm_filter);
2926 #else
2927     HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
2928 #endif
2929   }
2930   /* Check if end of regular conversion */
2931   else if(((temp_fltisr & DFSDM_FLTISR_REOCF) != 0U) && \
2932           ((temp_fltcr2 & DFSDM_FLTCR2_REOCIE) != 0U))
2933   {
2934     /* Call regular conversion complete callback */
2935 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2936     hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
2937 #else
2938     HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
2939 #endif
2940 
2941     /* End of conversion if mode is not continuous and software trigger */
2942     if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
2943        (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
2944     {
2945       /* Disable interrupts for regular conversions */
2946       hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
2947 
2948       /* Update DFSDM filter state */
2949       hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
2950                              HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
2951     }
2952   }
2953   /* Check if end of injected conversion */
2954   else if(((temp_fltisr & DFSDM_FLTISR_JEOCF) != 0U) && \
2955           ((temp_fltcr2 & DFSDM_FLTCR2_JEOCIE) != 0U))
2956   {
2957     /* Call injected conversion complete callback */
2958 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
2959     hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
2960 #else
2961     HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
2962 #endif
2963 
2964     /* Update remaining injected conversions */
2965     hdfsdm_filter->InjConvRemaining--;
2966     if(hdfsdm_filter->InjConvRemaining == 0U)
2967     {
2968       /* End of conversion if trigger is software */
2969       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
2970       {
2971         /* Disable interrupts for injected conversions */
2972         hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
2973 
2974         /* Update DFSDM filter state */
2975         hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
2976                                HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
2977       }
2978       /* end of injected sequence, reset the value */
2979       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
2980                                          hdfsdm_filter->InjectedChannelsNbr : 1U;
2981     }
2982   }
2983   /* Check if analog watchdog occurs */
2984   else if(((temp_fltisr & DFSDM_FLTISR_AWDF) != 0U) && \
2985           ((temp_fltcr2 & DFSDM_FLTCR2_AWDIE) != 0U))
2986   {
2987     uint32_t reg;
2988     uint32_t threshold;
2989     uint32_t channel = 0;
2990 
2991     /* Get channel and threshold */
2992     reg = hdfsdm_filter->Instance->FLTAWSR;
2993     threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
2994     if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
2995     {
2996       reg = reg >> DFSDM_FLTAWSR_AWHTF_Pos;
2997     }
2998     while(((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U)))
2999     {
3000       channel++;
3001       reg = reg >> 1;
3002     }
3003     /* Clear analog watchdog flag */
3004     hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
3005                                         (1UL << (DFSDM_FLTAWSR_AWHTF_Pos + channel)) : \
3006                                         (1UL << channel);
3007 
3008     /* Call analog watchdog callback */
3009 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3010     hdfsdm_filter->AwdCallback(hdfsdm_filter, channel, threshold);
3011 #else
3012     HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
3013 #endif
3014   }
3015   /* Check if clock absence occurs */
3016   else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
3017          ((temp_fltisr & DFSDM_FLTISR_CKABF) != 0U) && \
3018          ((temp_fltcr2 & DFSDM_FLTCR2_CKABIE) != 0U))
3019   {
3020     uint32_t reg;
3021     uint32_t channel = 0;
3022 
3023     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_Pos);
3024 
3025     while(channel < DFSDM1_CHANNEL_NUMBER)
3026     {
3027       /* Check if flag is set and corresponding channel is enabled */
3028       if(((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL))
3029       {
3030         /* Check clock absence has been enabled for this channel */
3031         if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
3032         {
3033           /* Clear clock absence flag */
3034           hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRCKABF_Pos + channel));
3035 
3036           /* Call clock absence callback */
3037 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3038           a_dfsdm1ChannelHandle[channel]->CkabCallback(a_dfsdm1ChannelHandle[channel]);
3039 #else
3040           HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
3041 #endif
3042         }
3043       }
3044       channel++;
3045       reg = reg >> 1;
3046     }
3047   }
3048   /* Check if short circuit detection occurs */
3049   else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
3050          ((temp_fltisr & DFSDM_FLTISR_SCDF) != 0U) && \
3051          ((temp_fltcr2 & DFSDM_FLTCR2_SCDIE) != 0U))
3052   {
3053     uint32_t reg;
3054     uint32_t channel = 0;
3055 
3056     /* Get channel */
3057     reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_Pos);
3058     while(((reg & 1U) == 0U) && (channel < (DFSDM1_CHANNEL_NUMBER - 1U)))
3059     {
3060       channel++;
3061       reg = reg >> 1;
3062     }
3063 
3064     /* Clear short circuit detection flag */
3065     hdfsdm_filter->Instance->FLTICR = (1UL << (DFSDM_FLTICR_CLRSCDF_Pos + channel));
3066 
3067     /* Call short circuit detection callback */
3068 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3069     a_dfsdm1ChannelHandle[channel]->ScdCallback(a_dfsdm1ChannelHandle[channel]);
3070 #else
3071     HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
3072 #endif
3073   }
3074 }
3075 
3076 /**
3077   * @brief  Regular conversion complete callback.
3078   * @note   In interrupt mode, user has to read conversion value in this function
3079   *         using HAL_DFSDM_FilterGetRegularValue.
3080   * @param  hdfsdm_filter DFSDM filter handle.
3081   * @retval None
3082   */
HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3083 __weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3084 {
3085   /* Prevent unused argument(s) compilation warning */
3086   UNUSED(hdfsdm_filter);
3087 
3088   /* NOTE : This function should not be modified, when the callback is needed,
3089             the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
3090    */
3091 }
3092 
3093 /**
3094   * @brief  Half regular conversion complete callback.
3095   * @param  hdfsdm_filter DFSDM filter handle.
3096   * @retval None
3097   */
HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3098 __weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3099 {
3100   /* Prevent unused argument(s) compilation warning */
3101   UNUSED(hdfsdm_filter);
3102 
3103   /* NOTE : This function should not be modified, when the callback is needed,
3104             the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
3105    */
3106 }
3107 
3108 /**
3109   * @brief  Injected conversion complete callback.
3110   * @note   In interrupt mode, user has to read conversion value in this function
3111   *         using HAL_DFSDM_FilterGetInjectedValue.
3112   * @param  hdfsdm_filter DFSDM filter handle.
3113   * @retval None
3114   */
HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3115 __weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3116 {
3117   /* Prevent unused argument(s) compilation warning */
3118   UNUSED(hdfsdm_filter);
3119 
3120   /* NOTE : This function should not be modified, when the callback is needed,
3121             the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
3122    */
3123 }
3124 
3125 /**
3126   * @brief  Half injected conversion complete callback.
3127   * @param  hdfsdm_filter DFSDM filter handle.
3128   * @retval None
3129   */
HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3130 __weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3131 {
3132   /* Prevent unused argument(s) compilation warning */
3133   UNUSED(hdfsdm_filter);
3134 
3135   /* NOTE : This function should not be modified, when the callback is needed,
3136             the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
3137    */
3138 }
3139 
3140 /**
3141   * @brief  Filter analog watchdog callback.
3142   * @param  hdfsdm_filter DFSDM filter handle.
3143   * @param  Channel Corresponding channel.
3144   * @param  Threshold Low or high threshold has been reached.
3145   * @retval None
3146   */
HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter,uint32_t Channel,uint32_t Threshold)3147 __weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
3148                                         uint32_t Channel, uint32_t Threshold)
3149 {
3150   /* Prevent unused argument(s) compilation warning */
3151   UNUSED(hdfsdm_filter);
3152   UNUSED(Channel);
3153   UNUSED(Threshold);
3154 
3155   /* NOTE : This function should not be modified, when the callback is needed,
3156             the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
3157    */
3158 }
3159 
3160 /**
3161   * @brief  Error callback.
3162   * @param  hdfsdm_filter DFSDM filter handle.
3163   * @retval None
3164   */
HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3165 __weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3166 {
3167   /* Prevent unused argument(s) compilation warning */
3168   UNUSED(hdfsdm_filter);
3169 
3170   /* NOTE : This function should not be modified, when the callback is needed,
3171             the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
3172    */
3173 }
3174 
3175 /**
3176   * @}
3177   */
3178 
3179 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
3180  *  @brief    Filter state functions
3181  *
3182 @verbatim
3183   ==============================================================================
3184                      ##### Filter state functions #####
3185   ==============================================================================
3186     [..]  This section provides functions allowing to:
3187       (+) Get the DFSDM filter state.
3188       (+) Get the DFSDM filter error.
3189 @endverbatim
3190   * @{
3191   */
3192 
3193 /**
3194   * @brief  This function allows to get the current DFSDM filter handle state.
3195   * @param  hdfsdm_filter DFSDM filter handle.
3196   * @retval DFSDM filter state.
3197   */
HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3198 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3199 {
3200   /* Return DFSDM filter handle state */
3201   return hdfsdm_filter->State;
3202 }
3203 
3204 /**
3205   * @brief  This function allows to get the current DFSDM filter error.
3206   * @param  hdfsdm_filter DFSDM filter handle.
3207   * @retval DFSDM filter error code.
3208   */
HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3209 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
3210 {
3211   return hdfsdm_filter->ErrorCode;
3212 }
3213 
3214 /**
3215   * @}
3216   */
3217 
3218 /**
3219   * @}
3220   */
3221 /* End of exported functions -------------------------------------------------*/
3222 
3223 /* Private functions ---------------------------------------------------------*/
3224 /** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
3225   * @{
3226   */
3227 
3228 /**
3229   * @brief  DMA half transfer complete callback for regular conversion.
3230   * @param  hdma DMA handle.
3231   * @retval None
3232   */
DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef * hdma)3233 static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
3234 {
3235   /* Get DFSDM filter handle */
3236   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3237 
3238   /* Call regular half conversion complete callback */
3239 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3240   hdfsdm_filter->RegConvHalfCpltCallback(hdfsdm_filter);
3241 #else
3242   HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
3243 #endif
3244 }
3245 
3246 /**
3247   * @brief  DMA transfer complete callback for regular conversion.
3248   * @param  hdma DMA handle.
3249   * @retval None
3250   */
DFSDM_DMARegularConvCplt(DMA_HandleTypeDef * hdma)3251 static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
3252 {
3253   /* Get DFSDM filter handle */
3254   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3255 
3256   /* Call regular conversion complete callback */
3257 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3258   hdfsdm_filter->RegConvCpltCallback(hdfsdm_filter);
3259 #else
3260   HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
3261 #endif
3262 }
3263 
3264 /**
3265   * @brief  DMA half transfer complete callback for injected conversion.
3266   * @param  hdma DMA handle.
3267   * @retval None
3268   */
DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef * hdma)3269 static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
3270 {
3271   /* Get DFSDM filter handle */
3272   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3273 
3274   /* Call injected half conversion complete callback */
3275 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3276   hdfsdm_filter->InjConvHalfCpltCallback(hdfsdm_filter);
3277 #else
3278   HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
3279 #endif
3280 }
3281 
3282 /**
3283   * @brief  DMA transfer complete callback for injected conversion.
3284   * @param  hdma DMA handle.
3285   * @retval None
3286   */
DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef * hdma)3287 static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
3288 {
3289   /* Get DFSDM filter handle */
3290   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3291 
3292   /* Call injected conversion complete callback */
3293 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3294   hdfsdm_filter->InjConvCpltCallback(hdfsdm_filter);
3295 #else
3296   HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
3297 #endif
3298 }
3299 
3300 /**
3301   * @brief  DMA error callback.
3302   * @param  hdma DMA handle.
3303   * @retval None
3304   */
DFSDM_DMAError(DMA_HandleTypeDef * hdma)3305 static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
3306 {
3307   /* Get DFSDM filter handle */
3308   DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef*) ((DMA_HandleTypeDef*)hdma)->Parent;
3309 
3310   /* Update error code */
3311   hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
3312 
3313   /* Call error callback */
3314 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
3315   hdfsdm_filter->ErrorCallback(hdfsdm_filter);
3316 #else
3317   HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
3318 #endif
3319 }
3320 
3321 /**
3322   * @brief  This function allows to get the number of injected channels.
3323   * @param  Channels bitfield of injected channels.
3324   * @retval Number of injected channels.
3325   */
DFSDM_GetInjChannelsNbr(uint32_t Channels)3326 static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
3327 {
3328   uint32_t nbChannels = 0;
3329   uint32_t tmp;
3330 
3331   /* Get the number of channels from bitfield */
3332   tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
3333   while(tmp != 0U)
3334   {
3335     if((tmp & 1U) != 0U)
3336     {
3337       nbChannels++;
3338     }
3339     tmp = (uint32_t) (tmp >> 1);
3340   }
3341   return nbChannels;
3342 }
3343 
3344 /**
3345   * @brief  This function allows to get the channel number from channel instance.
3346   * @param  Instance DFSDM channel instance.
3347   * @retval Channel number.
3348   */
DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef * Instance)3349 static uint32_t DFSDM_GetChannelFromInstance(const DFSDM_Channel_TypeDef* Instance)
3350 {
3351   uint32_t channel;
3352 
3353   /* Get channel from instance */
3354   if(Instance == DFSDM1_Channel0)
3355   {
3356     channel = 0;
3357   }
3358   else if(Instance == DFSDM1_Channel1)
3359   {
3360     channel = 1;
3361   }
3362   else if(Instance == DFSDM1_Channel2)
3363   {
3364     channel = 2;
3365   }
3366   else if(Instance == DFSDM1_Channel3)
3367   {
3368     channel = 3;
3369   }
3370   else if(Instance == DFSDM1_Channel4)
3371   {
3372     channel = 4;
3373   }
3374   else if(Instance == DFSDM1_Channel5)
3375   {
3376     channel = 5;
3377   }
3378   else if(Instance == DFSDM1_Channel6)
3379   {
3380     channel = 6;
3381   }
3382   else /* DFSDM1_Channel7 */
3383   {
3384     channel = 7;
3385   }
3386 
3387   return channel;
3388 }
3389 
3390 /**
3391   * @brief  This function allows to really start regular conversion.
3392   * @param  hdfsdm_filter DFSDM filter handle.
3393   * @retval None
3394   */
DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3395 static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
3396 {
3397   /* Check regular trigger */
3398   if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
3399   {
3400     /* Software start of regular conversion */
3401     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3402   }
3403   else /* synchronous trigger */
3404   {
3405     /* Disable DFSDM filter */
3406     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3407 
3408     /* Set RSYNC bit in DFSDM_FLTCR1 register */
3409     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSYNC;
3410 
3411     /* Enable DFSDM  filter */
3412     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3413 
3414     /* If injected conversion was in progress, restart it */
3415     if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
3416     {
3417       if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3418       {
3419         hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3420       }
3421       /* Update remaining injected conversions */
3422       hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3423                                          hdfsdm_filter->InjectedChannelsNbr : 1U;
3424     }
3425   }
3426   /* Update DFSDM filter state */
3427   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3428                           HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
3429 }
3430 
3431 /**
3432   * @brief  This function allows to really stop regular conversion.
3433   * @param  hdfsdm_filter DFSDM filter handle.
3434   * @retval None
3435   */
DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3436 static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
3437 {
3438   /* Disable DFSDM filter */
3439   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3440 
3441   /* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
3442   if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3443   {
3444     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
3445   }
3446 
3447   /* Enable DFSDM filter */
3448   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3449 
3450   /* If injected conversion was in progress, restart it */
3451   if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
3452   {
3453     if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3454     {
3455       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3456     }
3457     /* Update remaining injected conversions */
3458     hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3459                                        hdfsdm_filter->InjectedChannelsNbr : 1U;
3460   }
3461 
3462   /* Update DFSDM filter state */
3463   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
3464                           HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
3465 }
3466 
3467 /**
3468   * @brief  This function allows to really start injected conversion.
3469   * @param  hdfsdm_filter DFSDM filter handle.
3470   * @retval None
3471   */
DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3472 static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
3473 {
3474   /* Check injected trigger */
3475   if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
3476   {
3477     /* Software start of injected conversion */
3478     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSWSTART;
3479   }
3480   else /* external or synchronous trigger */
3481   {
3482     /* Disable DFSDM filter */
3483     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3484 
3485     if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3486     {
3487       /* Set JSYNC bit in DFSDM_FLTCR1 register */
3488       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_JSYNC;
3489     }
3490     else /* external trigger */
3491     {
3492       /* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3493       hdfsdm_filter->Instance->FLTCR1 |= hdfsdm_filter->ExtTriggerEdge;
3494     }
3495 
3496     /* Enable DFSDM filter */
3497     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3498 
3499     /* If regular conversion was in progress, restart it */
3500     if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
3501        (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3502     {
3503       hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3504     }
3505   }
3506   /* Update DFSDM filter state */
3507   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
3508                          HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
3509 }
3510 
3511 /**
3512   * @brief  This function allows to really stop injected conversion.
3513   * @param  hdfsdm_filter DFSDM filter handle.
3514   * @retval None
3515   */
DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef * hdfsdm_filter)3516 static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
3517 {
3518   /* Disable DFSDM filter */
3519   hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
3520 
3521   /* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
3522   if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
3523   {
3524     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
3525   }
3526   else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
3527   {
3528     /* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
3529     hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
3530   }
3531   else
3532   {
3533     /* Nothing to do */
3534   }
3535 
3536   /* Enable DFSDM filter */
3537   hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_DFEN;
3538 
3539   /* If regular conversion was in progress, restart it */
3540   if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
3541      (hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
3542   {
3543     hdfsdm_filter->Instance->FLTCR1 |= DFSDM_FLTCR1_RSWSTART;
3544   }
3545 
3546   /* Update remaining injected conversions */
3547   hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
3548                                      hdfsdm_filter->InjectedChannelsNbr : 1U;
3549 
3550   /* Update DFSDM filter state */
3551   hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
3552                           HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
3553 }
3554 
3555 /**
3556   * @}
3557   */
3558 /* End of private functions --------------------------------------------------*/
3559 
3560 /**
3561   * @}
3562   */
3563 
3564 #endif /* HAL_DFSDM_MODULE_ENABLED */
3565 
3566 /**
3567   * @}
3568   */
3569