1 /**
2 ******************************************************************************
3 * @file system_stm32l5xx_ns.c
4 * @author MCD Application Team
5 * @brief CMSIS Cortex-M33 Device Peripheral Access Layer System Source File
6 * to be used in non-secure application when the system implements
7 * the TrustZone-M security.
8 *
9 * This file provides two functions and one global variable to be called from
10 * user application:
11 * - SystemInit(): This function is called at non-secure startup before
12 * branch to non-secure main program.
13 * This call is made inside the "startup_stm32l5xx.s" file.
14 *
15 * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
16 * by the user application to setup the SysTick
17 * timer or configure other parameters.
18 *
19 * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
20 * be called whenever the core clock is changed
21 * during program execution.
22 *
23 * After each device reset the MSI (4 MHz) is used as system clock source.
24 * Then SystemInit() function is called, in "startup_stm32l5xx.s" file, to
25 * configure the system clock before to branch to main secure program.
26 * Later, when non-secure SystemInit() function is called, in "startup_stm32l5xx.s"
27 * file, the system clock may have been updated from reset value by the main
28 * secure program.
29 *
30 ******************************************************************************
31 * @attention
32 *
33 * Copyright (c) 2019 STMicroelectronics.
34 * All rights reserved.
35 *
36 * This software is licensed under terms that can be found in the LICENSE file
37 * in the root directory of this software component.
38 * If no LICENSE file comes with this software, it is provided AS-IS.
39 *
40 ******************************************************************************
41 */
42
43 /** @addtogroup CMSIS
44 * @{
45 */
46
47 /** @addtogroup STM32L5xx_System
48 * @{
49 */
50
51 /** @addtogroup STM32L5xx_System_Private_Includes
52 * @{
53 */
54
55 #include "stm32l5xx.h"
56
57 /**
58 * @}
59 */
60
61 /** @addtogroup STM32L5xx_System_Private_TypesDefinitions
62 * @{
63 */
64
65 /**
66 * @}
67 */
68
69 /** @addtogroup STM32L5xx_System_Private_Defines
70 * @{
71 */
72
73 #if !defined (HSE_VALUE)
74 #define HSE_VALUE 16000000U /*!< Value of the External oscillator in Hz */
75 #endif /* HSE_VALUE */
76
77 #if !defined (MSI_VALUE)
78 #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
79 #endif /* MSI_VALUE */
80
81 #if !defined (HSI_VALUE)
82 #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
83 #endif /* HSI_VALUE */
84
85 /* Note: Following vector table addresses must be defined in line with linker
86 configuration. */
87 /*!< Uncomment the following line if you need to relocate the vector table
88 anywhere in Flash or Sram, else the vector table is kept at the automatic
89 remap of boot address selected */
90 /* #define USER_VECT_TAB_ADDRESS */
91
92 #if defined(USER_VECT_TAB_ADDRESS)
93 /*!< Uncomment the following line if you need to relocate your vector Table
94 in Sram else user remap will be done in Flash. */
95 /* #define VECT_TAB_SRAM */
96
97 #if defined(VECT_TAB_SRAM)
98 #define VECT_TAB_BASE_ADDRESS SRAM1_BASE_NS /*!< Vector Table base address field.
99 This value must be a multiple of 0x200. */
100 #define VECT_TAB_OFFSET 0x00018000U /*!< Vector Table base offset field.
101 This value must be a multiple of 0x200. */
102 #else
103 #define VECT_TAB_BASE_ADDRESS FLASH_BASE_NS /*!< Vector Table base address field.
104 This value must be a multiple of 0x200. */
105 #define VECT_TAB_OFFSET 0x00040000U /*!< Vector Table base offset field.
106 This value must be a multiple of 0x200. */
107 #endif /* VECT_TAB_SRAM */
108 #endif /* USER_VECT_TAB_ADDRESS */
109
110 /******************************************************************************/
111 /**
112 * @}
113 */
114
115 /** @addtogroup STM32L5xx_System_Private_Macros
116 * @{
117 */
118
119 /**
120 * @}
121 */
122
123 /** @addtogroup STM32L5xx_System_Private_Variables
124 * @{
125 */
126 /* The SystemCoreClock variable is updated in three ways:
127 1) by calling CMSIS function SystemCoreClockUpdate()
128 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
129 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
130 Note: If you use this function to configure the system clock; then there
131 is no need to call the 2 first functions listed above, since SystemCoreClock
132 variable is updated automatically.
133 */
134 uint32_t SystemCoreClock = 4000000U;
135
136 const uint8_t AHBPrescTable[16] = {0U, 0U, 0U, 0U, 0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U, 6U, 7U, 8U, 9U};
137 const uint8_t APBPrescTable[8] = {0U, 0U, 0U, 0U, 1U, 2U, 3U, 4U};
138 const uint32_t MSIRangeTable[16] = {100000U, 200000U, 400000U, 800000U, 1000000U, 2000000U, \
139 4000000U, 8000000U, 16000000U, 24000000U, 32000000U, 48000000U, \
140 0U, 0U, 0U, 0U}; /* MISRAC-2012: 0U for unexpected value */
141 /**
142 * @}
143 */
144
145 /** @addtogroup STM32L5xx_System_Private_FunctionPrototypes
146 * @{
147 */
148
149 /**
150 * @}
151 */
152
153 /** @addtogroup STM32L5xx_System_Private_Functions
154 * @{
155 */
156
157 /**
158 * @brief Setup the microcontroller system.
159 * @retval None
160 */
161
SystemInit(void)162 void SystemInit(void)
163 {
164 /* Vector table location and FPU setup done by secure application */
165
166 /* Configure the Vector Table location -------------------------------------*/
167 #if defined(USER_VECT_TAB_ADDRESS)
168 SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET;
169 #endif
170
171 /* Non-secure main application shall call SystemCoreClockUpdate() to update */
172 /* the SystemCoreClock variable to insure non-secure application relies on */
173 /* the initial clock reference set by secure application. */
174 }
175
176 /**
177 * @brief Update SystemCoreClock variable according to Clock Register Values.
178 * The SystemCoreClock variable contains the core clock (HCLK), it can
179 * be used by the user application to setup the SysTick timer or configure
180 * other parameters.
181 *
182 * @note From the non-secure application, the SystemCoreClock value is
183 * retrieved from the secure domain via a Non-Secure Callable function
184 * since the RCC peripheral may be protected with security attributes
185 * that prevent to compute the SystemCoreClock variable from the RCC
186 * peripheral registers.
187 *
188 * @note Each time the core clock (HCLK) changes, this function must be called
189 * to update SystemCoreClock variable value. Otherwise, any configuration
190 * based on this variable will be incorrect.
191 *
192 * @note - The system frequency computed by this function is not the real
193 * frequency in the chip. It is calculated based on the predefined
194 * constant and the selected clock source:
195 *
196 * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI_VALUE(*)
197 *
198 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
199 *
200 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
201 *
202 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(***)
203 * or HSI_VALUE(*) or MSI_VALUE(*) multiplied/divided by the PLL factors.
204 *
205 * (*) MSI_VALUE is a constant defined in stm32l5xx_hal.h file (default value
206 * 4 MHz) but the real value may vary depending on the variations
207 * in voltage and temperature.
208 *
209 * (**) HSI_VALUE is a constant defined in stm32l5xx_hal.h file (default value
210 * 16 MHz) but the real value may vary depending on the variations
211 * in voltage and temperature.
212 *
213 * (***) HSE_VALUE is a constant defined in stm32l5xx_hal.h file (default value
214 * 8 MHz), user has to ensure that HSE_VALUE is same as the real
215 * frequency of the crystal used. Otherwise, this function may
216 * have wrong result.
217 *
218 * - The result of this function could be not correct when using fractional
219 * value for HSE crystal.
220 *
221 * @retval None
222 */
SystemCoreClockUpdate(void)223 void SystemCoreClockUpdate(void)
224 {
225 /* Get the SystemCoreClock value from the secure domain */
226 SystemCoreClock = SECURE_SystemCoreClockUpdate();
227 }
228
229
230 /**
231 * @}
232 */
233
234 /**
235 * @}
236 */
237
238 /**
239 * @}
240 */
241
