1 /** 2 ****************************************************************************** 3 * @file stm32l5xx_hal_i2c.h 4 * @author MCD Application Team 5 * @brief Header file of I2C HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L5xx_HAL_I2C_H 21 #define STM32L5xx_HAL_I2C_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l5xx_hal_def.h" 29 30 /** @addtogroup STM32L5xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup I2C 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup I2C_Exported_Types I2C Exported Types 40 * @{ 41 */ 42 43 /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition 44 * @brief I2C Configuration Structure definition 45 * @{ 46 */ 47 typedef struct 48 { 49 uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. 50 This parameter calculated by referring to I2C initialization section 51 in Reference manual */ 52 53 uint32_t OwnAddress1; /*!< Specifies the first device own address. 54 This parameter can be a 7-bit or 10-bit address. */ 55 56 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. 57 This parameter can be a value of @ref I2C_ADDRESSING_MODE */ 58 59 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. 60 This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ 61 62 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected 63 This parameter can be a 7-bit address. */ 64 65 uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing 66 mode is selected. 67 This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ 68 69 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. 70 This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ 71 72 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. 73 This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ 74 75 } I2C_InitTypeDef; 76 77 /** 78 * @} 79 */ 80 81 /** @defgroup HAL_state_structure_definition HAL state structure definition 82 * @brief HAL State structure definition 83 * @note HAL I2C State value coding follow below described bitmap :\n 84 * b7-b6 Error information\n 85 * 00 : No Error\n 86 * 01 : Abort (Abort user request on going)\n 87 * 10 : Timeout\n 88 * 11 : Error\n 89 * b5 Peripheral initialization status\n 90 * 0 : Reset (peripheral not initialized)\n 91 * 1 : Init done (peripheral initialized and ready to use. HAL I2C Init function called)\n 92 * b4 (not used)\n 93 * x : Should be set to 0\n 94 * b3\n 95 * 0 : Ready or Busy (No Listen mode ongoing)\n 96 * 1 : Listen (peripheral in Address Listen Mode)\n 97 * b2 Intrinsic process state\n 98 * 0 : Ready\n 99 * 1 : Busy (peripheral busy with some configuration or internal operations)\n 100 * b1 Rx state\n 101 * 0 : Ready (no Rx operation ongoing)\n 102 * 1 : Busy (Rx operation ongoing)\n 103 * b0 Tx state\n 104 * 0 : Ready (no Tx operation ongoing)\n 105 * 1 : Busy (Tx operation ongoing) 106 * @{ 107 */ 108 typedef enum 109 { 110 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ 111 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ 112 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ 113 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ 114 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ 115 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ 116 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission 117 process is ongoing */ 118 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception 119 process is ongoing */ 120 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ 121 122 } HAL_I2C_StateTypeDef; 123 124 /** 125 * @} 126 */ 127 128 /** @defgroup HAL_mode_structure_definition HAL mode structure definition 129 * @brief HAL Mode structure definition 130 * @note HAL I2C Mode value coding follow below described bitmap :\n 131 * b7 (not used)\n 132 * x : Should be set to 0\n 133 * b6\n 134 * 0 : None\n 135 * 1 : Memory (HAL I2C communication is in Memory Mode)\n 136 * b5\n 137 * 0 : None\n 138 * 1 : Slave (HAL I2C communication is in Slave Mode)\n 139 * b4\n 140 * 0 : None\n 141 * 1 : Master (HAL I2C communication is in Master Mode)\n 142 * b3-b2-b1-b0 (not used)\n 143 * xxxx : Should be set to 0000 144 * @{ 145 */ 146 typedef enum 147 { 148 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ 149 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ 150 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ 151 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ 152 153 } HAL_I2C_ModeTypeDef; 154 155 /** 156 * @} 157 */ 158 159 /** @defgroup I2C_Error_Code_definition I2C Error Code definition 160 * @brief I2C Error Code definition 161 * @{ 162 */ 163 #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ 164 #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ 165 #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ 166 #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ 167 #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ 168 #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 169 #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ 170 #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ 171 #define HAL_I2C_ERROR_DMA_PARAM (0x00000080U) /*!< DMA Parameter Error */ 172 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 173 #define HAL_I2C_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ 174 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 175 #define HAL_I2C_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ 176 /** 177 * @} 178 */ 179 180 /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition 181 * @brief I2C handle Structure definition 182 * @{ 183 */ 184 typedef struct __I2C_HandleTypeDef 185 { 186 I2C_TypeDef *Instance; /*!< I2C registers base address */ 187 188 I2C_InitTypeDef Init; /*!< I2C communication parameters */ 189 190 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ 191 192 uint16_t XferSize; /*!< I2C transfer size */ 193 194 __IO uint16_t XferCount; /*!< I2C transfer counter */ 195 196 __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can 197 be a value of @ref I2C_XFEROPTIONS */ 198 199 __IO uint32_t PreviousState; /*!< I2C communication Previous state */ 200 201 HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); 202 /*!< I2C transfer IRQ handler function pointer */ 203 204 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ 205 206 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ 207 208 209 HAL_LockTypeDef Lock; /*!< I2C locking object */ 210 211 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ 212 213 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ 214 215 __IO uint32_t ErrorCode; /*!< I2C Error code */ 216 217 __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ 218 219 __IO uint32_t Devaddress; /*!< I2C Target device address */ 220 221 __IO uint32_t Memaddress; /*!< I2C Target memory address */ 222 223 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 224 void (* MasterTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 225 /*!< I2C Master Tx Transfer completed callback */ 226 void (* MasterRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 227 /*!< I2C Master Rx Transfer completed callback */ 228 void (* SlaveTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 229 /*!< I2C Slave Tx Transfer completed callback */ 230 void (* SlaveRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 231 /*!< I2C Slave Rx Transfer completed callback */ 232 void (* ListenCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 233 /*!< I2C Listen Complete callback */ 234 void (* MemTxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 235 /*!< I2C Memory Tx Transfer completed callback */ 236 void (* MemRxCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 237 /*!< I2C Memory Rx Transfer completed callback */ 238 void (* ErrorCallback)(struct __I2C_HandleTypeDef *hi2c); 239 /*!< I2C Error callback */ 240 void (* AbortCpltCallback)(struct __I2C_HandleTypeDef *hi2c); 241 /*!< I2C Abort callback */ 242 243 void (* AddrCallback)(struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 244 /*!< I2C Slave Address Match callback */ 245 246 void (* MspInitCallback)(struct __I2C_HandleTypeDef *hi2c); 247 /*!< I2C Msp Init callback */ 248 void (* MspDeInitCallback)(struct __I2C_HandleTypeDef *hi2c); 249 /*!< I2C Msp DeInit callback */ 250 251 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 252 } I2C_HandleTypeDef; 253 254 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 255 /** 256 * @brief HAL I2C Callback ID enumeration definition 257 */ 258 typedef enum 259 { 260 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< I2C Master Tx Transfer completed callback ID */ 261 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< I2C Master Rx Transfer completed callback ID */ 262 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< I2C Slave Tx Transfer completed callback ID */ 263 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< I2C Slave Rx Transfer completed callback ID */ 264 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< I2C Listen Complete callback ID */ 265 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U, /*!< I2C Memory Tx Transfer callback ID */ 266 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U, /*!< I2C Memory Rx Transfer completed callback ID */ 267 HAL_I2C_ERROR_CB_ID = 0x07U, /*!< I2C Error callback ID */ 268 HAL_I2C_ABORT_CB_ID = 0x08U, /*!< I2C Abort callback ID */ 269 270 HAL_I2C_MSPINIT_CB_ID = 0x09U, /*!< I2C Msp Init callback ID */ 271 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU /*!< I2C Msp DeInit callback ID */ 272 273 } HAL_I2C_CallbackIDTypeDef; 274 275 /** 276 * @brief HAL I2C Callback pointer definition 277 */ 278 typedef void (*pI2C_CallbackTypeDef)(I2C_HandleTypeDef *hi2c); 279 /*!< pointer to an I2C callback function */ 280 typedef void (*pI2C_AddrCallbackTypeDef)(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, 281 uint16_t AddrMatchCode); 282 /*!< pointer to an I2C Address Match callback function */ 283 284 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 285 /** 286 * @} 287 */ 288 289 /** 290 * @} 291 */ 292 /* Exported constants --------------------------------------------------------*/ 293 294 /** @defgroup I2C_Exported_Constants I2C Exported Constants 295 * @{ 296 */ 297 298 /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options 299 * @{ 300 */ 301 #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) 302 #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 303 #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) 304 #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 305 #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) 306 #define I2C_LAST_FRAME_NO_STOP ((uint32_t)I2C_SOFTEND_MODE) 307 308 /* List of XferOptions in usage of : 309 * 1- Restart condition in all use cases (direction change or not) 310 */ 311 #define I2C_OTHER_FRAME (0x000000AAU) 312 #define I2C_OTHER_AND_LAST_FRAME (0x0000AA00U) 313 /** 314 * @} 315 */ 316 317 /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode 318 * @{ 319 */ 320 #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) 321 #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) 322 /** 323 * @} 324 */ 325 326 /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode 327 * @{ 328 */ 329 #define I2C_DUALADDRESS_DISABLE (0x00000000U) 330 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN 331 /** 332 * @} 333 */ 334 335 /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks 336 * @{ 337 */ 338 #define I2C_OA2_NOMASK ((uint8_t)0x00U) 339 #define I2C_OA2_MASK01 ((uint8_t)0x01U) 340 #define I2C_OA2_MASK02 ((uint8_t)0x02U) 341 #define I2C_OA2_MASK03 ((uint8_t)0x03U) 342 #define I2C_OA2_MASK04 ((uint8_t)0x04U) 343 #define I2C_OA2_MASK05 ((uint8_t)0x05U) 344 #define I2C_OA2_MASK06 ((uint8_t)0x06U) 345 #define I2C_OA2_MASK07 ((uint8_t)0x07U) 346 /** 347 * @} 348 */ 349 350 /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode 351 * @{ 352 */ 353 #define I2C_GENERALCALL_DISABLE (0x00000000U) 354 #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN 355 /** 356 * @} 357 */ 358 359 /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode 360 * @{ 361 */ 362 #define I2C_NOSTRETCH_DISABLE (0x00000000U) 363 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH 364 /** 365 * @} 366 */ 367 368 /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size 369 * @{ 370 */ 371 #define I2C_MEMADD_SIZE_8BIT (0x00000001U) 372 #define I2C_MEMADD_SIZE_16BIT (0x00000002U) 373 /** 374 * @} 375 */ 376 377 /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View 378 * @{ 379 */ 380 #define I2C_DIRECTION_TRANSMIT (0x00000000U) 381 #define I2C_DIRECTION_RECEIVE (0x00000001U) 382 /** 383 * @} 384 */ 385 386 /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode 387 * @{ 388 */ 389 #define I2C_RELOAD_MODE I2C_CR2_RELOAD 390 #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND 391 #define I2C_SOFTEND_MODE (0x00000000U) 392 /** 393 * @} 394 */ 395 396 /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode 397 * @{ 398 */ 399 #define I2C_NO_STARTSTOP (0x00000000U) 400 #define I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) 401 #define I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) 402 #define I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) 403 /** 404 * @} 405 */ 406 407 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition 408 * @brief I2C Interrupt definition 409 * Elements values convention: 0xXXXXXXXX 410 * - XXXXXXXX : Interrupt control mask 411 * @{ 412 */ 413 #define I2C_IT_ERRI I2C_CR1_ERRIE 414 #define I2C_IT_TCI I2C_CR1_TCIE 415 #define I2C_IT_STOPI I2C_CR1_STOPIE 416 #define I2C_IT_NACKI I2C_CR1_NACKIE 417 #define I2C_IT_ADDRI I2C_CR1_ADDRIE 418 #define I2C_IT_RXI I2C_CR1_RXIE 419 #define I2C_IT_TXI I2C_CR1_TXIE 420 /** 421 * @} 422 */ 423 424 /** @defgroup I2C_Flag_definition I2C Flag definition 425 * @{ 426 */ 427 #define I2C_FLAG_TXE I2C_ISR_TXE 428 #define I2C_FLAG_TXIS I2C_ISR_TXIS 429 #define I2C_FLAG_RXNE I2C_ISR_RXNE 430 #define I2C_FLAG_ADDR I2C_ISR_ADDR 431 #define I2C_FLAG_AF I2C_ISR_NACKF 432 #define I2C_FLAG_STOPF I2C_ISR_STOPF 433 #define I2C_FLAG_TC I2C_ISR_TC 434 #define I2C_FLAG_TCR I2C_ISR_TCR 435 #define I2C_FLAG_BERR I2C_ISR_BERR 436 #define I2C_FLAG_ARLO I2C_ISR_ARLO 437 #define I2C_FLAG_OVR I2C_ISR_OVR 438 #define I2C_FLAG_PECERR I2C_ISR_PECERR 439 #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT 440 #define I2C_FLAG_ALERT I2C_ISR_ALERT 441 #define I2C_FLAG_BUSY I2C_ISR_BUSY 442 #define I2C_FLAG_DIR I2C_ISR_DIR 443 /** 444 * @} 445 */ 446 447 /** 448 * @} 449 */ 450 451 /* Exported macros -----------------------------------------------------------*/ 452 453 /** @defgroup I2C_Exported_Macros I2C Exported Macros 454 * @{ 455 */ 456 457 /** @brief Reset I2C handle state. 458 * @param __HANDLE__ specifies the I2C Handle. 459 * @retval None 460 */ 461 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 462 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \ 463 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \ 464 (__HANDLE__)->MspInitCallback = NULL; \ 465 (__HANDLE__)->MspDeInitCallback = NULL; \ 466 } while(0) 467 #else 468 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) 469 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 470 471 /** @brief Enable the specified I2C interrupt. 472 * @param __HANDLE__ specifies the I2C Handle. 473 * @param __INTERRUPT__ specifies the interrupt source to enable. 474 * This parameter can be one of the following values: 475 * @arg @ref I2C_IT_ERRI Errors interrupt enable 476 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 477 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 478 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 479 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 480 * @arg @ref I2C_IT_RXI RX interrupt enable 481 * @arg @ref I2C_IT_TXI TX interrupt enable 482 * 483 * @retval None 484 */ 485 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) 486 487 /** @brief Disable the specified I2C interrupt. 488 * @param __HANDLE__ specifies the I2C Handle. 489 * @param __INTERRUPT__ specifies the interrupt source to disable. 490 * This parameter can be one of the following values: 491 * @arg @ref I2C_IT_ERRI Errors interrupt enable 492 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 493 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 494 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 495 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 496 * @arg @ref I2C_IT_RXI RX interrupt enable 497 * @arg @ref I2C_IT_TXI TX interrupt enable 498 * 499 * @retval None 500 */ 501 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) 502 503 /** @brief Check whether the specified I2C interrupt source is enabled or not. 504 * @param __HANDLE__ specifies the I2C Handle. 505 * @param __INTERRUPT__ specifies the I2C interrupt source to check. 506 * This parameter can be one of the following values: 507 * @arg @ref I2C_IT_ERRI Errors interrupt enable 508 * @arg @ref I2C_IT_TCI Transfer complete interrupt enable 509 * @arg @ref I2C_IT_STOPI STOP detection interrupt enable 510 * @arg @ref I2C_IT_NACKI NACK received interrupt enable 511 * @arg @ref I2C_IT_ADDRI Address match interrupt enable 512 * @arg @ref I2C_IT_RXI RX interrupt enable 513 * @arg @ref I2C_IT_TXI TX interrupt enable 514 * 515 * @retval The new state of __INTERRUPT__ (SET or RESET). 516 */ 517 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & \ 518 (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 519 520 /** @brief Check whether the specified I2C flag is set or not. 521 * @param __HANDLE__ specifies the I2C Handle. 522 * @param __FLAG__ specifies the flag to check. 523 * This parameter can be one of the following values: 524 * @arg @ref I2C_FLAG_TXE Transmit data register empty 525 * @arg @ref I2C_FLAG_TXIS Transmit interrupt status 526 * @arg @ref I2C_FLAG_RXNE Receive data register not empty 527 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 528 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 529 * @arg @ref I2C_FLAG_STOPF STOP detection flag 530 * @arg @ref I2C_FLAG_TC Transfer complete (master mode) 531 * @arg @ref I2C_FLAG_TCR Transfer complete reload 532 * @arg @ref I2C_FLAG_BERR Bus error 533 * @arg @ref I2C_FLAG_ARLO Arbitration lost 534 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 535 * @arg @ref I2C_FLAG_PECERR PEC error in reception 536 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 537 * @arg @ref I2C_FLAG_ALERT SMBus alert 538 * @arg @ref I2C_FLAG_BUSY Bus busy 539 * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) 540 * 541 * @retval The new state of __FLAG__ (SET or RESET). 542 */ 543 #define I2C_FLAG_MASK (0x0001FFFFU) 544 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & \ 545 (__FLAG__)) == (__FLAG__)) ? SET : RESET) 546 547 /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. 548 * @param __HANDLE__ specifies the I2C Handle. 549 * @param __FLAG__ specifies the flag to clear. 550 * This parameter can be any combination of the following values: 551 * @arg @ref I2C_FLAG_TXE Transmit data register empty 552 * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) 553 * @arg @ref I2C_FLAG_AF Acknowledge failure received flag 554 * @arg @ref I2C_FLAG_STOPF STOP detection flag 555 * @arg @ref I2C_FLAG_BERR Bus error 556 * @arg @ref I2C_FLAG_ARLO Arbitration lost 557 * @arg @ref I2C_FLAG_OVR Overrun/Underrun 558 * @arg @ref I2C_FLAG_PECERR PEC error in reception 559 * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag 560 * @arg @ref I2C_FLAG_ALERT SMBus alert 561 * 562 * @retval None 563 */ 564 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? \ 565 ((__HANDLE__)->Instance->ISR |= (__FLAG__)) : \ 566 ((__HANDLE__)->Instance->ICR = (__FLAG__))) 567 568 /** @brief Enable the specified I2C peripheral. 569 * @param __HANDLE__ specifies the I2C Handle. 570 * @retval None 571 */ 572 #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 573 574 /** @brief Disable the specified I2C peripheral. 575 * @param __HANDLE__ specifies the I2C Handle. 576 * @retval None 577 */ 578 #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) 579 580 /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. 581 * @param __HANDLE__ specifies the I2C Handle. 582 * @retval None 583 */ 584 #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) 585 /** 586 * @} 587 */ 588 589 /* Include I2C HAL Extended module */ 590 #include "stm32l5xx_hal_i2c_ex.h" 591 592 /* Exported functions --------------------------------------------------------*/ 593 /** @addtogroup I2C_Exported_Functions 594 * @{ 595 */ 596 597 /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions 598 * @{ 599 */ 600 /* Initialization and de-initialization functions******************************/ 601 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); 602 HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); 603 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); 604 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); 605 606 /* Callbacks Register/UnRegister functions ***********************************/ 607 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) 608 HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID, 609 pI2C_CallbackTypeDef pCallback); 610 HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef CallbackID); 611 612 HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pCallback); 613 HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c); 614 #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ 615 /** 616 * @} 617 */ 618 619 /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions 620 * @{ 621 */ 622 /* IO operation functions ****************************************************/ 623 /******* Blocking mode: Polling */ 624 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 625 uint16_t Size, uint32_t Timeout); 626 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 627 uint16_t Size, uint32_t Timeout); 628 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 629 uint32_t Timeout); 630 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 631 uint32_t Timeout); 632 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 633 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 634 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 635 uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); 636 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, 637 uint32_t Timeout); 638 639 /******* Non-Blocking mode: Interrupt */ 640 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 641 uint16_t Size); 642 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 643 uint16_t Size); 644 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 645 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 646 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 647 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 648 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 649 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 650 651 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 652 uint16_t Size, uint32_t XferOptions); 653 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 654 uint16_t Size, uint32_t XferOptions); 655 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 656 uint32_t XferOptions); 657 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 658 uint32_t XferOptions); 659 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); 660 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); 661 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); 662 663 /******* Non-Blocking mode: DMA */ 664 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 665 uint16_t Size); 666 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 667 uint16_t Size); 668 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 669 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); 670 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 671 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 672 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, 673 uint16_t MemAddSize, uint8_t *pData, uint16_t Size); 674 675 HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 676 uint16_t Size, uint32_t XferOptions); 677 HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, 678 uint16_t Size, uint32_t XferOptions); 679 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 680 uint32_t XferOptions); 681 HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, 682 uint32_t XferOptions); 683 /** 684 * @} 685 */ 686 687 /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks 688 * @{ 689 */ 690 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ 691 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); 692 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); 693 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); 694 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); 695 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); 696 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); 697 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); 698 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); 699 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); 700 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); 701 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); 702 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); 703 /** 704 * @} 705 */ 706 707 /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions 708 * @{ 709 */ 710 /* Peripheral State, Mode and Error functions *********************************/ 711 HAL_I2C_StateTypeDef HAL_I2C_GetState(const I2C_HandleTypeDef *hi2c); 712 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(const I2C_HandleTypeDef *hi2c); 713 uint32_t HAL_I2C_GetError(const I2C_HandleTypeDef *hi2c); 714 715 /** 716 * @} 717 */ 718 719 /** 720 * @} 721 */ 722 723 /* Private constants ---------------------------------------------------------*/ 724 /** @defgroup I2C_Private_Constants I2C Private Constants 725 * @{ 726 */ 727 728 /** 729 * @} 730 */ 731 732 /* Private macros ------------------------------------------------------------*/ 733 /** @defgroup I2C_Private_Macro I2C Private Macros 734 * @{ 735 */ 736 737 #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ 738 ((MODE) == I2C_ADDRESSINGMODE_10BIT)) 739 740 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ 741 ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) 742 743 #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ 744 ((MASK) == I2C_OA2_MASK01) || \ 745 ((MASK) == I2C_OA2_MASK02) || \ 746 ((MASK) == I2C_OA2_MASK03) || \ 747 ((MASK) == I2C_OA2_MASK04) || \ 748 ((MASK) == I2C_OA2_MASK05) || \ 749 ((MASK) == I2C_OA2_MASK06) || \ 750 ((MASK) == I2C_OA2_MASK07)) 751 752 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ 753 ((CALL) == I2C_GENERALCALL_ENABLE)) 754 755 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ 756 ((STRETCH) == I2C_NOSTRETCH_ENABLE)) 757 758 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ 759 ((SIZE) == I2C_MEMADD_SIZE_16BIT)) 760 761 #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ 762 ((MODE) == I2C_AUTOEND_MODE) || \ 763 ((MODE) == I2C_SOFTEND_MODE)) 764 765 #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ 766 ((REQUEST) == I2C_GENERATE_START_READ) || \ 767 ((REQUEST) == I2C_GENERATE_START_WRITE) || \ 768 ((REQUEST) == I2C_NO_STARTSTOP)) 769 770 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ 771 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ 772 ((REQUEST) == I2C_NEXT_FRAME) || \ 773 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ 774 ((REQUEST) == I2C_LAST_FRAME) || \ 775 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \ 776 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST)) 777 778 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \ 779 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME)) 780 781 #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= \ 782 (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | \ 783 I2C_CR2_NBYTES | I2C_CR2_RELOAD | \ 784 I2C_CR2_RD_WRN))) 785 786 #define I2C_GET_ADDR_MATCH(__HANDLE__) ((uint16_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) \ 787 >> 16U)) 788 #define I2C_GET_DIR(__HANDLE__) ((uint8_t)(((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) \ 789 >> 16U)) 790 #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) 791 #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1)) 792 #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((uint16_t)((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2)) 793 794 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) 795 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) 796 797 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & \ 798 (uint16_t)(0xFF00U))) >> 8U))) 799 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) 800 801 #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? \ 802 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ 803 (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & \ 804 (~I2C_CR2_RD_WRN)) : \ 805 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | \ 806 (I2C_CR2_ADD10) | (I2C_CR2_START) | \ 807 (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN))) 808 809 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == \ 810 ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) 811 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) 812 /** 813 * @} 814 */ 815 816 /* Private Functions ---------------------------------------------------------*/ 817 /** @defgroup I2C_Private_Functions I2C Private Functions 818 * @{ 819 */ 820 /* Private functions are defined in stm32l5xx_hal_i2c.c file */ 821 /** 822 * @} 823 */ 824 825 /** 826 * @} 827 */ 828 829 /** 830 * @} 831 */ 832 833 #ifdef __cplusplus 834 } 835 #endif 836 837 838 #endif /* STM32L5xx_HAL_I2C_H */ 839
