1 /**
2 ******************************************************************************
3 * @file stm32l4xx_ll_lpuart.h
4 * @author MCD Application Team
5 * @brief Header file of LPUART LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.
11 *
12 * This software is licensed under terms that can be found in the LICENSE file
13 * in the root directory of this software component.
14 * If no LICENSE file comes with this software, it is provided AS-IS.
15 *
16 ******************************************************************************
17 */
18
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef STM32L4xx_LL_LPUART_H
21 #define STM32L4xx_LL_LPUART_H
22
23 #ifdef __cplusplus
24 extern "C" {
25 #endif
26
27 /* Includes ------------------------------------------------------------------*/
28 #include "stm32l4xx.h"
29
30 /** @addtogroup STM32L4xx_LL_Driver
31 * @{
32 */
33
34 #if defined (LPUART1)
35
36 /** @defgroup LPUART_LL LPUART
37 * @{
38 */
39
40 /* Private types -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 #if defined(USART_PRESC_PRESCALER)
43 /** @defgroup LPUART_LL_Private_Variables LPUART Private Variables
44 * @{
45 */
46 /* Array used to get the LPUART prescaler division decimal values versus @ref LPUART_LL_EC_PRESCALER values */
47 static const uint16_t LPUART_PRESCALER_TAB[] =
48 {
49 (uint16_t)1,
50 (uint16_t)2,
51 (uint16_t)4,
52 (uint16_t)6,
53 (uint16_t)8,
54 (uint16_t)10,
55 (uint16_t)12,
56 (uint16_t)16,
57 (uint16_t)32,
58 (uint16_t)64,
59 (uint16_t)128,
60 (uint16_t)256
61 };
62 /**
63 * @}
64 */
65 #endif /* USART_PRESC_PRESCALER */
66
67 /* Private constants ---------------------------------------------------------*/
68 /** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
69 * @{
70 */
71 /* Defines used in Baud Rate related macros and corresponding register setting computation */
72 #define LPUART_LPUARTDIV_FREQ_MUL 256U
73 #define LPUART_BRR_MASK 0x000FFFFFU
74 #define LPUART_BRR_MIN_VALUE 0x00000300U
75 /**
76 * @}
77 */
78
79
80 /* Private macros ------------------------------------------------------------*/
81 #if defined(USE_FULL_LL_DRIVER)
82 /** @defgroup LPUART_LL_Private_Macros LPUART Private Macros
83 * @{
84 */
85 /**
86 * @}
87 */
88 #endif /*USE_FULL_LL_DRIVER*/
89
90 /* Exported types ------------------------------------------------------------*/
91 #if defined(USE_FULL_LL_DRIVER)
92 /** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures
93 * @{
94 */
95
96 /**
97 * @brief LL LPUART Init Structure definition
98 */
99 typedef struct
100 {
101 #if defined(USART_PRESC_PRESCALER)
102 uint32_t PrescalerValue; /*!< Specifies the Prescaler to compute the communication baud rate.
103 This parameter can be a value of @ref LPUART_LL_EC_PRESCALER.
104
105 This feature can be modified afterwards using unitary
106 function @ref LL_LPUART_SetPrescaler().*/
107
108 #endif /* USART_PRESC_PRESCALER */
109 uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate.
110
111 This feature can be modified afterwards using unitary
112 function @ref LL_LPUART_SetBaudRate().*/
113
114 uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
115 This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH.
116
117 This feature can be modified afterwards using unitary
118 function @ref LL_LPUART_SetDataWidth().*/
119
120 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
121 This parameter can be a value of @ref LPUART_LL_EC_STOPBITS.
122
123 This feature can be modified afterwards using unitary
124 function @ref LL_LPUART_SetStopBitsLength().*/
125
126 uint32_t Parity; /*!< Specifies the parity mode.
127 This parameter can be a value of @ref LPUART_LL_EC_PARITY.
128
129 This feature can be modified afterwards using unitary
130 function @ref LL_LPUART_SetParity().*/
131
132 uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
133 This parameter can be a value of @ref LPUART_LL_EC_DIRECTION.
134
135 This feature can be modified afterwards using unitary
136 function @ref LL_LPUART_SetTransferDirection().*/
137
138 uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
139 This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL.
140
141 This feature can be modified afterwards using unitary
142 function @ref LL_LPUART_SetHWFlowCtrl().*/
143
144 } LL_LPUART_InitTypeDef;
145
146 /**
147 * @}
148 */
149 #endif /* USE_FULL_LL_DRIVER */
150
151 /* Exported constants --------------------------------------------------------*/
152 /** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants
153 * @{
154 */
155
156 /** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines
157 * @brief Flags defines which can be used with LL_LPUART_WriteReg function
158 * @{
159 */
160 #define LL_LPUART_ICR_PECF USART_ICR_PECF /*!< Parity error clear flag */
161 #define LL_LPUART_ICR_FECF USART_ICR_FECF /*!< Framing error clear flag */
162 #define LL_LPUART_ICR_NCF USART_ICR_NECF /*!< Noise error detected clear flag */
163 #define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error clear flag */
164 #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected clear flag */
165 #define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete clear flag */
166 #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS clear flag */
167 #define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match clear flag */
168 #define LL_LPUART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode clear flag */
169 /**
170 * @}
171 */
172
173 /** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines
174 * @brief Flags defines which can be used with LL_LPUART_ReadReg function
175 * @{
176 */
177 #define LL_LPUART_ISR_PE USART_ISR_PE /*!< Parity error flag */
178 #define LL_LPUART_ISR_FE USART_ISR_FE /*!< Framing error flag */
179 #define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag */
180 #define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */
181 #define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */
182 #if defined(USART_CR1_FIFOEN)
183 #define LL_LPUART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE /*!< Read data register or RX FIFO not empty flag */
184 #else
185 #define LL_LPUART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */
186 #endif /* USART_CR1_FIFOEN */
187 #define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */
188 #if defined(USART_CR1_FIFOEN)
189 #define LL_LPUART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF /*!< Transmit data register empty or TX FIFO Not Full flag*/
190 #else
191 #define LL_LPUART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */
192 #endif /* USART_CR1_FIFOEN */
193 #define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */
194 #define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
195 #define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */
196 #define LL_LPUART_ISR_CMF USART_ISR_CMF /*!< Character match flag */
197 #define LL_LPUART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */
198 #define LL_LPUART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */
199 #define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */
200 #define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */
201 #define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */
202 #if defined(USART_CR1_FIFOEN)
203 #define LL_LPUART_ISR_TXFE USART_ISR_TXFE /*!< TX FIFO empty flag */
204 #define LL_LPUART_ISR_RXFF USART_ISR_RXFF /*!< RX FIFO full flag */
205 #define LL_LPUART_ISR_RXFT USART_ISR_RXFT /*!< RX FIFO threshold flag */
206 #define LL_LPUART_ISR_TXFT USART_ISR_TXFT /*!< TX FIFO threshold flag */
207 #endif /* USART_CR1_FIFOEN */
208 /**
209 * @}
210 */
211
212 /** @defgroup LPUART_LL_EC_IT IT Defines
213 * @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions
214 * @{
215 */
216 #define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
217 #if defined(USART_CR1_FIFOEN)
218 #define LL_LPUART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE /*!< Read data register and RXFIFO not empty
219 interrupt enable */
220 #else
221 #define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
222 #endif /* USART_CR1_FIFOEN */
223 #define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
224 #if defined(USART_CR1_FIFOEN)
225 #define LL_LPUART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE /*!< Transmit data register empty and TX FIFO
226 not full interrupt enable */
227 #else
228 #define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
229 #endif /* USART_CR1_FIFOEN */
230 #define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
231 #define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */
232 #if defined(USART_CR1_FIFOEN)
233 #define LL_LPUART_CR1_TXFEIE USART_CR1_TXFEIE /*!< TX FIFO empty interrupt enable */
234 #define LL_LPUART_CR1_RXFFIE USART_CR1_RXFFIE /*!< RX FIFO full interrupt enable */
235 #endif /* USART_CR1_FIFOEN */
236 #define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
237 #define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
238 #define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */
239 #if defined(USART_CR1_FIFOEN)
240 #define LL_LPUART_CR3_TXFTIE USART_CR3_TXFTIE /*!< TX FIFO threshold interrupt enable */
241 #define LL_LPUART_CR3_RXFTIE USART_CR3_RXFTIE /*!< RX FIFO threshold interrupt enable */
242 #endif /* USART_CR1_FIFOEN */
243 /**
244 * @}
245 */
246 #if defined(USART_CR1_FIFOEN)
247
248 /** @defgroup LPUART_LL_EC_FIFOTHRESHOLD FIFO Threshold
249 * @{
250 */
251 #define LL_LPUART_FIFOTHRESHOLD_1_8 0x00000000U /*!< FIFO reaches 1/8 of its depth */
252 #define LL_LPUART_FIFOTHRESHOLD_1_4 0x00000001U /*!< FIFO reaches 1/4 of its depth */
253 #define LL_LPUART_FIFOTHRESHOLD_1_2 0x00000002U /*!< FIFO reaches 1/2 of its depth */
254 #define LL_LPUART_FIFOTHRESHOLD_3_4 0x00000003U /*!< FIFO reaches 3/4 of its depth */
255 #define LL_LPUART_FIFOTHRESHOLD_7_8 0x00000004U /*!< FIFO reaches 7/8 of its depth */
256 #define LL_LPUART_FIFOTHRESHOLD_8_8 0x00000005U /*!< FIFO becomes empty for TX and full for RX */
257 /**
258 * @}
259 */
260 #endif /* USART_CR1_FIFOEN */
261
262 /** @defgroup LPUART_LL_EC_DIRECTION Direction
263 * @{
264 */
265 #define LL_LPUART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
266 #define LL_LPUART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
267 #define LL_LPUART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
268 #define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
269 /**
270 * @}
271 */
272
273 /** @defgroup LPUART_LL_EC_PARITY Parity Control
274 * @{
275 */
276 #define LL_LPUART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
277 #define LL_LPUART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
278 #define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
279 /**
280 * @}
281 */
282
283 /** @defgroup LPUART_LL_EC_WAKEUP Wakeup
284 * @{
285 */
286 #define LL_LPUART_WAKEUP_IDLELINE 0x00000000U /*!< LPUART wake up from Mute mode on Idle Line */
287 #define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< LPUART wake up from Mute mode on Address Mark */
288 /**
289 * @}
290 */
291
292 /** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth
293 * @{
294 */
295 #define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */
296 #define LL_LPUART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
297 #define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
298 /**
299 * @}
300 */
301 #if defined(USART_PRESC_PRESCALER)
302
303 /** @defgroup LPUART_LL_EC_PRESCALER Clock Source Prescaler
304 * @{
305 */
306 #define LL_LPUART_PRESCALER_DIV1 0x00000000U /*!< Input clock not divided */
307 #define LL_LPUART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0) /*!< Input clock divided by 2 */
308 #define LL_LPUART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1) /*!< Input clock divided by 4 */
309 #define LL_LPUART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 |\
310 USART_PRESC_PRESCALER_0) /*!< Input clock divided by 6 */
311 #define LL_LPUART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2) /*!< Input clock divided by 8 */
312 #define LL_LPUART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 |\
313 USART_PRESC_PRESCALER_0) /*!< Input clock divided by 10 */
314 #define LL_LPUART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 |\
315 USART_PRESC_PRESCALER_1) /*!< Input clock divided by 12 */
316 #define LL_LPUART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 |\
317 USART_PRESC_PRESCALER_1 |\
318 USART_PRESC_PRESCALER_0) /*!< Input clock divided by 16 */
319 #define LL_LPUART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3) /*!< Input clock divided by 32 */
320 #define LL_LPUART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 |\
321 USART_PRESC_PRESCALER_0) /*!< Input clock divided by 64 */
322 #define LL_LPUART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 |\
323 USART_PRESC_PRESCALER_1) /*!< Input clock divided by 128 */
324 #define LL_LPUART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 |\
325 USART_PRESC_PRESCALER_1 |\
326 USART_PRESC_PRESCALER_0) /*!< Input clock divided by 256 */
327 /**
328 * @}
329 */
330 #endif /* USART_PRESC_PRESCALER */
331
332 /** @defgroup LPUART_LL_EC_STOPBITS Stop Bits
333 * @{
334 */
335 #define LL_LPUART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
336 #define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
337 /**
338 * @}
339 */
340
341 /** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap
342 * @{
343 */
344 #define LL_LPUART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */
345 #define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */
346 /**
347 * @}
348 */
349
350 /** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion
351 * @{
352 */
353 #define LL_LPUART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */
354 #define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */
355 /**
356 * @}
357 */
358
359 /** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
360 * @{
361 */
362 #define LL_LPUART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */
363 #define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */
364 /**
365 * @}
366 */
367
368 /** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion
369 * @{
370 */
371 #define LL_LPUART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received
372 in positive/direct logic. (1=H, 0=L) */
373 #define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received
374 in negative/inverse logic. (1=L, 0=H).
375 The parity bit is also inverted. */
376 /**
377 * @}
378 */
379
380 /** @defgroup LPUART_LL_EC_BITORDER Bit Order
381 * @{
382 */
383 #define LL_LPUART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first,
384 following the start bit */
385 #define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first,
386 following the start bit */
387 /**
388 * @}
389 */
390
391 /** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection
392 * @{
393 */
394 #define LL_LPUART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */
395 #define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */
396 /**
397 * @}
398 */
399
400 /** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control
401 * @{
402 */
403 #define LL_LPUART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
404 #define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested
405 when there is space in the receive buffer */
406 #define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted
407 when the nCTS input is asserted (tied to 0)*/
408 #define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
409 /**
410 * @}
411 */
412
413 /** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation
414 * @{
415 */
416 #define LL_LPUART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake up active on address match */
417 #define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */
418 #define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */
419 /**
420 * @}
421 */
422
423 /** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity
424 * @{
425 */
426 #define LL_LPUART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */
427 #define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */
428 /**
429 * @}
430 */
431
432 /** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data
433 * @{
434 */
435 #define LL_LPUART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */
436 #define LL_LPUART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */
437 /**
438 * @}
439 */
440
441 /**
442 * @}
443 */
444
445 /* Exported macro ------------------------------------------------------------*/
446 /** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros
447 * @{
448 */
449
450 /** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros
451 * @{
452 */
453
454 /**
455 * @brief Write a value in LPUART register
456 * @param __INSTANCE__ LPUART Instance
457 * @param __REG__ Register to be written
458 * @param __VALUE__ Value to be written in the register
459 * @retval None
460 */
461 #define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
462
463 /**
464 * @brief Read a value in LPUART register
465 * @param __INSTANCE__ LPUART Instance
466 * @param __REG__ Register to be read
467 * @retval Register value
468 */
469 #define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
470 /**
471 * @}
472 */
473
474 /** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros
475 * @{
476 */
477
478 /**
479 * @brief Compute LPUARTDIV value according to Peripheral Clock and
480 * expected Baud Rate (20-bit value of LPUARTDIV is returned)
481 * @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
482 @if USART_PRESC_PRESCALER
483 * @param __PRESCALER__ This parameter can be one of the following values:
484 * @arg @ref LL_LPUART_PRESCALER_DIV1
485 * @arg @ref LL_LPUART_PRESCALER_DIV2
486 * @arg @ref LL_LPUART_PRESCALER_DIV4
487 * @arg @ref LL_LPUART_PRESCALER_DIV6
488 * @arg @ref LL_LPUART_PRESCALER_DIV8
489 * @arg @ref LL_LPUART_PRESCALER_DIV10
490 * @arg @ref LL_LPUART_PRESCALER_DIV12
491 * @arg @ref LL_LPUART_PRESCALER_DIV16
492 * @arg @ref LL_LPUART_PRESCALER_DIV32
493 * @arg @ref LL_LPUART_PRESCALER_DIV64
494 * @arg @ref LL_LPUART_PRESCALER_DIV128
495 * @arg @ref LL_LPUART_PRESCALER_DIV256
496 @endif
497 * @param __BAUDRATE__ Baud Rate value to achieve
498 * @retval LPUARTDIV value to be used for BRR register filling
499 */
500 #if defined(USART_PRESC_PRESCALER)
501 #define __LL_LPUART_DIV(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) (uint32_t)\
502 ((((((uint64_t)(__PERIPHCLK__)/(uint64_t)(LPUART_PRESCALER_TAB[(uint16_t)(__PRESCALER__)]))\
503 * LPUART_LPUARTDIV_FREQ_MUL) + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__)) & LPUART_BRR_MASK)
504 #else
505 #define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (uint32_t)\
506 (((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + (uint32_t)((__BAUDRATE__)/2U))/(__BAUDRATE__)) \
507 & LPUART_BRR_MASK)
508 #endif /* USART_PRESC_PRESCALER */
509
510 /**
511 * @}
512 */
513
514 /**
515 * @}
516 */
517
518 /* Exported functions --------------------------------------------------------*/
519 /** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions
520 * @{
521 */
522
523 /** @defgroup LPUART_LL_EF_Configuration Configuration functions
524 * @{
525 */
526
527 /**
528 * @brief LPUART Enable
529 * @rmtoll CR1 UE LL_LPUART_Enable
530 * @param LPUARTx LPUART Instance
531 * @retval None
532 */
LL_LPUART_Enable(USART_TypeDef * LPUARTx)533 __STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
534 {
535 SET_BIT(LPUARTx->CR1, USART_CR1_UE);
536 }
537
538 /**
539 * @brief LPUART Disable
540 * @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately,
541 * and current operations are discarded. The configuration of the LPUART is kept, but all the status
542 * flags, in the LPUARTx_ISR are set to their default values.
543 * @note In order to go into low-power mode without generating errors on the line,
544 * the TE bit must be reset before and the software must wait
545 * for the TC bit in the LPUART_ISR to be set before resetting the UE bit.
546 * The DMA requests are also reset when UE = 0 so the DMA channel must
547 * be disabled before resetting the UE bit.
548 * @rmtoll CR1 UE LL_LPUART_Disable
549 * @param LPUARTx LPUART Instance
550 * @retval None
551 */
LL_LPUART_Disable(USART_TypeDef * LPUARTx)552 __STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
553 {
554 CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
555 }
556
557 /**
558 * @brief Indicate if LPUART is enabled
559 * @rmtoll CR1 UE LL_LPUART_IsEnabled
560 * @param LPUARTx LPUART Instance
561 * @retval State of bit (1 or 0).
562 */
LL_LPUART_IsEnabled(const USART_TypeDef * LPUARTx)563 __STATIC_INLINE uint32_t LL_LPUART_IsEnabled(const USART_TypeDef *LPUARTx)
564 {
565 return ((READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)) ? 1UL : 0UL);
566 }
567
568 #if defined(USART_CR1_FIFOEN)
569 /**
570 * @brief FIFO Mode Enable
571 * @rmtoll CR1 FIFOEN LL_LPUART_EnableFIFO
572 * @param LPUARTx LPUART Instance
573 * @retval None
574 */
LL_LPUART_EnableFIFO(USART_TypeDef * LPUARTx)575 __STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx)
576 {
577 SET_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
578 }
579
580 /**
581 * @brief FIFO Mode Disable
582 * @rmtoll CR1 FIFOEN LL_LPUART_DisableFIFO
583 * @param LPUARTx LPUART Instance
584 * @retval None
585 */
LL_LPUART_DisableFIFO(USART_TypeDef * LPUARTx)586 __STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx)
587 {
588 CLEAR_BIT(LPUARTx->CR1, USART_CR1_FIFOEN);
589 }
590
591 /**
592 * @brief Indicate if FIFO Mode is enabled
593 * @rmtoll CR1 FIFOEN LL_LPUART_IsEnabledFIFO
594 * @param LPUARTx LPUART Instance
595 * @retval State of bit (1 or 0).
596 */
LL_LPUART_IsEnabledFIFO(const USART_TypeDef * LPUARTx)597 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(const USART_TypeDef *LPUARTx)
598 {
599 return ((READ_BIT(LPUARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)) ? 1UL : 0UL);
600 }
601
602 /**
603 * @brief Configure TX FIFO Threshold
604 * @rmtoll CR3 TXFTCFG LL_LPUART_SetTXFIFOThreshold
605 * @param LPUARTx LPUART Instance
606 * @param Threshold This parameter can be one of the following values:
607 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
608 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
609 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
610 * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
611 * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
612 * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
613 * @retval None
614 */
LL_LPUART_SetTXFIFOThreshold(USART_TypeDef * LPUARTx,uint32_t Threshold)615 __STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
616 {
617 ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos);
618 }
619
620 /**
621 * @brief Return TX FIFO Threshold Configuration
622 * @rmtoll CR3 TXFTCFG LL_LPUART_GetTXFIFOThreshold
623 * @param LPUARTx LPUART Instance
624 * @retval Returned value can be one of the following values:
625 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
626 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
627 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
628 * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
629 * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
630 * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
631 */
LL_LPUART_GetTXFIFOThreshold(const USART_TypeDef * LPUARTx)632 __STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(const USART_TypeDef *LPUARTx)
633 {
634 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos);
635 }
636
637 /**
638 * @brief Configure RX FIFO Threshold
639 * @rmtoll CR3 RXFTCFG LL_LPUART_SetRXFIFOThreshold
640 * @param LPUARTx LPUART Instance
641 * @param Threshold This parameter can be one of the following values:
642 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
643 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
644 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
645 * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
646 * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
647 * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
648 * @retval None
649 */
LL_LPUART_SetRXFIFOThreshold(USART_TypeDef * LPUARTx,uint32_t Threshold)650 __STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold)
651 {
652 ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos);
653 }
654
655 /**
656 * @brief Return RX FIFO Threshold Configuration
657 * @rmtoll CR3 RXFTCFG LL_LPUART_GetRXFIFOThreshold
658 * @param LPUARTx LPUART Instance
659 * @retval Returned value can be one of the following values:
660 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
661 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
662 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
663 * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
664 * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
665 * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
666 */
LL_LPUART_GetRXFIFOThreshold(const USART_TypeDef * LPUARTx)667 __STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(const USART_TypeDef *LPUARTx)
668 {
669 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos);
670 }
671
672 /**
673 * @brief Configure TX and RX FIFOs Threshold
674 * @rmtoll CR3 TXFTCFG LL_LPUART_ConfigFIFOsThreshold\n
675 * CR3 RXFTCFG LL_LPUART_ConfigFIFOsThreshold
676 * @param LPUARTx LPUART Instance
677 * @param TXThreshold This parameter can be one of the following values:
678 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
679 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
680 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
681 * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
682 * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
683 * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
684 * @param RXThreshold This parameter can be one of the following values:
685 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8
686 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4
687 * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2
688 * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4
689 * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8
690 * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8
691 * @retval None
692 */
LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef * LPUARTx,uint32_t TXThreshold,uint32_t RXThreshold)693 __STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold)
694 {
695 ATOMIC_MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, (TXThreshold << USART_CR3_TXFTCFG_Pos) | \
696 (RXThreshold << USART_CR3_RXFTCFG_Pos));
697 }
698 #endif /* USART_CR1_FIFOEN */
699
700 /**
701 * @brief LPUART enabled in STOP Mode
702 * @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that
703 * LPUART clock selection is HSI or LSE in RCC.
704 * @rmtoll CR1 UESM LL_LPUART_EnableInStopMode
705 * @param LPUARTx LPUART Instance
706 * @retval None
707 */
LL_LPUART_EnableInStopMode(USART_TypeDef * LPUARTx)708 __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
709 {
710 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
711 }
712
713 /**
714 * @brief LPUART disabled in STOP Mode
715 * @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode
716 * @rmtoll CR1 UESM LL_LPUART_DisableInStopMode
717 * @param LPUARTx LPUART Instance
718 * @retval None
719 */
LL_LPUART_DisableInStopMode(USART_TypeDef * LPUARTx)720 __STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
721 {
722 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
723 }
724
725 /**
726 * @brief Indicate if LPUART is enabled in STOP Mode
727 * (able to wake up MCU from Stop mode or not)
728 * @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode
729 * @param LPUARTx LPUART Instance
730 * @retval State of bit (1 or 0).
731 */
LL_LPUART_IsEnabledInStopMode(const USART_TypeDef * LPUARTx)732 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(const USART_TypeDef *LPUARTx)
733 {
734 return ((READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)) ? 1UL : 0UL);
735 }
736
737 #if defined(USART_CR3_UCESM)
738 /**
739 * @brief LPUART Clock enabled in STOP Mode
740 * @note When this function is called, LPUART Clock is enabled while in STOP mode
741 * @rmtoll CR3 UCESM LL_LPUART_EnableClockInStopMode
742 * @param LPUARTx LPUART Instance
743 * @retval None
744 */
LL_LPUART_EnableClockInStopMode(USART_TypeDef * LPUARTx)745 __STATIC_INLINE void LL_LPUART_EnableClockInStopMode(USART_TypeDef *LPUARTx)
746 {
747 ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_UCESM);
748 }
749
750 /**
751 * @brief LPUART clock disabled in STOP Mode
752 * @note When this function is called, LPUART Clock is disabled while in STOP mode
753 * @rmtoll CR3 UCESM LL_LPUART_DisableClockInStopMode
754 * @param LPUARTx LPUART Instance
755 * @retval None
756 */
LL_LPUART_DisableClockInStopMode(USART_TypeDef * LPUARTx)757 __STATIC_INLINE void LL_LPUART_DisableClockInStopMode(USART_TypeDef *LPUARTx)
758 {
759 ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_UCESM);
760 }
761
762 /**
763 * @brief Indicate if LPUART clock is enabled in STOP Mode
764 * @rmtoll CR3 UCESM LL_LPUART_IsClockEnabledInStopMode
765 * @param LPUARTx LPUART Instance
766 * @retval State of bit (1 or 0).
767 */
LL_LPUART_IsClockEnabledInStopMode(const USART_TypeDef * LPUARTx)768 __STATIC_INLINE uint32_t LL_LPUART_IsClockEnabledInStopMode(const USART_TypeDef *LPUARTx)
769 {
770 return ((READ_BIT(LPUARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM)) ? 1UL : 0UL);
771 }
772
773 #endif /* USART_CR3_UCESM */
774 /**
775 * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
776 * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx
777 * @param LPUARTx LPUART Instance
778 * @retval None
779 */
LL_LPUART_EnableDirectionRx(USART_TypeDef * LPUARTx)780 __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
781 {
782 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RE);
783 }
784
785 /**
786 * @brief Receiver Disable
787 * @rmtoll CR1 RE LL_LPUART_DisableDirectionRx
788 * @param LPUARTx LPUART Instance
789 * @retval None
790 */
LL_LPUART_DisableDirectionRx(USART_TypeDef * LPUARTx)791 __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
792 {
793 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
794 }
795
796 /**
797 * @brief Transmitter Enable
798 * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx
799 * @param LPUARTx LPUART Instance
800 * @retval None
801 */
LL_LPUART_EnableDirectionTx(USART_TypeDef * LPUARTx)802 __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
803 {
804 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TE);
805 }
806
807 /**
808 * @brief Transmitter Disable
809 * @rmtoll CR1 TE LL_LPUART_DisableDirectionTx
810 * @param LPUARTx LPUART Instance
811 * @retval None
812 */
LL_LPUART_DisableDirectionTx(USART_TypeDef * LPUARTx)813 __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
814 {
815 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
816 }
817
818 /**
819 * @brief Configure simultaneously enabled/disabled states
820 * of Transmitter and Receiver
821 * @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n
822 * CR1 TE LL_LPUART_SetTransferDirection
823 * @param LPUARTx LPUART Instance
824 * @param TransferDirection This parameter can be one of the following values:
825 * @arg @ref LL_LPUART_DIRECTION_NONE
826 * @arg @ref LL_LPUART_DIRECTION_RX
827 * @arg @ref LL_LPUART_DIRECTION_TX
828 * @arg @ref LL_LPUART_DIRECTION_TX_RX
829 * @retval None
830 */
LL_LPUART_SetTransferDirection(USART_TypeDef * LPUARTx,uint32_t TransferDirection)831 __STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection)
832 {
833 ATOMIC_MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
834 }
835
836 /**
837 * @brief Return enabled/disabled states of Transmitter and Receiver
838 * @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n
839 * CR1 TE LL_LPUART_GetTransferDirection
840 * @param LPUARTx LPUART Instance
841 * @retval Returned value can be one of the following values:
842 * @arg @ref LL_LPUART_DIRECTION_NONE
843 * @arg @ref LL_LPUART_DIRECTION_RX
844 * @arg @ref LL_LPUART_DIRECTION_TX
845 * @arg @ref LL_LPUART_DIRECTION_TX_RX
846 */
LL_LPUART_GetTransferDirection(const USART_TypeDef * LPUARTx)847 __STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(const USART_TypeDef *LPUARTx)
848 {
849 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE));
850 }
851
852 /**
853 * @brief Configure Parity (enabled/disabled and parity mode if enabled)
854 * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
855 * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
856 * (depending on data width) and parity is checked on the received data.
857 * @rmtoll CR1 PS LL_LPUART_SetParity\n
858 * CR1 PCE LL_LPUART_SetParity
859 * @param LPUARTx LPUART Instance
860 * @param Parity This parameter can be one of the following values:
861 * @arg @ref LL_LPUART_PARITY_NONE
862 * @arg @ref LL_LPUART_PARITY_EVEN
863 * @arg @ref LL_LPUART_PARITY_ODD
864 * @retval None
865 */
LL_LPUART_SetParity(USART_TypeDef * LPUARTx,uint32_t Parity)866 __STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity)
867 {
868 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
869 }
870
871 /**
872 * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
873 * @rmtoll CR1 PS LL_LPUART_GetParity\n
874 * CR1 PCE LL_LPUART_GetParity
875 * @param LPUARTx LPUART Instance
876 * @retval Returned value can be one of the following values:
877 * @arg @ref LL_LPUART_PARITY_NONE
878 * @arg @ref LL_LPUART_PARITY_EVEN
879 * @arg @ref LL_LPUART_PARITY_ODD
880 */
LL_LPUART_GetParity(const USART_TypeDef * LPUARTx)881 __STATIC_INLINE uint32_t LL_LPUART_GetParity(const USART_TypeDef *LPUARTx)
882 {
883 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
884 }
885
886 /**
887 * @brief Set Receiver Wake Up method from Mute mode.
888 * @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod
889 * @param LPUARTx LPUART Instance
890 * @param Method This parameter can be one of the following values:
891 * @arg @ref LL_LPUART_WAKEUP_IDLELINE
892 * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
893 * @retval None
894 */
LL_LPUART_SetWakeUpMethod(USART_TypeDef * LPUARTx,uint32_t Method)895 __STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
896 {
897 MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
898 }
899
900 /**
901 * @brief Return Receiver Wake Up method from Mute mode
902 * @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod
903 * @param LPUARTx LPUART Instance
904 * @retval Returned value can be one of the following values:
905 * @arg @ref LL_LPUART_WAKEUP_IDLELINE
906 * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
907 */
LL_LPUART_GetWakeUpMethod(const USART_TypeDef * LPUARTx)908 __STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(const USART_TypeDef *LPUARTx)
909 {
910 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
911 }
912
913 /**
914 * @brief Set Word length (nb of data bits, excluding start and stop bits)
915 * @rmtoll CR1 M LL_LPUART_SetDataWidth
916 * @param LPUARTx LPUART Instance
917 * @param DataWidth This parameter can be one of the following values:
918 * @arg @ref LL_LPUART_DATAWIDTH_7B
919 * @arg @ref LL_LPUART_DATAWIDTH_8B
920 * @arg @ref LL_LPUART_DATAWIDTH_9B
921 * @retval None
922 */
LL_LPUART_SetDataWidth(USART_TypeDef * LPUARTx,uint32_t DataWidth)923 __STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
924 {
925 MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
926 }
927
928 /**
929 * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
930 * @rmtoll CR1 M LL_LPUART_GetDataWidth
931 * @param LPUARTx LPUART Instance
932 * @retval Returned value can be one of the following values:
933 * @arg @ref LL_LPUART_DATAWIDTH_7B
934 * @arg @ref LL_LPUART_DATAWIDTH_8B
935 * @arg @ref LL_LPUART_DATAWIDTH_9B
936 */
LL_LPUART_GetDataWidth(const USART_TypeDef * LPUARTx)937 __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(const USART_TypeDef *LPUARTx)
938 {
939 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
940 }
941
942 /**
943 * @brief Allow switch between Mute Mode and Active mode
944 * @rmtoll CR1 MME LL_LPUART_EnableMuteMode
945 * @param LPUARTx LPUART Instance
946 * @retval None
947 */
LL_LPUART_EnableMuteMode(USART_TypeDef * LPUARTx)948 __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
949 {
950 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_MME);
951 }
952
953 /**
954 * @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
955 * @rmtoll CR1 MME LL_LPUART_DisableMuteMode
956 * @param LPUARTx LPUART Instance
957 * @retval None
958 */
LL_LPUART_DisableMuteMode(USART_TypeDef * LPUARTx)959 __STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
960 {
961 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
962 }
963
964 /**
965 * @brief Indicate if switch between Mute Mode and Active mode is allowed
966 * @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode
967 * @param LPUARTx LPUART Instance
968 * @retval State of bit (1 or 0).
969 */
LL_LPUART_IsEnabledMuteMode(const USART_TypeDef * LPUARTx)970 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(const USART_TypeDef *LPUARTx)
971 {
972 return ((READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)) ? 1UL : 0UL);
973 }
974
975 #if defined(USART_PRESC_PRESCALER)
976 /**
977 * @brief Configure Clock source prescaler for baudrate generator and oversampling
978 * @rmtoll PRESC PRESCALER LL_LPUART_SetPrescaler
979 * @param LPUARTx LPUART Instance
980 * @param PrescalerValue This parameter can be one of the following values:
981 * @arg @ref LL_LPUART_PRESCALER_DIV1
982 * @arg @ref LL_LPUART_PRESCALER_DIV2
983 * @arg @ref LL_LPUART_PRESCALER_DIV4
984 * @arg @ref LL_LPUART_PRESCALER_DIV6
985 * @arg @ref LL_LPUART_PRESCALER_DIV8
986 * @arg @ref LL_LPUART_PRESCALER_DIV10
987 * @arg @ref LL_LPUART_PRESCALER_DIV12
988 * @arg @ref LL_LPUART_PRESCALER_DIV16
989 * @arg @ref LL_LPUART_PRESCALER_DIV32
990 * @arg @ref LL_LPUART_PRESCALER_DIV64
991 * @arg @ref LL_LPUART_PRESCALER_DIV128
992 * @arg @ref LL_LPUART_PRESCALER_DIV256
993 * @retval None
994 */
LL_LPUART_SetPrescaler(USART_TypeDef * LPUARTx,uint32_t PrescalerValue)995 __STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue)
996 {
997 MODIFY_REG(LPUARTx->PRESC, USART_PRESC_PRESCALER, (uint16_t)PrescalerValue);
998 }
999
1000 /**
1001 * @brief Retrieve the Clock source prescaler for baudrate generator and oversampling
1002 * @rmtoll PRESC PRESCALER LL_LPUART_GetPrescaler
1003 * @param LPUARTx LPUART Instance
1004 * @retval Returned value can be one of the following values:
1005 * @arg @ref LL_LPUART_PRESCALER_DIV1
1006 * @arg @ref LL_LPUART_PRESCALER_DIV2
1007 * @arg @ref LL_LPUART_PRESCALER_DIV4
1008 * @arg @ref LL_LPUART_PRESCALER_DIV6
1009 * @arg @ref LL_LPUART_PRESCALER_DIV8
1010 * @arg @ref LL_LPUART_PRESCALER_DIV10
1011 * @arg @ref LL_LPUART_PRESCALER_DIV12
1012 * @arg @ref LL_LPUART_PRESCALER_DIV16
1013 * @arg @ref LL_LPUART_PRESCALER_DIV32
1014 * @arg @ref LL_LPUART_PRESCALER_DIV64
1015 * @arg @ref LL_LPUART_PRESCALER_DIV128
1016 * @arg @ref LL_LPUART_PRESCALER_DIV256
1017 */
LL_LPUART_GetPrescaler(const USART_TypeDef * LPUARTx)1018 __STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(const USART_TypeDef *LPUARTx)
1019 {
1020 return (uint32_t)(READ_BIT(LPUARTx->PRESC, USART_PRESC_PRESCALER));
1021 }
1022 #endif /* USART_PRESC_PRESCALER */
1023
1024 /**
1025 * @brief Set the length of the stop bits
1026 * @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength
1027 * @param LPUARTx LPUART Instance
1028 * @param StopBits This parameter can be one of the following values:
1029 * @arg @ref LL_LPUART_STOPBITS_1
1030 * @arg @ref LL_LPUART_STOPBITS_2
1031 * @retval None
1032 */
LL_LPUART_SetStopBitsLength(USART_TypeDef * LPUARTx,uint32_t StopBits)1033 __STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
1034 {
1035 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
1036 }
1037
1038 /**
1039 * @brief Retrieve the length of the stop bits
1040 * @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength
1041 * @param LPUARTx LPUART Instance
1042 * @retval Returned value can be one of the following values:
1043 * @arg @ref LL_LPUART_STOPBITS_1
1044 * @arg @ref LL_LPUART_STOPBITS_2
1045 */
LL_LPUART_GetStopBitsLength(const USART_TypeDef * LPUARTx)1046 __STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(const USART_TypeDef *LPUARTx)
1047 {
1048 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
1049 }
1050
1051 /**
1052 * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
1053 * @note Call of this function is equivalent to following function call sequence :
1054 * - Data Width configuration using @ref LL_LPUART_SetDataWidth() function
1055 * - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function
1056 * - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function
1057 * @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n
1058 * CR1 PCE LL_LPUART_ConfigCharacter\n
1059 * CR1 M LL_LPUART_ConfigCharacter\n
1060 * CR2 STOP LL_LPUART_ConfigCharacter
1061 * @param LPUARTx LPUART Instance
1062 * @param DataWidth This parameter can be one of the following values:
1063 * @arg @ref LL_LPUART_DATAWIDTH_7B
1064 * @arg @ref LL_LPUART_DATAWIDTH_8B
1065 * @arg @ref LL_LPUART_DATAWIDTH_9B
1066 * @param Parity This parameter can be one of the following values:
1067 * @arg @ref LL_LPUART_PARITY_NONE
1068 * @arg @ref LL_LPUART_PARITY_EVEN
1069 * @arg @ref LL_LPUART_PARITY_ODD
1070 * @param StopBits This parameter can be one of the following values:
1071 * @arg @ref LL_LPUART_STOPBITS_1
1072 * @arg @ref LL_LPUART_STOPBITS_2
1073 * @retval None
1074 */
LL_LPUART_ConfigCharacter(USART_TypeDef * LPUARTx,uint32_t DataWidth,uint32_t Parity,uint32_t StopBits)1075 __STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity,
1076 uint32_t StopBits)
1077 {
1078 MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
1079 MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
1080 }
1081
1082 /**
1083 * @brief Configure TX/RX pins swapping setting.
1084 * @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap
1085 * @param LPUARTx LPUART Instance
1086 * @param SwapConfig This parameter can be one of the following values:
1087 * @arg @ref LL_LPUART_TXRX_STANDARD
1088 * @arg @ref LL_LPUART_TXRX_SWAPPED
1089 * @retval None
1090 */
LL_LPUART_SetTXRXSwap(USART_TypeDef * LPUARTx,uint32_t SwapConfig)1091 __STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
1092 {
1093 MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
1094 }
1095
1096 /**
1097 * @brief Retrieve TX/RX pins swapping configuration.
1098 * @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap
1099 * @param LPUARTx LPUART Instance
1100 * @retval Returned value can be one of the following values:
1101 * @arg @ref LL_LPUART_TXRX_STANDARD
1102 * @arg @ref LL_LPUART_TXRX_SWAPPED
1103 */
LL_LPUART_GetTXRXSwap(const USART_TypeDef * LPUARTx)1104 __STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(const USART_TypeDef *LPUARTx)
1105 {
1106 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
1107 }
1108
1109 /**
1110 * @brief Configure RX pin active level logic
1111 * @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel
1112 * @param LPUARTx LPUART Instance
1113 * @param PinInvMethod This parameter can be one of the following values:
1114 * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
1115 * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
1116 * @retval None
1117 */
LL_LPUART_SetRXPinLevel(USART_TypeDef * LPUARTx,uint32_t PinInvMethod)1118 __STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
1119 {
1120 MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
1121 }
1122
1123 /**
1124 * @brief Retrieve RX pin active level logic configuration
1125 * @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel
1126 * @param LPUARTx LPUART Instance
1127 * @retval Returned value can be one of the following values:
1128 * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
1129 * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
1130 */
LL_LPUART_GetRXPinLevel(const USART_TypeDef * LPUARTx)1131 __STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(const USART_TypeDef *LPUARTx)
1132 {
1133 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
1134 }
1135
1136 /**
1137 * @brief Configure TX pin active level logic
1138 * @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel
1139 * @param LPUARTx LPUART Instance
1140 * @param PinInvMethod This parameter can be one of the following values:
1141 * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
1142 * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
1143 * @retval None
1144 */
LL_LPUART_SetTXPinLevel(USART_TypeDef * LPUARTx,uint32_t PinInvMethod)1145 __STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
1146 {
1147 MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
1148 }
1149
1150 /**
1151 * @brief Retrieve TX pin active level logic configuration
1152 * @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel
1153 * @param LPUARTx LPUART Instance
1154 * @retval Returned value can be one of the following values:
1155 * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
1156 * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
1157 */
LL_LPUART_GetTXPinLevel(const USART_TypeDef * LPUARTx)1158 __STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(const USART_TypeDef *LPUARTx)
1159 {
1160 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
1161 }
1162
1163 /**
1164 * @brief Configure Binary data logic.
1165 *
1166 * @note Allow to define how Logical data from the data register are send/received :
1167 * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
1168 * @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic
1169 * @param LPUARTx LPUART Instance
1170 * @param DataLogic This parameter can be one of the following values:
1171 * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
1172 * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
1173 * @retval None
1174 */
LL_LPUART_SetBinaryDataLogic(USART_TypeDef * LPUARTx,uint32_t DataLogic)1175 __STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
1176 {
1177 MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
1178 }
1179
1180 /**
1181 * @brief Retrieve Binary data configuration
1182 * @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic
1183 * @param LPUARTx LPUART Instance
1184 * @retval Returned value can be one of the following values:
1185 * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
1186 * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
1187 */
LL_LPUART_GetBinaryDataLogic(const USART_TypeDef * LPUARTx)1188 __STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(const USART_TypeDef *LPUARTx)
1189 {
1190 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
1191 }
1192
1193 /**
1194 * @brief Configure transfer bit order (either Less or Most Significant Bit First)
1195 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
1196 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
1197 * @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder
1198 * @param LPUARTx LPUART Instance
1199 * @param BitOrder This parameter can be one of the following values:
1200 * @arg @ref LL_LPUART_BITORDER_LSBFIRST
1201 * @arg @ref LL_LPUART_BITORDER_MSBFIRST
1202 * @retval None
1203 */
LL_LPUART_SetTransferBitOrder(USART_TypeDef * LPUARTx,uint32_t BitOrder)1204 __STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
1205 {
1206 MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
1207 }
1208
1209 /**
1210 * @brief Return transfer bit order (either Less or Most Significant Bit First)
1211 * @note MSB First means data is transmitted/received with the MSB first, following the start bit.
1212 * LSB First means data is transmitted/received with data bit 0 first, following the start bit.
1213 * @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder
1214 * @param LPUARTx LPUART Instance
1215 * @retval Returned value can be one of the following values:
1216 * @arg @ref LL_LPUART_BITORDER_LSBFIRST
1217 * @arg @ref LL_LPUART_BITORDER_MSBFIRST
1218 */
LL_LPUART_GetTransferBitOrder(const USART_TypeDef * LPUARTx)1219 __STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(const USART_TypeDef *LPUARTx)
1220 {
1221 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
1222 }
1223
1224 /**
1225 * @brief Set Address of the LPUART node.
1226 * @note This is used in multiprocessor communication during Mute mode or Stop mode,
1227 * for wake up with address mark detection.
1228 * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
1229 * (b7-b4 should be set to 0)
1230 * 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
1231 * (This is used in multiprocessor communication during Mute mode or Stop mode,
1232 * for wake up with 7-bit address mark detection.
1233 * The MSB of the character sent by the transmitter should be equal to 1.
1234 * It may also be used for character detection during normal reception,
1235 * Mute mode inactive (for example, end of block detection in ModBus protocol).
1236 * In this case, the whole received character (8-bit) is compared to the ADD[7:0]
1237 * value and CMF flag is set on match)
1238 * @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n
1239 * CR2 ADDM7 LL_LPUART_ConfigNodeAddress
1240 * @param LPUARTx LPUART Instance
1241 * @param AddressLen This parameter can be one of the following values:
1242 * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
1243 * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
1244 * @param NodeAddress 4 or 7 bit Address of the LPUART node.
1245 * @retval None
1246 */
LL_LPUART_ConfigNodeAddress(USART_TypeDef * LPUARTx,uint32_t AddressLen,uint32_t NodeAddress)1247 __STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
1248 {
1249 MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
1250 (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
1251 }
1252
1253 /**
1254 * @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2.
1255 * @note If 4-bit Address Detection is selected in ADDM7,
1256 * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
1257 * If 7-bit Address Detection is selected in ADDM7,
1258 * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
1259 * @rmtoll CR2 ADD LL_LPUART_GetNodeAddress
1260 * @param LPUARTx LPUART Instance
1261 * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255)
1262 */
LL_LPUART_GetNodeAddress(const USART_TypeDef * LPUARTx)1263 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(const USART_TypeDef *LPUARTx)
1264 {
1265 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos);
1266 }
1267
1268 /**
1269 * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
1270 * @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen
1271 * @param LPUARTx LPUART Instance
1272 * @retval Returned value can be one of the following values:
1273 * @arg @ref LL_LPUART_ADDRESS_DETECT_4B
1274 * @arg @ref LL_LPUART_ADDRESS_DETECT_7B
1275 */
LL_LPUART_GetNodeAddressLen(const USART_TypeDef * LPUARTx)1276 __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(const USART_TypeDef *LPUARTx)
1277 {
1278 return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
1279 }
1280
1281 /**
1282 * @brief Enable RTS HW Flow Control
1283 * @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl
1284 * @param LPUARTx LPUART Instance
1285 * @retval None
1286 */
LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef * LPUARTx)1287 __STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
1288 {
1289 SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
1290 }
1291
1292 /**
1293 * @brief Disable RTS HW Flow Control
1294 * @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl
1295 * @param LPUARTx LPUART Instance
1296 * @retval None
1297 */
LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef * LPUARTx)1298 __STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
1299 {
1300 CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
1301 }
1302
1303 /**
1304 * @brief Enable CTS HW Flow Control
1305 * @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl
1306 * @param LPUARTx LPUART Instance
1307 * @retval None
1308 */
LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef * LPUARTx)1309 __STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
1310 {
1311 SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
1312 }
1313
1314 /**
1315 * @brief Disable CTS HW Flow Control
1316 * @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl
1317 * @param LPUARTx LPUART Instance
1318 * @retval None
1319 */
LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef * LPUARTx)1320 __STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
1321 {
1322 CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
1323 }
1324
1325 /**
1326 * @brief Configure HW Flow Control mode (both CTS and RTS)
1327 * @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n
1328 * CR3 CTSE LL_LPUART_SetHWFlowCtrl
1329 * @param LPUARTx LPUART Instance
1330 * @param HardwareFlowControl This parameter can be one of the following values:
1331 * @arg @ref LL_LPUART_HWCONTROL_NONE
1332 * @arg @ref LL_LPUART_HWCONTROL_RTS
1333 * @arg @ref LL_LPUART_HWCONTROL_CTS
1334 * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
1335 * @retval None
1336 */
LL_LPUART_SetHWFlowCtrl(USART_TypeDef * LPUARTx,uint32_t HardwareFlowControl)1337 __STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl)
1338 {
1339 MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
1340 }
1341
1342 /**
1343 * @brief Return HW Flow Control configuration (both CTS and RTS)
1344 * @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n
1345 * CR3 CTSE LL_LPUART_GetHWFlowCtrl
1346 * @param LPUARTx LPUART Instance
1347 * @retval Returned value can be one of the following values:
1348 * @arg @ref LL_LPUART_HWCONTROL_NONE
1349 * @arg @ref LL_LPUART_HWCONTROL_RTS
1350 * @arg @ref LL_LPUART_HWCONTROL_CTS
1351 * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
1352 */
LL_LPUART_GetHWFlowCtrl(const USART_TypeDef * LPUARTx)1353 __STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(const USART_TypeDef *LPUARTx)
1354 {
1355 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
1356 }
1357
1358 /**
1359 * @brief Enable Overrun detection
1360 * @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect
1361 * @param LPUARTx LPUART Instance
1362 * @retval None
1363 */
LL_LPUART_EnableOverrunDetect(USART_TypeDef * LPUARTx)1364 __STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
1365 {
1366 CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
1367 }
1368
1369 /**
1370 * @brief Disable Overrun detection
1371 * @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect
1372 * @param LPUARTx LPUART Instance
1373 * @retval None
1374 */
LL_LPUART_DisableOverrunDetect(USART_TypeDef * LPUARTx)1375 __STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
1376 {
1377 SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
1378 }
1379
1380 /**
1381 * @brief Indicate if Overrun detection is enabled
1382 * @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect
1383 * @param LPUARTx LPUART Instance
1384 * @retval State of bit (1 or 0).
1385 */
LL_LPUART_IsEnabledOverrunDetect(const USART_TypeDef * LPUARTx)1386 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(const USART_TypeDef *LPUARTx)
1387 {
1388 return ((READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS) ? 1UL : 0UL);
1389 }
1390
1391 /**
1392 * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
1393 * @rmtoll CR3 WUS LL_LPUART_SetWKUPType
1394 * @param LPUARTx LPUART Instance
1395 * @param Type This parameter can be one of the following values:
1396 * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
1397 * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
1398 * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
1399 * @retval None
1400 */
LL_LPUART_SetWKUPType(USART_TypeDef * LPUARTx,uint32_t Type)1401 __STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
1402 {
1403 MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
1404 }
1405
1406 /**
1407 * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
1408 * @rmtoll CR3 WUS LL_LPUART_GetWKUPType
1409 * @param LPUARTx LPUART Instance
1410 * @retval Returned value can be one of the following values:
1411 * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
1412 * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
1413 * @arg @ref LL_LPUART_WAKEUP_ON_RXNE
1414 */
LL_LPUART_GetWKUPType(const USART_TypeDef * LPUARTx)1415 __STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(const USART_TypeDef *LPUARTx)
1416 {
1417 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
1418 }
1419
1420 /**
1421 * @brief Configure LPUART BRR register for achieving expected Baud Rate value.
1422 *
1423 * @note Compute and set LPUARTDIV value in BRR Register (full BRR content)
1424 * according to used Peripheral Clock and expected Baud Rate values
1425 * @note Peripheral clock and Baud Rate values provided as function parameters should be valid
1426 * (Baud rate value != 0).
1427 * @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit,
1428 * a care should be taken when generating high baud rates using high PeriphClk
1429 * values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate].
1430 * @rmtoll BRR BRR LL_LPUART_SetBaudRate
1431 * @param LPUARTx LPUART Instance
1432 * @param PeriphClk Peripheral Clock
1433 @if USART_PRESC_PRESCALER
1434 * @param PrescalerValue This parameter can be one of the following values:
1435 * @arg @ref LL_LPUART_PRESCALER_DIV1
1436 * @arg @ref LL_LPUART_PRESCALER_DIV2
1437 * @arg @ref LL_LPUART_PRESCALER_DIV4
1438 * @arg @ref LL_LPUART_PRESCALER_DIV6
1439 * @arg @ref LL_LPUART_PRESCALER_DIV8
1440 * @arg @ref LL_LPUART_PRESCALER_DIV10
1441 * @arg @ref LL_LPUART_PRESCALER_DIV12
1442 * @arg @ref LL_LPUART_PRESCALER_DIV16
1443 * @arg @ref LL_LPUART_PRESCALER_DIV32
1444 * @arg @ref LL_LPUART_PRESCALER_DIV64
1445 * @arg @ref LL_LPUART_PRESCALER_DIV128
1446 * @arg @ref LL_LPUART_PRESCALER_DIV256
1447 @endif
1448 * @param BaudRate Baud Rate
1449 * @retval None
1450 */
1451 #if defined(USART_PRESC_PRESCALER)
LL_LPUART_SetBaudRate(USART_TypeDef * LPUARTx,uint32_t PeriphClk,uint32_t PrescalerValue,uint32_t BaudRate)1452 __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue,
1453 uint32_t BaudRate)
1454 #else
1455 __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
1456 #endif /* USART_PRESC_PRESCALER */
1457 {
1458 #if defined(USART_PRESC_PRESCALER)
1459 if (BaudRate != 0U)
1460 {
1461 LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, PrescalerValue, BaudRate);
1462 }
1463 #else
1464 if (BaudRate != 0U)
1465 {
1466 LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
1467 }
1468 #endif /* USART_PRESC_PRESCALER */
1469 }
1470
1471 /**
1472 * @brief Return current Baud Rate value, according to LPUARTDIV present in BRR register
1473 * (full BRR content), and to used Peripheral Clock values
1474 * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
1475 * @rmtoll BRR BRR LL_LPUART_GetBaudRate
1476 * @param LPUARTx LPUART Instance
1477 * @param PeriphClk Peripheral Clock
1478 @if USART_PRESC_PRESCALER
1479 * @param PrescalerValue This parameter can be one of the following values:
1480 * @arg @ref LL_LPUART_PRESCALER_DIV1
1481 * @arg @ref LL_LPUART_PRESCALER_DIV2
1482 * @arg @ref LL_LPUART_PRESCALER_DIV4
1483 * @arg @ref LL_LPUART_PRESCALER_DIV6
1484 * @arg @ref LL_LPUART_PRESCALER_DIV8
1485 * @arg @ref LL_LPUART_PRESCALER_DIV10
1486 * @arg @ref LL_LPUART_PRESCALER_DIV12
1487 * @arg @ref LL_LPUART_PRESCALER_DIV16
1488 * @arg @ref LL_LPUART_PRESCALER_DIV32
1489 * @arg @ref LL_LPUART_PRESCALER_DIV64
1490 * @arg @ref LL_LPUART_PRESCALER_DIV128
1491 * @arg @ref LL_LPUART_PRESCALER_DIV256
1492 @endif
1493 * @retval Baud Rate
1494 */
1495 #if defined(USART_PRESC_PRESCALER)
LL_LPUART_GetBaudRate(const USART_TypeDef * LPUARTx,uint32_t PeriphClk,uint32_t PrescalerValue)1496 __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(const USART_TypeDef *LPUARTx, uint32_t PeriphClk,
1497 uint32_t PrescalerValue)
1498 #else
1499 __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(const USART_TypeDef *LPUARTx, uint32_t PeriphClk)
1500 #endif /* USART_PRESC_PRESCALER */
1501 {
1502 uint32_t lpuartdiv;
1503 uint32_t brrresult;
1504 #if defined(USART_PRESC_PRESCALER)
1505 uint32_t periphclkpresc = (uint32_t)(PeriphClk / (LPUART_PRESCALER_TAB[(uint16_t)PrescalerValue]));
1506 #endif /* USART_PRESC_PRESCALER */
1507
1508 lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK;
1509
1510 if (lpuartdiv >= LPUART_BRR_MIN_VALUE)
1511 {
1512 #if defined(USART_PRESC_PRESCALER)
1513 brrresult = (uint32_t)(((uint64_t)(periphclkpresc) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
1514 #else
1515 brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv);
1516 #endif /* USART_PRESC_PRESCALER */
1517 }
1518 else
1519 {
1520 brrresult = 0x0UL;
1521 }
1522
1523 return (brrresult);
1524 }
1525
1526 /**
1527 * @}
1528 */
1529
1530 /** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
1531 * @{
1532 */
1533
1534 /**
1535 * @brief Enable Single Wire Half-Duplex mode
1536 * @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex
1537 * @param LPUARTx LPUART Instance
1538 * @retval None
1539 */
LL_LPUART_EnableHalfDuplex(USART_TypeDef * LPUARTx)1540 __STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
1541 {
1542 SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
1543 }
1544
1545 /**
1546 * @brief Disable Single Wire Half-Duplex mode
1547 * @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex
1548 * @param LPUARTx LPUART Instance
1549 * @retval None
1550 */
LL_LPUART_DisableHalfDuplex(USART_TypeDef * LPUARTx)1551 __STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
1552 {
1553 CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
1554 }
1555
1556 /**
1557 * @brief Indicate if Single Wire Half-Duplex mode is enabled
1558 * @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex
1559 * @param LPUARTx LPUART Instance
1560 * @retval State of bit (1 or 0).
1561 */
LL_LPUART_IsEnabledHalfDuplex(const USART_TypeDef * LPUARTx)1562 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(const USART_TypeDef *LPUARTx)
1563 {
1564 return ((READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)) ? 1UL : 0UL);
1565 }
1566
1567 /**
1568 * @}
1569 */
1570
1571 /** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
1572 * @{
1573 */
1574
1575 /**
1576 * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits).
1577 * @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime
1578 * @param LPUARTx LPUART Instance
1579 * @param Time Value between Min_Data=0 and Max_Data=31
1580 * @retval None
1581 */
LL_LPUART_SetDEDeassertionTime(USART_TypeDef * LPUARTx,uint32_t Time)1582 __STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
1583 {
1584 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos);
1585 }
1586
1587 /**
1588 * @brief Return DEDT (Driver Enable De-Assertion Time)
1589 * @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime
1590 * @param LPUARTx LPUART Instance
1591 * @retval Time value expressed on 5 bits ([4:0] bits) : c
1592 */
LL_LPUART_GetDEDeassertionTime(const USART_TypeDef * LPUARTx)1593 __STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(const USART_TypeDef *LPUARTx)
1594 {
1595 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos);
1596 }
1597
1598 /**
1599 * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
1600 * @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime
1601 * @param LPUARTx LPUART Instance
1602 * @param Time Value between Min_Data=0 and Max_Data=31
1603 * @retval None
1604 */
LL_LPUART_SetDEAssertionTime(USART_TypeDef * LPUARTx,uint32_t Time)1605 __STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
1606 {
1607 MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos);
1608 }
1609
1610 /**
1611 * @brief Return DEAT (Driver Enable Assertion Time)
1612 * @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime
1613 * @param LPUARTx LPUART Instance
1614 * @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31
1615 */
LL_LPUART_GetDEAssertionTime(const USART_TypeDef * LPUARTx)1616 __STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(const USART_TypeDef *LPUARTx)
1617 {
1618 return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos);
1619 }
1620
1621 /**
1622 * @brief Enable Driver Enable (DE) Mode
1623 * @rmtoll CR3 DEM LL_LPUART_EnableDEMode
1624 * @param LPUARTx LPUART Instance
1625 * @retval None
1626 */
LL_LPUART_EnableDEMode(USART_TypeDef * LPUARTx)1627 __STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
1628 {
1629 SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
1630 }
1631
1632 /**
1633 * @brief Disable Driver Enable (DE) Mode
1634 * @rmtoll CR3 DEM LL_LPUART_DisableDEMode
1635 * @param LPUARTx LPUART Instance
1636 * @retval None
1637 */
LL_LPUART_DisableDEMode(USART_TypeDef * LPUARTx)1638 __STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
1639 {
1640 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM);
1641 }
1642
1643 /**
1644 * @brief Indicate if Driver Enable (DE) Mode is enabled
1645 * @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode
1646 * @param LPUARTx LPUART Instance
1647 * @retval State of bit (1 or 0).
1648 */
LL_LPUART_IsEnabledDEMode(const USART_TypeDef * LPUARTx)1649 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(const USART_TypeDef *LPUARTx)
1650 {
1651 return ((READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
1652 }
1653
1654 /**
1655 * @brief Select Driver Enable Polarity
1656 * @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity
1657 * @param LPUARTx LPUART Instance
1658 * @param Polarity This parameter can be one of the following values:
1659 * @arg @ref LL_LPUART_DE_POLARITY_HIGH
1660 * @arg @ref LL_LPUART_DE_POLARITY_LOW
1661 * @retval None
1662 */
LL_LPUART_SetDESignalPolarity(USART_TypeDef * LPUARTx,uint32_t Polarity)1663 __STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
1664 {
1665 MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
1666 }
1667
1668 /**
1669 * @brief Return Driver Enable Polarity
1670 * @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity
1671 * @param LPUARTx LPUART Instance
1672 * @retval Returned value can be one of the following values:
1673 * @arg @ref LL_LPUART_DE_POLARITY_HIGH
1674 * @arg @ref LL_LPUART_DE_POLARITY_LOW
1675 */
LL_LPUART_GetDESignalPolarity(const USART_TypeDef * LPUARTx)1676 __STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(const USART_TypeDef *LPUARTx)
1677 {
1678 return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
1679 }
1680
1681 /**
1682 * @}
1683 */
1684
1685 /** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management
1686 * @{
1687 */
1688
1689 /**
1690 * @brief Check if the LPUART Parity Error Flag is set or not
1691 * @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE
1692 * @param LPUARTx LPUART Instance
1693 * @retval State of bit (1 or 0).
1694 */
LL_LPUART_IsActiveFlag_PE(const USART_TypeDef * LPUARTx)1695 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(const USART_TypeDef *LPUARTx)
1696 {
1697 return ((READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
1698 }
1699
1700 /**
1701 * @brief Check if the LPUART Framing Error Flag is set or not
1702 * @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE
1703 * @param LPUARTx LPUART Instance
1704 * @retval State of bit (1 or 0).
1705 */
LL_LPUART_IsActiveFlag_FE(const USART_TypeDef * LPUARTx)1706 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(const USART_TypeDef *LPUARTx)
1707 {
1708 return ((READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
1709 }
1710
1711 /**
1712 * @brief Check if the LPUART Noise error detected Flag is set or not
1713 * @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE
1714 * @param LPUARTx LPUART Instance
1715 * @retval State of bit (1 or 0).
1716 */
LL_LPUART_IsActiveFlag_NE(const USART_TypeDef * LPUARTx)1717 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(const USART_TypeDef *LPUARTx)
1718 {
1719 return ((READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
1720 }
1721
1722 /**
1723 * @brief Check if the LPUART OverRun Error Flag is set or not
1724 * @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE
1725 * @param LPUARTx LPUART Instance
1726 * @retval State of bit (1 or 0).
1727 */
LL_LPUART_IsActiveFlag_ORE(const USART_TypeDef * LPUARTx)1728 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(const USART_TypeDef *LPUARTx)
1729 {
1730 return ((READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
1731 }
1732
1733 /**
1734 * @brief Check if the LPUART IDLE line detected Flag is set or not
1735 * @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE
1736 * @param LPUARTx LPUART Instance
1737 * @retval State of bit (1 or 0).
1738 */
LL_LPUART_IsActiveFlag_IDLE(const USART_TypeDef * LPUARTx)1739 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(const USART_TypeDef *LPUARTx)
1740 {
1741 return ((READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
1742 }
1743
1744 #if defined(USART_CR1_FIFOEN)
1745 #define LL_LPUART_IsActiveFlag_RXNE LL_LPUART_IsActiveFlag_RXNE_RXFNE /* Redefinition for legacy purpose */
1746
1747 /**
1748 * @brief Check if the LPUART Read Data Register or LPUART RX FIFO Not Empty Flag is set or not
1749 * @rmtoll ISR RXNE_RXFNE LL_LPUART_IsActiveFlag_RXNE_RXFNE
1750 * @param LPUARTx LPUART Instance
1751 * @retval State of bit (1 or 0).
1752 */
LL_LPUART_IsActiveFlag_RXNE_RXFNE(const USART_TypeDef * LPUARTx)1753 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(const USART_TypeDef *LPUARTx)
1754 {
1755 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)) ? 1UL : 0UL);
1756 }
1757 #else
1758 /**
1759 * @brief Check if the LPUART Read Data Register Not Empty Flag is set or not
1760 * @rmtoll ISR RXNE LL_LPUART_IsActiveFlag_RXNE
1761 * @param LPUARTx LPUART Instance
1762 * @retval State of bit (1 or 0).
1763 */
LL_LPUART_IsActiveFlag_RXNE(const USART_TypeDef * LPUARTx)1764 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(const USART_TypeDef *LPUARTx)
1765 {
1766 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL);
1767 }
1768 #endif /* USART_CR1_FIFOEN */
1769
1770 /**
1771 * @brief Check if the LPUART Transmission Complete Flag is set or not
1772 * @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC
1773 * @param LPUARTx LPUART Instance
1774 * @retval State of bit (1 or 0).
1775 */
LL_LPUART_IsActiveFlag_TC(const USART_TypeDef * LPUARTx)1776 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(const USART_TypeDef *LPUARTx)
1777 {
1778 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
1779 }
1780
1781 #if defined(USART_CR1_FIFOEN)
1782 #define LL_LPUART_IsActiveFlag_TXE LL_LPUART_IsActiveFlag_TXE_TXFNF /* Redefinition for legacy purpose */
1783
1784 /**
1785 * @brief Check if the LPUART Transmit Data Register Empty or LPUART TX FIFO Not Full Flag is set or not
1786 * @rmtoll ISR TXE_TXFNF LL_LPUART_IsActiveFlag_TXE_TXFNF
1787 * @param LPUARTx LPUART Instance
1788 * @retval State of bit (1 or 0).
1789 */
LL_LPUART_IsActiveFlag_TXE_TXFNF(const USART_TypeDef * LPUARTx)1790 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(const USART_TypeDef *LPUARTx)
1791 {
1792 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)) ? 1UL : 0UL);
1793 }
1794 #else
1795 /**
1796 * @brief Check if the LPUART Transmit Data Register Empty Flag is set or not
1797 * @rmtoll ISR TXE LL_LPUART_IsActiveFlag_TXE
1798 * @param LPUARTx LPUART Instance
1799 * @retval State of bit (1 or 0).
1800 */
LL_LPUART_IsActiveFlag_TXE(const USART_TypeDef * LPUARTx)1801 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(const USART_TypeDef *LPUARTx)
1802 {
1803 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
1804 }
1805 #endif /* USART_CR1_FIFOEN */
1806
1807 /**
1808 * @brief Check if the LPUART CTS interrupt Flag is set or not
1809 * @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS
1810 * @param LPUARTx LPUART Instance
1811 * @retval State of bit (1 or 0).
1812 */
LL_LPUART_IsActiveFlag_nCTS(const USART_TypeDef * LPUARTx)1813 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(const USART_TypeDef *LPUARTx)
1814 {
1815 return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
1816 }
1817
1818 /**
1819 * @brief Check if the LPUART CTS Flag is set or not
1820 * @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS
1821 * @param LPUARTx LPUART Instance
1822 * @retval State of bit (1 or 0).
1823 */
LL_LPUART_IsActiveFlag_CTS(const USART_TypeDef * LPUARTx)1824 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(const USART_TypeDef *LPUARTx)
1825 {
1826 return ((READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
1827 }
1828
1829 /**
1830 * @brief Check if the LPUART Busy Flag is set or not
1831 * @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY
1832 * @param LPUARTx LPUART Instance
1833 * @retval State of bit (1 or 0).
1834 */
LL_LPUART_IsActiveFlag_BUSY(const USART_TypeDef * LPUARTx)1835 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(const USART_TypeDef *LPUARTx)
1836 {
1837 return ((READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
1838 }
1839
1840 /**
1841 * @brief Check if the LPUART Character Match Flag is set or not
1842 * @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM
1843 * @param LPUARTx LPUART Instance
1844 * @retval State of bit (1 or 0).
1845 */
LL_LPUART_IsActiveFlag_CM(const USART_TypeDef * LPUARTx)1846 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(const USART_TypeDef *LPUARTx)
1847 {
1848 return ((READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
1849 }
1850
1851 /**
1852 * @brief Check if the LPUART Send Break Flag is set or not
1853 * @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK
1854 * @param LPUARTx LPUART Instance
1855 * @retval State of bit (1 or 0).
1856 */
LL_LPUART_IsActiveFlag_SBK(const USART_TypeDef * LPUARTx)1857 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(const USART_TypeDef *LPUARTx)
1858 {
1859 return ((READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
1860 }
1861
1862 /**
1863 * @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not
1864 * @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU
1865 * @param LPUARTx LPUART Instance
1866 * @retval State of bit (1 or 0).
1867 */
LL_LPUART_IsActiveFlag_RWU(const USART_TypeDef * LPUARTx)1868 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(const USART_TypeDef *LPUARTx)
1869 {
1870 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
1871 }
1872
1873 /**
1874 * @brief Check if the LPUART Wake Up from stop mode Flag is set or not
1875 * @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP
1876 * @param LPUARTx LPUART Instance
1877 * @retval State of bit (1 or 0).
1878 */
LL_LPUART_IsActiveFlag_WKUP(const USART_TypeDef * LPUARTx)1879 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(const USART_TypeDef *LPUARTx)
1880 {
1881 return ((READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
1882 }
1883
1884 /**
1885 * @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not
1886 * @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK
1887 * @param LPUARTx LPUART Instance
1888 * @retval State of bit (1 or 0).
1889 */
LL_LPUART_IsActiveFlag_TEACK(const USART_TypeDef * LPUARTx)1890 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(const USART_TypeDef *LPUARTx)
1891 {
1892 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
1893 }
1894
1895 /**
1896 * @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not
1897 * @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK
1898 * @param LPUARTx LPUART Instance
1899 * @retval State of bit (1 or 0).
1900 */
LL_LPUART_IsActiveFlag_REACK(const USART_TypeDef * LPUARTx)1901 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(const USART_TypeDef *LPUARTx)
1902 {
1903 return ((READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
1904 }
1905
1906 #if defined(USART_CR1_FIFOEN)
1907 /**
1908 * @brief Check if the LPUART TX FIFO Empty Flag is set or not
1909 * @rmtoll ISR TXFE LL_LPUART_IsActiveFlag_TXFE
1910 * @param LPUARTx LPUART Instance
1911 * @retval State of bit (1 or 0).
1912 */
LL_LPUART_IsActiveFlag_TXFE(const USART_TypeDef * LPUARTx)1913 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(const USART_TypeDef *LPUARTx)
1914 {
1915 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)) ? 1UL : 0UL);
1916 }
1917
1918 /**
1919 * @brief Check if the LPUART RX FIFO Full Flag is set or not
1920 * @rmtoll ISR RXFF LL_LPUART_IsActiveFlag_RXFF
1921 * @param LPUARTx LPUART Instance
1922 * @retval State of bit (1 or 0).
1923 */
LL_LPUART_IsActiveFlag_RXFF(const USART_TypeDef * LPUARTx)1924 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(const USART_TypeDef *LPUARTx)
1925 {
1926 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)) ? 1UL : 0UL);
1927 }
1928
1929 /**
1930 * @brief Check if the LPUART TX FIFO Threshold Flag is set or not
1931 * @rmtoll ISR TXFT LL_LPUART_IsActiveFlag_TXFT
1932 * @param LPUARTx LPUART Instance
1933 * @retval State of bit (1 or 0).
1934 */
LL_LPUART_IsActiveFlag_TXFT(const USART_TypeDef * LPUARTx)1935 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(const USART_TypeDef *LPUARTx)
1936 {
1937 return ((READ_BIT(LPUARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)) ? 1UL : 0UL);
1938 }
1939
1940 /**
1941 * @brief Check if the LPUART RX FIFO Threshold Flag is set or not
1942 * @rmtoll ISR RXFT LL_LPUART_IsActiveFlag_RXFT
1943 * @param LPUARTx LPUART Instance
1944 * @retval State of bit (1 or 0).
1945 */
LL_LPUART_IsActiveFlag_RXFT(const USART_TypeDef * LPUARTx)1946 __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(const USART_TypeDef *LPUARTx)
1947 {
1948 return ((READ_BIT(LPUARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)) ? 1UL : 0UL);
1949 }
1950 #endif /* USART_CR1_FIFOEN */
1951
1952 /**
1953 * @brief Clear Parity Error Flag
1954 * @rmtoll ICR PECF LL_LPUART_ClearFlag_PE
1955 * @param LPUARTx LPUART Instance
1956 * @retval None
1957 */
LL_LPUART_ClearFlag_PE(USART_TypeDef * LPUARTx)1958 __STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
1959 {
1960 WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
1961 }
1962
1963 /**
1964 * @brief Clear Framing Error Flag
1965 * @rmtoll ICR FECF LL_LPUART_ClearFlag_FE
1966 * @param LPUARTx LPUART Instance
1967 * @retval None
1968 */
LL_LPUART_ClearFlag_FE(USART_TypeDef * LPUARTx)1969 __STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
1970 {
1971 WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
1972 }
1973
1974 /**
1975 * @brief Clear Noise detected Flag
1976 * @rmtoll ICR NECF LL_LPUART_ClearFlag_NE
1977 * @param LPUARTx LPUART Instance
1978 * @retval None
1979 */
LL_LPUART_ClearFlag_NE(USART_TypeDef * LPUARTx)1980 __STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
1981 {
1982 WRITE_REG(LPUARTx->ICR, USART_ICR_NECF);
1983 }
1984
1985 /**
1986 * @brief Clear OverRun Error Flag
1987 * @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE
1988 * @param LPUARTx LPUART Instance
1989 * @retval None
1990 */
LL_LPUART_ClearFlag_ORE(USART_TypeDef * LPUARTx)1991 __STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
1992 {
1993 WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
1994 }
1995
1996 /**
1997 * @brief Clear IDLE line detected Flag
1998 * @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE
1999 * @param LPUARTx LPUART Instance
2000 * @retval None
2001 */
LL_LPUART_ClearFlag_IDLE(USART_TypeDef * LPUARTx)2002 __STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
2003 {
2004 WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
2005 }
2006
2007 /**
2008 * @brief Clear Transmission Complete Flag
2009 * @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC
2010 * @param LPUARTx LPUART Instance
2011 * @retval None
2012 */
LL_LPUART_ClearFlag_TC(USART_TypeDef * LPUARTx)2013 __STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
2014 {
2015 WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
2016 }
2017
2018 /**
2019 * @brief Clear CTS Interrupt Flag
2020 * @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS
2021 * @param LPUARTx LPUART Instance
2022 * @retval None
2023 */
LL_LPUART_ClearFlag_nCTS(USART_TypeDef * LPUARTx)2024 __STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
2025 {
2026 WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
2027 }
2028
2029 /**
2030 * @brief Clear Character Match Flag
2031 * @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM
2032 * @param LPUARTx LPUART Instance
2033 * @retval None
2034 */
LL_LPUART_ClearFlag_CM(USART_TypeDef * LPUARTx)2035 __STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
2036 {
2037 WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
2038 }
2039
2040 /**
2041 * @brief Clear Wake Up from stop mode Flag
2042 * @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP
2043 * @param LPUARTx LPUART Instance
2044 * @retval None
2045 */
LL_LPUART_ClearFlag_WKUP(USART_TypeDef * LPUARTx)2046 __STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
2047 {
2048 WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
2049 }
2050
2051 /**
2052 * @}
2053 */
2054
2055 /** @defgroup LPUART_LL_EF_IT_Management IT_Management
2056 * @{
2057 */
2058
2059 /**
2060 * @brief Enable IDLE Interrupt
2061 * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE
2062 * @param LPUARTx LPUART Instance
2063 * @retval None
2064 */
LL_LPUART_EnableIT_IDLE(USART_TypeDef * LPUARTx)2065 __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
2066 {
2067 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
2068 }
2069
2070 #if defined(USART_CR1_FIFOEN)
2071 #define LL_LPUART_EnableIT_RXNE LL_LPUART_EnableIT_RXNE_RXFNE /* Redefinition for legacy purpose */
2072
2073 /**
2074 * @brief Enable RX Not Empty and RX FIFO Not Empty Interrupt
2075 * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_EnableIT_RXNE_RXFNE
2076 * @param LPUARTx LPUART Instance
2077 * @retval None
2078 */
LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef * LPUARTx)2079 __STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
2080 {
2081 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
2082 }
2083 #else
2084
2085 /**
2086 * @brief Enable RX Not Empty Interrupt
2087 * @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE
2088 * @param LPUARTx LPUART Instance
2089 * @retval None
2090 */
LL_LPUART_EnableIT_RXNE(USART_TypeDef * LPUARTx)2091 __STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
2092 {
2093 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
2094 }
2095 #endif /* USART_CR1_FIFOEN */
2096
2097 /**
2098 * @brief Enable Transmission Complete Interrupt
2099 * @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC
2100 * @param LPUARTx LPUART Instance
2101 * @retval None
2102 */
LL_LPUART_EnableIT_TC(USART_TypeDef * LPUARTx)2103 __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
2104 {
2105 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
2106 }
2107
2108 #if defined(USART_CR1_FIFOEN)
2109 #define LL_LPUART_EnableIT_TXE LL_LPUART_EnableIT_TXE_TXFNF /* Redefinition for legacy purpose */
2110
2111 /**
2112 * @brief Enable TX Empty and TX FIFO Not Full Interrupt
2113 * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_EnableIT_TXE_TXFNF
2114 * @param LPUARTx LPUART Instance
2115 * @retval None
2116 */
LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef * LPUARTx)2117 __STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
2118 {
2119 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
2120 }
2121 #else
2122
2123 /**
2124 * @brief Enable TX Empty Interrupt
2125 * @rmtoll CR1 TXEIE LL_LPUART_EnableIT_TXE
2126 * @param LPUARTx LPUART Instance
2127 * @retval None
2128 */
LL_LPUART_EnableIT_TXE(USART_TypeDef * LPUARTx)2129 __STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
2130 {
2131 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
2132 }
2133 #endif /* USART_CR1_FIFOEN */
2134
2135 /**
2136 * @brief Enable Parity Error Interrupt
2137 * @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE
2138 * @param LPUARTx LPUART Instance
2139 * @retval None
2140 */
LL_LPUART_EnableIT_PE(USART_TypeDef * LPUARTx)2141 __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
2142 {
2143 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
2144 }
2145
2146 /**
2147 * @brief Enable Character Match Interrupt
2148 * @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM
2149 * @param LPUARTx LPUART Instance
2150 * @retval None
2151 */
LL_LPUART_EnableIT_CM(USART_TypeDef * LPUARTx)2152 __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
2153 {
2154 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
2155 }
2156
2157 #if defined(USART_CR1_FIFOEN)
2158 /**
2159 * @brief Enable TX FIFO Empty Interrupt
2160 * @rmtoll CR1 TXFEIE LL_LPUART_EnableIT_TXFE
2161 * @param LPUARTx LPUART Instance
2162 * @retval None
2163 */
LL_LPUART_EnableIT_TXFE(USART_TypeDef * LPUARTx)2164 __STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx)
2165 {
2166 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
2167 }
2168
2169 /**
2170 * @brief Enable RX FIFO Full Interrupt
2171 * @rmtoll CR1 RXFFIE LL_LPUART_EnableIT_RXFF
2172 * @param LPUARTx LPUART Instance
2173 * @retval None
2174 */
LL_LPUART_EnableIT_RXFF(USART_TypeDef * LPUARTx)2175 __STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx)
2176 {
2177 ATOMIC_SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
2178 }
2179 #endif /* USART_CR1_FIFOEN */
2180
2181 /**
2182 * @brief Enable Error Interrupt
2183 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
2184 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
2185 * - 0: Interrupt is inhibited
2186 * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
2187 * @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR
2188 * @param LPUARTx LPUART Instance
2189 * @retval None
2190 */
LL_LPUART_EnableIT_ERROR(USART_TypeDef * LPUARTx)2191 __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
2192 {
2193 ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
2194 }
2195
2196 /**
2197 * @brief Enable CTS Interrupt
2198 * @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS
2199 * @param LPUARTx LPUART Instance
2200 * @retval None
2201 */
LL_LPUART_EnableIT_CTS(USART_TypeDef * LPUARTx)2202 __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
2203 {
2204 ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
2205 }
2206
2207 /**
2208 * @brief Enable Wake Up from Stop Mode Interrupt
2209 * @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP
2210 * @param LPUARTx LPUART Instance
2211 * @retval None
2212 */
LL_LPUART_EnableIT_WKUP(USART_TypeDef * LPUARTx)2213 __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
2214 {
2215 ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
2216 }
2217
2218 #if defined(USART_CR1_FIFOEN)
2219 /**
2220 * @brief Enable TX FIFO Threshold Interrupt
2221 * @rmtoll CR3 TXFTIE LL_LPUART_EnableIT_TXFT
2222 * @param LPUARTx LPUART Instance
2223 * @retval None
2224 */
LL_LPUART_EnableIT_TXFT(USART_TypeDef * LPUARTx)2225 __STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx)
2226 {
2227 ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
2228 }
2229
2230 /**
2231 * @brief Enable RX FIFO Threshold Interrupt
2232 * @rmtoll CR3 RXFTIE LL_LPUART_EnableIT_RXFT
2233 * @param LPUARTx LPUART Instance
2234 * @retval None
2235 */
LL_LPUART_EnableIT_RXFT(USART_TypeDef * LPUARTx)2236 __STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx)
2237 {
2238 ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
2239 }
2240 #endif /* USART_CR1_FIFOEN */
2241
2242 /**
2243 * @brief Disable IDLE Interrupt
2244 * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE
2245 * @param LPUARTx LPUART Instance
2246 * @retval None
2247 */
LL_LPUART_DisableIT_IDLE(USART_TypeDef * LPUARTx)2248 __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
2249 {
2250 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
2251 }
2252
2253 #if defined(USART_CR1_FIFOEN)
2254 #define LL_LPUART_DisableIT_RXNE LL_LPUART_DisableIT_RXNE_RXFNE /* Redefinition for legacy purpose */
2255
2256 /**
2257 * @brief Disable RX Not Empty and RX FIFO Not Empty Interrupt
2258 * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_DisableIT_RXNE_RXFNE
2259 * @param LPUARTx LPUART Instance
2260 * @retval None
2261 */
LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef * LPUARTx)2262 __STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx)
2263 {
2264 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE);
2265 }
2266 #else
2267
2268 /**
2269 * @brief Disable RX Not Empty Interrupt
2270 * @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE
2271 * @param LPUARTx LPUART Instance
2272 * @retval None
2273 */
LL_LPUART_DisableIT_RXNE(USART_TypeDef * LPUARTx)2274 __STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
2275 {
2276 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
2277 }
2278 #endif /* USART_CR1_FIFOEN */
2279
2280 /**
2281 * @brief Disable Transmission Complete Interrupt
2282 * @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC
2283 * @param LPUARTx LPUART Instance
2284 * @retval None
2285 */
LL_LPUART_DisableIT_TC(USART_TypeDef * LPUARTx)2286 __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
2287 {
2288 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
2289 }
2290
2291 #if defined(USART_CR1_FIFOEN)
2292 #define LL_LPUART_DisableIT_TXE LL_LPUART_DisableIT_TXE_TXFNF /* Redefinition for legacy purpose */
2293
2294 /**
2295 * @brief Disable TX Empty and TX FIFO Not Full Interrupt
2296 * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_DisableIT_TXE_TXFNF
2297 * @param LPUARTx LPUART Instance
2298 * @retval None
2299 */
LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef * LPUARTx)2300 __STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx)
2301 {
2302 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE);
2303 }
2304 #else
2305
2306 /**
2307 * @brief Disable TX Empty Interrupt
2308 * @rmtoll CR1 TXEIE LL_LPUART_DisableIT_TXE
2309 * @param LPUARTx LPUART Instance
2310 * @retval None
2311 */
LL_LPUART_DisableIT_TXE(USART_TypeDef * LPUARTx)2312 __STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
2313 {
2314 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
2315 }
2316 #endif /* USART_CR1_FIFOEN */
2317
2318 /**
2319 * @brief Disable Parity Error Interrupt
2320 * @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE
2321 * @param LPUARTx LPUART Instance
2322 * @retval None
2323 */
LL_LPUART_DisableIT_PE(USART_TypeDef * LPUARTx)2324 __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
2325 {
2326 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
2327 }
2328
2329 /**
2330 * @brief Disable Character Match Interrupt
2331 * @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM
2332 * @param LPUARTx LPUART Instance
2333 * @retval None
2334 */
LL_LPUART_DisableIT_CM(USART_TypeDef * LPUARTx)2335 __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
2336 {
2337 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
2338 }
2339
2340 #if defined(USART_CR1_FIFOEN)
2341 /**
2342 * @brief Disable TX FIFO Empty Interrupt
2343 * @rmtoll CR1 TXFEIE LL_LPUART_DisableIT_TXFE
2344 * @param LPUARTx LPUART Instance
2345 * @retval None
2346 */
LL_LPUART_DisableIT_TXFE(USART_TypeDef * LPUARTx)2347 __STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx)
2348 {
2349 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE);
2350 }
2351
2352 /**
2353 * @brief Disable RX FIFO Full Interrupt
2354 * @rmtoll CR1 RXFFIE LL_LPUART_DisableIT_RXFF
2355 * @param LPUARTx LPUART Instance
2356 * @retval None
2357 */
LL_LPUART_DisableIT_RXFF(USART_TypeDef * LPUARTx)2358 __STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx)
2359 {
2360 ATOMIC_CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE);
2361 }
2362 #endif /* USART_CR1_FIFOEN */
2363
2364 /**
2365 * @brief Disable Error Interrupt
2366 * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
2367 * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
2368 * - 0: Interrupt is inhibited
2369 * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
2370 * @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR
2371 * @param LPUARTx LPUART Instance
2372 * @retval None
2373 */
LL_LPUART_DisableIT_ERROR(USART_TypeDef * LPUARTx)2374 __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
2375 {
2376 ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
2377 }
2378
2379 /**
2380 * @brief Disable CTS Interrupt
2381 * @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS
2382 * @param LPUARTx LPUART Instance
2383 * @retval None
2384 */
LL_LPUART_DisableIT_CTS(USART_TypeDef * LPUARTx)2385 __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
2386 {
2387 ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
2388 }
2389
2390 /**
2391 * @brief Disable Wake Up from Stop Mode Interrupt
2392 * @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP
2393 * @param LPUARTx LPUART Instance
2394 * @retval None
2395 */
LL_LPUART_DisableIT_WKUP(USART_TypeDef * LPUARTx)2396 __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
2397 {
2398 ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
2399 }
2400
2401 #if defined(USART_CR1_FIFOEN)
2402 /**
2403 * @brief Disable TX FIFO Threshold Interrupt
2404 * @rmtoll CR3 TXFTIE LL_LPUART_DisableIT_TXFT
2405 * @param LPUARTx LPUART Instance
2406 * @retval None
2407 */
LL_LPUART_DisableIT_TXFT(USART_TypeDef * LPUARTx)2408 __STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx)
2409 {
2410 ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE);
2411 }
2412
2413 /**
2414 * @brief Disable RX FIFO Threshold Interrupt
2415 * @rmtoll CR3 RXFTIE LL_LPUART_DisableIT_RXFT
2416 * @param LPUARTx LPUART Instance
2417 * @retval None
2418 */
LL_LPUART_DisableIT_RXFT(USART_TypeDef * LPUARTx)2419 __STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx)
2420 {
2421 ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE);
2422 }
2423 #endif /* USART_CR1_FIFOEN */
2424
2425 /**
2426 * @brief Check if the LPUART IDLE Interrupt source is enabled or disabled.
2427 * @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE
2428 * @param LPUARTx LPUART Instance
2429 * @retval State of bit (1 or 0).
2430 */
LL_LPUART_IsEnabledIT_IDLE(const USART_TypeDef * LPUARTx)2431 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(const USART_TypeDef *LPUARTx)
2432 {
2433 return ((READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
2434 }
2435
2436 #if defined(USART_CR1_FIFOEN)
2437 #define LL_LPUART_IsEnabledIT_RXNE LL_LPUART_IsEnabledIT_RXNE_RXFNE /* Redefinition for legacy purpose */
2438
2439 /**
2440 * @brief Check if the LPUART RX Not Empty and LPUART RX FIFO Not Empty Interrupt is enabled or disabled.
2441 * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_IsEnabledIT_RXNE_RXFNE
2442 * @param LPUARTx LPUART Instance
2443 * @retval State of bit (1 or 0).
2444 */
LL_LPUART_IsEnabledIT_RXNE_RXFNE(const USART_TypeDef * LPUARTx)2445 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(const USART_TypeDef *LPUARTx)
2446 {
2447 return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)) ? 1UL : 0UL);
2448 }
2449 #else
2450
2451 /**
2452 * @brief Check if the LPUART RX Not Empty Interrupt is enabled or disabled.
2453 * @rmtoll CR1 RXNEIE LL_LPUART_IsEnabledIT_RXNE
2454 * @param LPUARTx LPUART Instance
2455 * @retval State of bit (1 or 0).
2456 */
LL_LPUART_IsEnabledIT_RXNE(const USART_TypeDef * LPUARTx)2457 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(const USART_TypeDef *LPUARTx)
2458 {
2459 return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1UL : 0UL);
2460 }
2461 #endif /* USART_CR1_FIFOEN */
2462
2463 /**
2464 * @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled.
2465 * @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC
2466 * @param LPUARTx LPUART Instance
2467 * @retval State of bit (1 or 0).
2468 */
LL_LPUART_IsEnabledIT_TC(const USART_TypeDef * LPUARTx)2469 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(const USART_TypeDef *LPUARTx)
2470 {
2471 return ((READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
2472 }
2473
2474 #if defined(USART_CR1_FIFOEN)
2475 #define LL_LPUART_IsEnabledIT_TXE LL_LPUART_IsEnabledIT_TXE_TXFNF /* Redefinition for legacy purpose */
2476
2477 /**
2478 * @brief Check if the LPUART TX Empty and LPUART TX FIFO Not Full Interrupt is enabled or disabled
2479 * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_IsEnabledIT_TXE_TXFNF
2480 * @param LPUARTx LPUART Instance
2481 * @retval State of bit (1 or 0).
2482 */
LL_LPUART_IsEnabledIT_TXE_TXFNF(const USART_TypeDef * LPUARTx)2483 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(const USART_TypeDef *LPUARTx)
2484 {
2485 return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)) ? 1UL : 0UL);
2486 }
2487 #else
2488
2489 /**
2490 * @brief Check if the LPUART TX Empty Interrupt is enabled or disabled.
2491 * @rmtoll CR1 TXEIE LL_LPUART_IsEnabledIT_TXE
2492 * @param LPUARTx LPUART Instance
2493 * @retval State of bit (1 or 0).
2494 */
LL_LPUART_IsEnabledIT_TXE(const USART_TypeDef * LPUARTx)2495 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(const USART_TypeDef *LPUARTx)
2496 {
2497 return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1UL : 0UL);
2498 }
2499 #endif /* USART_CR1_FIFOEN */
2500
2501 /**
2502 * @brief Check if the LPUART Parity Error Interrupt is enabled or disabled.
2503 * @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE
2504 * @param LPUARTx LPUART Instance
2505 * @retval State of bit (1 or 0).
2506 */
LL_LPUART_IsEnabledIT_PE(const USART_TypeDef * LPUARTx)2507 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(const USART_TypeDef *LPUARTx)
2508 {
2509 return ((READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
2510 }
2511
2512 /**
2513 * @brief Check if the LPUART Character Match Interrupt is enabled or disabled.
2514 * @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM
2515 * @param LPUARTx LPUART Instance
2516 * @retval State of bit (1 or 0).
2517 */
LL_LPUART_IsEnabledIT_CM(const USART_TypeDef * LPUARTx)2518 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(const USART_TypeDef *LPUARTx)
2519 {
2520 return ((READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
2521 }
2522
2523 #if defined(USART_CR1_FIFOEN)
2524 /**
2525 * @brief Check if the LPUART TX FIFO Empty Interrupt is enabled or disabled
2526 * @rmtoll CR1 TXFEIE LL_LPUART_IsEnabledIT_TXFE
2527 * @param LPUARTx LPUART Instance
2528 * @retval State of bit (1 or 0).
2529 */
LL_LPUART_IsEnabledIT_TXFE(const USART_TypeDef * LPUARTx)2530 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(const USART_TypeDef *LPUARTx)
2531 {
2532 return ((READ_BIT(LPUARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)) ? 1UL : 0UL);
2533 }
2534
2535 /**
2536 * @brief Check if the LPUART RX FIFO Full Interrupt is enabled or disabled
2537 * @rmtoll CR1 RXFFIE LL_LPUART_IsEnabledIT_RXFF
2538 * @param LPUARTx LPUART Instance
2539 * @retval State of bit (1 or 0).
2540 */
LL_LPUART_IsEnabledIT_RXFF(const USART_TypeDef * LPUARTx)2541 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(const USART_TypeDef *LPUARTx)
2542 {
2543 return ((READ_BIT(LPUARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)) ? 1UL : 0UL);
2544 }
2545 #endif /* USART_CR1_FIFOEN */
2546
2547 /**
2548 * @brief Check if the LPUART Error Interrupt is enabled or disabled.
2549 * @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR
2550 * @param LPUARTx LPUART Instance
2551 * @retval State of bit (1 or 0).
2552 */
LL_LPUART_IsEnabledIT_ERROR(const USART_TypeDef * LPUARTx)2553 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(const USART_TypeDef *LPUARTx)
2554 {
2555 return ((READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
2556 }
2557
2558 /**
2559 * @brief Check if the LPUART CTS Interrupt is enabled or disabled.
2560 * @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS
2561 * @param LPUARTx LPUART Instance
2562 * @retval State of bit (1 or 0).
2563 */
LL_LPUART_IsEnabledIT_CTS(const USART_TypeDef * LPUARTx)2564 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(const USART_TypeDef *LPUARTx)
2565 {
2566 return ((READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
2567 }
2568
2569 /**
2570 * @brief Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled.
2571 * @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP
2572 * @param LPUARTx LPUART Instance
2573 * @retval State of bit (1 or 0).
2574 */
LL_LPUART_IsEnabledIT_WKUP(const USART_TypeDef * LPUARTx)2575 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(const USART_TypeDef *LPUARTx)
2576 {
2577 return ((READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
2578 }
2579
2580 #if defined(USART_CR1_FIFOEN)
2581 /**
2582 * @brief Check if LPUART TX FIFO Threshold Interrupt is enabled or disabled
2583 * @rmtoll CR3 TXFTIE LL_LPUART_IsEnabledIT_TXFT
2584 * @param LPUARTx LPUART Instance
2585 * @retval State of bit (1 or 0).
2586 */
LL_LPUART_IsEnabledIT_TXFT(const USART_TypeDef * LPUARTx)2587 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(const USART_TypeDef *LPUARTx)
2588 {
2589 return ((READ_BIT(LPUARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)) ? 1UL : 0UL);
2590 }
2591
2592 /**
2593 * @brief Check if LPUART RX FIFO Threshold Interrupt is enabled or disabled
2594 * @rmtoll CR3 RXFTIE LL_LPUART_IsEnabledIT_RXFT
2595 * @param LPUARTx LPUART Instance
2596 * @retval State of bit (1 or 0).
2597 */
LL_LPUART_IsEnabledIT_RXFT(const USART_TypeDef * LPUARTx)2598 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(const USART_TypeDef *LPUARTx)
2599 {
2600 return ((READ_BIT(LPUARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)) ? 1UL : 0UL);
2601 }
2602 #endif /* USART_CR1_FIFOEN */
2603
2604 /**
2605 * @}
2606 */
2607
2608 /** @defgroup LPUART_LL_EF_DMA_Management DMA_Management
2609 * @{
2610 */
2611
2612 /**
2613 * @brief Enable DMA Mode for reception
2614 * @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX
2615 * @param LPUARTx LPUART Instance
2616 * @retval None
2617 */
LL_LPUART_EnableDMAReq_RX(USART_TypeDef * LPUARTx)2618 __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
2619 {
2620 ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
2621 }
2622
2623 /**
2624 * @brief Disable DMA Mode for reception
2625 * @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX
2626 * @param LPUARTx LPUART Instance
2627 * @retval None
2628 */
LL_LPUART_DisableDMAReq_RX(USART_TypeDef * LPUARTx)2629 __STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
2630 {
2631 ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
2632 }
2633
2634 /**
2635 * @brief Check if DMA Mode is enabled for reception
2636 * @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX
2637 * @param LPUARTx LPUART Instance
2638 * @retval State of bit (1 or 0).
2639 */
LL_LPUART_IsEnabledDMAReq_RX(const USART_TypeDef * LPUARTx)2640 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(const USART_TypeDef *LPUARTx)
2641 {
2642 return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
2643 }
2644
2645 /**
2646 * @brief Enable DMA Mode for transmission
2647 * @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX
2648 * @param LPUARTx LPUART Instance
2649 * @retval None
2650 */
LL_LPUART_EnableDMAReq_TX(USART_TypeDef * LPUARTx)2651 __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
2652 {
2653 ATOMIC_SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
2654 }
2655
2656 /**
2657 * @brief Disable DMA Mode for transmission
2658 * @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX
2659 * @param LPUARTx LPUART Instance
2660 * @retval None
2661 */
LL_LPUART_DisableDMAReq_TX(USART_TypeDef * LPUARTx)2662 __STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
2663 {
2664 ATOMIC_CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
2665 }
2666
2667 /**
2668 * @brief Check if DMA Mode is enabled for transmission
2669 * @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX
2670 * @param LPUARTx LPUART Instance
2671 * @retval State of bit (1 or 0).
2672 */
LL_LPUART_IsEnabledDMAReq_TX(const USART_TypeDef * LPUARTx)2673 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(const USART_TypeDef *LPUARTx)
2674 {
2675 return ((READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
2676 }
2677
2678 /**
2679 * @brief Enable DMA Disabling on Reception Error
2680 * @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr
2681 * @param LPUARTx LPUART Instance
2682 * @retval None
2683 */
LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef * LPUARTx)2684 __STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
2685 {
2686 SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
2687 }
2688
2689 /**
2690 * @brief Disable DMA Disabling on Reception Error
2691 * @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr
2692 * @param LPUARTx LPUART Instance
2693 * @retval None
2694 */
LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef * LPUARTx)2695 __STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
2696 {
2697 CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
2698 }
2699
2700 /**
2701 * @brief Indicate if DMA Disabling on Reception Error is disabled
2702 * @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr
2703 * @param LPUARTx LPUART Instance
2704 * @retval State of bit (1 or 0).
2705 */
LL_LPUART_IsEnabledDMADeactOnRxErr(const USART_TypeDef * LPUARTx)2706 __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(const USART_TypeDef *LPUARTx)
2707 {
2708 return ((READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
2709 }
2710
2711 /**
2712 * @brief Get the LPUART data register address used for DMA transfer
2713 * @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n
2714 * @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr
2715 * @param LPUARTx LPUART Instance
2716 * @param Direction This parameter can be one of the following values:
2717 * @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT
2718 * @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE
2719 * @retval Address of data register
2720 */
LL_LPUART_DMA_GetRegAddr(const USART_TypeDef * LPUARTx,uint32_t Direction)2721 __STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(const USART_TypeDef *LPUARTx, uint32_t Direction)
2722 {
2723 uint32_t data_reg_addr;
2724
2725 if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
2726 {
2727 /* return address of TDR register */
2728 data_reg_addr = (uint32_t) &(LPUARTx->TDR);
2729 }
2730 else
2731 {
2732 /* return address of RDR register */
2733 data_reg_addr = (uint32_t) &(LPUARTx->RDR);
2734 }
2735
2736 return data_reg_addr;
2737 }
2738
2739 /**
2740 * @}
2741 */
2742
2743 /** @defgroup LPUART_LL_EF_Data_Management Data_Management
2744 * @{
2745 */
2746
2747 /**
2748 * @brief Read Receiver Data register (Receive Data value, 8 bits)
2749 * @rmtoll RDR RDR LL_LPUART_ReceiveData8
2750 * @param LPUARTx LPUART Instance
2751 * @retval Time Value between Min_Data=0x00 and Max_Data=0xFF
2752 */
LL_LPUART_ReceiveData8(const USART_TypeDef * LPUARTx)2753 __STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(const USART_TypeDef *LPUARTx)
2754 {
2755 return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR) & 0xFFU);
2756 }
2757
2758 /**
2759 * @brief Read Receiver Data register (Receive Data value, 9 bits)
2760 * @rmtoll RDR RDR LL_LPUART_ReceiveData9
2761 * @param LPUARTx LPUART Instance
2762 * @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF
2763 */
LL_LPUART_ReceiveData9(const USART_TypeDef * LPUARTx)2764 __STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(const USART_TypeDef *LPUARTx)
2765 {
2766 return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
2767 }
2768
2769 /**
2770 * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
2771 * @rmtoll TDR TDR LL_LPUART_TransmitData8
2772 * @param LPUARTx LPUART Instance
2773 * @param Value between Min_Data=0x00 and Max_Data=0xFF
2774 * @retval None
2775 */
LL_LPUART_TransmitData8(USART_TypeDef * LPUARTx,uint8_t Value)2776 __STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
2777 {
2778 LPUARTx->TDR = Value;
2779 }
2780
2781 /**
2782 * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
2783 * @rmtoll TDR TDR LL_LPUART_TransmitData9
2784 * @param LPUARTx LPUART Instance
2785 * @param Value between Min_Data=0x00 and Max_Data=0x1FF
2786 * @retval None
2787 */
LL_LPUART_TransmitData9(USART_TypeDef * LPUARTx,uint16_t Value)2788 __STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
2789 {
2790 LPUARTx->TDR = Value & 0x1FFUL;
2791 }
2792
2793 /**
2794 * @}
2795 */
2796
2797 /** @defgroup LPUART_LL_EF_Execution Execution
2798 * @{
2799 */
2800
2801 /**
2802 * @brief Request Break sending
2803 * @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending
2804 * @param LPUARTx LPUART Instance
2805 * @retval None
2806 */
LL_LPUART_RequestBreakSending(USART_TypeDef * LPUARTx)2807 __STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
2808 {
2809 SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_SBKRQ);
2810 }
2811
2812 /**
2813 * @brief Put LPUART in mute mode and set the RWU flag
2814 * @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode
2815 * @param LPUARTx LPUART Instance
2816 * @retval None
2817 */
LL_LPUART_RequestEnterMuteMode(USART_TypeDef * LPUARTx)2818 __STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
2819 {
2820 SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_MMRQ);
2821 }
2822
2823 /**
2824 @if USART_CR1_FIFOEN
2825 * @brief Request a Receive Data and FIFO flush
2826 * @note Allows to discard the received data without reading them, and avoid an overrun
2827 * condition.
2828 @else
2829 * @brief Request a Receive Data flush
2830 @endif
2831 * @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush
2832 * @param LPUARTx LPUART Instance
2833 * @retval None
2834 */
LL_LPUART_RequestRxDataFlush(USART_TypeDef * LPUARTx)2835 __STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
2836 {
2837 SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_RXFRQ);
2838 }
2839
2840 #if defined(USART_CR1_FIFOEN)
2841 /**
2842 * @brief Request a Transmit data FIFO flush
2843 * @note TXFRQ bit is set to flush the whole FIFO when FIFO mode is enabled. This
2844 * also sets the flag TXFE (TXFIFO empty bit in the LPUART_ISR register).
2845 * @note Macro IS_UART_FIFO_INSTANCE(USARTx) can be used to check whether or not
2846 * FIFO mode feature is supported by the USARTx instance.
2847 * @rmtoll RQR TXFRQ LL_LPUART_RequestTxDataFlush
2848 * @param LPUARTx LPUART Instance
2849 * @retval None
2850 */
LL_LPUART_RequestTxDataFlush(USART_TypeDef * LPUARTx)2851 __STATIC_INLINE void LL_LPUART_RequestTxDataFlush(USART_TypeDef *LPUARTx)
2852 {
2853 SET_BIT(LPUARTx->RQR, (uint16_t)USART_RQR_TXFRQ);
2854 }
2855
2856 #endif /* USART_CR1_FIFOEN */
2857 /**
2858 * @}
2859 */
2860
2861 #if defined(USE_FULL_LL_DRIVER)
2862 /** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions
2863 * @{
2864 */
2865 ErrorStatus LL_LPUART_DeInit(const USART_TypeDef *LPUARTx);
2866 ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, const LL_LPUART_InitTypeDef *LPUART_InitStruct);
2867 void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct);
2868 /**
2869 * @}
2870 */
2871 #endif /* USE_FULL_LL_DRIVER */
2872
2873 /**
2874 * @}
2875 */
2876
2877 /**
2878 * @}
2879 */
2880
2881 #endif /* LPUART1 */
2882
2883 /**
2884 * @}
2885 */
2886
2887 #ifdef __cplusplus
2888 }
2889 #endif
2890
2891 #endif /* STM32L4xx_LL_LPUART_H */
2892
2893
