1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_uart_ex.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL Extended module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_UART_EX_H 21 #define STM32L4xx_HAL_UART_EX_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UARTEx 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UARTEx_Exported_Types UARTEx Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART wake up from stop mode parameters 45 */ 46 typedef struct 47 { 48 uint32_t WakeUpEvent; /*!< Specifies which event will activate the Wakeup from Stop mode flag (WUF). 49 This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection. 50 If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must 51 be filled up. */ 52 53 uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long. 54 This parameter can be a value of @ref UARTEx_WakeUp_Address_Length. */ 55 56 uint8_t Address; /*!< UART/USART node address (7-bit long max). */ 57 } UART_WakeUpTypeDef; 58 59 /** 60 * @} 61 */ 62 63 /* Exported constants --------------------------------------------------------*/ 64 /** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants 65 * @{ 66 */ 67 68 /** @defgroup UARTEx_Word_Length UARTEx Word Length 69 * @{ 70 */ 71 #define UART_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long UART frame */ 72 #define UART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long UART frame */ 73 #define UART_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long UART frame */ 74 /** 75 * @} 76 */ 77 78 /** @defgroup UARTEx_WakeUp_Address_Length UARTEx WakeUp Address Length 79 * @{ 80 */ 81 #define UART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit long wake-up address */ 82 #define UART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit long wake-up address */ 83 /** 84 * @} 85 */ 86 87 #if defined(USART_CR1_FIFOEN) 88 /** @defgroup UARTEx_FIFO_mode UARTEx FIFO mode 89 * @brief UART FIFO mode 90 * @{ 91 */ 92 #define UART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ 93 #define UART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ 94 /** 95 * @} 96 */ 97 98 /** @defgroup UARTEx_TXFIFO_threshold_level UARTEx TXFIFO threshold level 99 * @brief UART TXFIFO threshold level 100 * @{ 101 */ 102 #define UART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TX FIFO reaches 1/8 of its depth */ 103 #define UART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TX FIFO reaches 1/4 of its depth */ 104 #define UART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TX FIFO reaches 1/2 of its depth */ 105 #define UART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TX FIFO reaches 3/4 of its depth */ 106 #define UART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TX FIFO reaches 7/8 of its depth */ 107 #define UART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TX FIFO becomes empty */ 108 /** 109 * @} 110 */ 111 112 /** @defgroup UARTEx_RXFIFO_threshold_level UARTEx RXFIFO threshold level 113 * @brief UART RXFIFO threshold level 114 * @{ 115 */ 116 #define UART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RX FIFO reaches 1/8 of its depth */ 117 #define UART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RX FIFO reaches 1/4 of its depth */ 118 #define UART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RX FIFO reaches 1/2 of its depth */ 119 #define UART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RX FIFO reaches 3/4 of its depth */ 120 #define UART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RX FIFO reaches 7/8 of its depth */ 121 #define UART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RX FIFO becomes full */ 122 /** 123 * @} 124 */ 125 126 #endif /* USART_CR1_FIFOEN */ 127 /** 128 * @} 129 */ 130 131 /* Exported macros -----------------------------------------------------------*/ 132 /* Exported functions --------------------------------------------------------*/ 133 /** @addtogroup UARTEx_Exported_Functions 134 * @{ 135 */ 136 137 /** @addtogroup UARTEx_Exported_Functions_Group1 138 * @{ 139 */ 140 141 /* Initialization and de-initialization functions ****************************/ 142 HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, 143 uint32_t DeassertionTime); 144 145 /** 146 * @} 147 */ 148 149 /** @addtogroup UARTEx_Exported_Functions_Group2 150 * @{ 151 */ 152 153 void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart); 154 155 #if defined(USART_CR1_FIFOEN) 156 void HAL_UARTEx_RxFifoFullCallback(UART_HandleTypeDef *huart); 157 void HAL_UARTEx_TxFifoEmptyCallback(UART_HandleTypeDef *huart); 158 159 #endif /* USART_CR1_FIFOEN */ 160 /** 161 * @} 162 */ 163 164 /** @addtogroup UARTEx_Exported_Functions_Group3 165 * @{ 166 */ 167 168 /* Peripheral Control functions **********************************************/ 169 HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection); 170 HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart); 171 HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart); 172 173 #if defined(USART_CR3_UCESM) 174 HAL_StatusTypeDef HAL_UARTEx_EnableClockStopMode(UART_HandleTypeDef *huart); 175 HAL_StatusTypeDef HAL_UARTEx_DisableClockStopMode(UART_HandleTypeDef *huart); 176 177 #endif /* USART_CR3_UCESM */ 178 HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength); 179 180 #if defined(USART_CR1_FIFOEN) 181 HAL_StatusTypeDef HAL_UARTEx_EnableFifoMode(UART_HandleTypeDef *huart); 182 HAL_StatusTypeDef HAL_UARTEx_DisableFifoMode(UART_HandleTypeDef *huart); 183 HAL_StatusTypeDef HAL_UARTEx_SetTxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 184 HAL_StatusTypeDef HAL_UARTEx_SetRxFifoThreshold(UART_HandleTypeDef *huart, uint32_t Threshold); 185 #endif /* USART_CR1_FIFOEN */ 186 187 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint16_t *RxLen, 188 uint32_t Timeout); 189 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 190 HAL_StatusTypeDef HAL_UARTEx_ReceiveToIdle_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 191 192 HAL_UART_RxEventTypeTypeDef HAL_UARTEx_GetRxEventType(const UART_HandleTypeDef *huart); 193 194 195 /** 196 * @} 197 */ 198 199 /** 200 * @} 201 */ 202 203 /* Private macros ------------------------------------------------------------*/ 204 /** @defgroup UARTEx_Private_Macros UARTEx Private Macros 205 * @{ 206 */ 207 208 /** @brief Report the UART clock source. 209 * @param __HANDLE__ specifies the UART Handle. 210 * @param __CLOCKSOURCE__ output variable. 211 * @retval UART clocking source, written in __CLOCKSOURCE__. 212 */ 213 #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) \ 214 || defined (STM32L485xx) || defined (STM32L486xx) \ 215 || defined (STM32L496xx) || defined (STM32L4A6xx) \ 216 || defined (STM32L4P5xx) || defined (STM32L4Q5xx) \ 217 || defined (STM32L4R5xx) || defined (STM32L4R7xx) \ 218 || defined (STM32L4R9xx) || defined (STM32L4S5xx) \ 219 || defined (STM32L4S7xx) || defined (STM32L4S9xx) 220 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 221 do { \ 222 if((__HANDLE__)->Instance == USART1) \ 223 { \ 224 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 225 { \ 226 case RCC_USART1CLKSOURCE_PCLK2: \ 227 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 228 break; \ 229 case RCC_USART1CLKSOURCE_HSI: \ 230 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 231 break; \ 232 case RCC_USART1CLKSOURCE_SYSCLK: \ 233 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 234 break; \ 235 case RCC_USART1CLKSOURCE_LSE: \ 236 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 237 break; \ 238 default: \ 239 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 240 break; \ 241 } \ 242 } \ 243 else if((__HANDLE__)->Instance == USART2) \ 244 { \ 245 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 246 { \ 247 case RCC_USART2CLKSOURCE_PCLK1: \ 248 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 249 break; \ 250 case RCC_USART2CLKSOURCE_HSI: \ 251 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 252 break; \ 253 case RCC_USART2CLKSOURCE_SYSCLK: \ 254 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 255 break; \ 256 case RCC_USART2CLKSOURCE_LSE: \ 257 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 258 break; \ 259 default: \ 260 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 261 break; \ 262 } \ 263 } \ 264 else if((__HANDLE__)->Instance == USART3) \ 265 { \ 266 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 267 { \ 268 case RCC_USART3CLKSOURCE_PCLK1: \ 269 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 270 break; \ 271 case RCC_USART3CLKSOURCE_HSI: \ 272 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 273 break; \ 274 case RCC_USART3CLKSOURCE_SYSCLK: \ 275 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 276 break; \ 277 case RCC_USART3CLKSOURCE_LSE: \ 278 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 279 break; \ 280 default: \ 281 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 282 break; \ 283 } \ 284 } \ 285 else if((__HANDLE__)->Instance == UART4) \ 286 { \ 287 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 288 { \ 289 case RCC_UART4CLKSOURCE_PCLK1: \ 290 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 291 break; \ 292 case RCC_UART4CLKSOURCE_HSI: \ 293 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 294 break; \ 295 case RCC_UART4CLKSOURCE_SYSCLK: \ 296 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 297 break; \ 298 case RCC_UART4CLKSOURCE_LSE: \ 299 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 300 break; \ 301 default: \ 302 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 303 break; \ 304 } \ 305 } \ 306 else if((__HANDLE__)->Instance == UART5) \ 307 { \ 308 switch(__HAL_RCC_GET_UART5_SOURCE()) \ 309 { \ 310 case RCC_UART5CLKSOURCE_PCLK1: \ 311 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 312 break; \ 313 case RCC_UART5CLKSOURCE_HSI: \ 314 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 315 break; \ 316 case RCC_UART5CLKSOURCE_SYSCLK: \ 317 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 318 break; \ 319 case RCC_UART5CLKSOURCE_LSE: \ 320 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 321 break; \ 322 default: \ 323 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 324 break; \ 325 } \ 326 } \ 327 else if((__HANDLE__)->Instance == LPUART1) \ 328 { \ 329 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 330 { \ 331 case RCC_LPUART1CLKSOURCE_PCLK1: \ 332 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 333 break; \ 334 case RCC_LPUART1CLKSOURCE_HSI: \ 335 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 336 break; \ 337 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 338 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 339 break; \ 340 case RCC_LPUART1CLKSOURCE_LSE: \ 341 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 342 break; \ 343 default: \ 344 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 345 break; \ 346 } \ 347 } \ 348 else \ 349 { \ 350 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 351 } \ 352 } while(0U) 353 #elif defined (STM32L412xx) || defined (STM32L422xx) \ 354 || defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) 355 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 356 do { \ 357 if((__HANDLE__)->Instance == USART1) \ 358 { \ 359 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 360 { \ 361 case RCC_USART1CLKSOURCE_PCLK2: \ 362 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 363 break; \ 364 case RCC_USART1CLKSOURCE_HSI: \ 365 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 366 break; \ 367 case RCC_USART1CLKSOURCE_SYSCLK: \ 368 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 369 break; \ 370 case RCC_USART1CLKSOURCE_LSE: \ 371 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 372 break; \ 373 default: \ 374 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 375 break; \ 376 } \ 377 } \ 378 else if((__HANDLE__)->Instance == USART2) \ 379 { \ 380 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 381 { \ 382 case RCC_USART2CLKSOURCE_PCLK1: \ 383 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 384 break; \ 385 case RCC_USART2CLKSOURCE_HSI: \ 386 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 387 break; \ 388 case RCC_USART2CLKSOURCE_SYSCLK: \ 389 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 390 break; \ 391 case RCC_USART2CLKSOURCE_LSE: \ 392 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 393 break; \ 394 default: \ 395 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 396 break; \ 397 } \ 398 } \ 399 else if((__HANDLE__)->Instance == USART3) \ 400 { \ 401 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 402 { \ 403 case RCC_USART3CLKSOURCE_PCLK1: \ 404 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 405 break; \ 406 case RCC_USART3CLKSOURCE_HSI: \ 407 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 408 break; \ 409 case RCC_USART3CLKSOURCE_SYSCLK: \ 410 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 411 break; \ 412 case RCC_USART3CLKSOURCE_LSE: \ 413 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 414 break; \ 415 default: \ 416 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 417 break; \ 418 } \ 419 } \ 420 else if((__HANDLE__)->Instance == LPUART1) \ 421 { \ 422 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 423 { \ 424 case RCC_LPUART1CLKSOURCE_PCLK1: \ 425 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 426 break; \ 427 case RCC_LPUART1CLKSOURCE_HSI: \ 428 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 429 break; \ 430 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 431 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 432 break; \ 433 case RCC_LPUART1CLKSOURCE_LSE: \ 434 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 435 break; \ 436 default: \ 437 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 438 break; \ 439 } \ 440 } \ 441 else \ 442 { \ 443 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 444 } \ 445 } while(0U) 446 #elif defined (STM32L432xx) || defined (STM32L442xx) 447 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 448 do { \ 449 if((__HANDLE__)->Instance == USART1) \ 450 { \ 451 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 452 { \ 453 case RCC_USART1CLKSOURCE_PCLK2: \ 454 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 455 break; \ 456 case RCC_USART1CLKSOURCE_HSI: \ 457 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 458 break; \ 459 case RCC_USART1CLKSOURCE_SYSCLK: \ 460 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 461 break; \ 462 case RCC_USART1CLKSOURCE_LSE: \ 463 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 464 break; \ 465 default: \ 466 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 467 break; \ 468 } \ 469 } \ 470 else if((__HANDLE__)->Instance == USART2) \ 471 { \ 472 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 473 { \ 474 case RCC_USART2CLKSOURCE_PCLK1: \ 475 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 476 break; \ 477 case RCC_USART2CLKSOURCE_HSI: \ 478 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 479 break; \ 480 case RCC_USART2CLKSOURCE_SYSCLK: \ 481 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 482 break; \ 483 case RCC_USART2CLKSOURCE_LSE: \ 484 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 485 break; \ 486 default: \ 487 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 488 break; \ 489 } \ 490 } \ 491 else if((__HANDLE__)->Instance == LPUART1) \ 492 { \ 493 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 494 { \ 495 case RCC_LPUART1CLKSOURCE_PCLK1: \ 496 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 497 break; \ 498 case RCC_LPUART1CLKSOURCE_HSI: \ 499 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 500 break; \ 501 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 502 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 503 break; \ 504 case RCC_LPUART1CLKSOURCE_LSE: \ 505 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 506 break; \ 507 default: \ 508 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 509 break; \ 510 } \ 511 } \ 512 else \ 513 { \ 514 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 515 } \ 516 } while(0U) 517 #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) 518 #define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ 519 do { \ 520 if((__HANDLE__)->Instance == USART1) \ 521 { \ 522 switch(__HAL_RCC_GET_USART1_SOURCE()) \ 523 { \ 524 case RCC_USART1CLKSOURCE_PCLK2: \ 525 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK2; \ 526 break; \ 527 case RCC_USART1CLKSOURCE_HSI: \ 528 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 529 break; \ 530 case RCC_USART1CLKSOURCE_SYSCLK: \ 531 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 532 break; \ 533 case RCC_USART1CLKSOURCE_LSE: \ 534 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 535 break; \ 536 default: \ 537 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 538 break; \ 539 } \ 540 } \ 541 else if((__HANDLE__)->Instance == USART2) \ 542 { \ 543 switch(__HAL_RCC_GET_USART2_SOURCE()) \ 544 { \ 545 case RCC_USART2CLKSOURCE_PCLK1: \ 546 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 547 break; \ 548 case RCC_USART2CLKSOURCE_HSI: \ 549 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 550 break; \ 551 case RCC_USART2CLKSOURCE_SYSCLK: \ 552 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 553 break; \ 554 case RCC_USART2CLKSOURCE_LSE: \ 555 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 556 break; \ 557 default: \ 558 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 559 break; \ 560 } \ 561 } \ 562 else if((__HANDLE__)->Instance == USART3) \ 563 { \ 564 switch(__HAL_RCC_GET_USART3_SOURCE()) \ 565 { \ 566 case RCC_USART3CLKSOURCE_PCLK1: \ 567 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 568 break; \ 569 case RCC_USART3CLKSOURCE_HSI: \ 570 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 571 break; \ 572 case RCC_USART3CLKSOURCE_SYSCLK: \ 573 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 574 break; \ 575 case RCC_USART3CLKSOURCE_LSE: \ 576 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 577 break; \ 578 default: \ 579 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 580 break; \ 581 } \ 582 } \ 583 else if((__HANDLE__)->Instance == UART4) \ 584 { \ 585 switch(__HAL_RCC_GET_UART4_SOURCE()) \ 586 { \ 587 case RCC_UART4CLKSOURCE_PCLK1: \ 588 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 589 break; \ 590 case RCC_UART4CLKSOURCE_HSI: \ 591 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 592 break; \ 593 case RCC_UART4CLKSOURCE_SYSCLK: \ 594 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 595 break; \ 596 case RCC_UART4CLKSOURCE_LSE: \ 597 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 598 break; \ 599 default: \ 600 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 601 break; \ 602 } \ 603 } \ 604 else if((__HANDLE__)->Instance == LPUART1) \ 605 { \ 606 switch(__HAL_RCC_GET_LPUART1_SOURCE()) \ 607 { \ 608 case RCC_LPUART1CLKSOURCE_PCLK1: \ 609 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \ 610 break; \ 611 case RCC_LPUART1CLKSOURCE_HSI: \ 612 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \ 613 break; \ 614 case RCC_LPUART1CLKSOURCE_SYSCLK: \ 615 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \ 616 break; \ 617 case RCC_LPUART1CLKSOURCE_LSE: \ 618 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \ 619 break; \ 620 default: \ 621 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 622 break; \ 623 } \ 624 } \ 625 else \ 626 { \ 627 (__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \ 628 } \ 629 } while(0U) 630 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || 631 * STM32L496xx || STM32L4A6xx || 632 * STM32L4P5xx || STM32L4Q5xx || 633 * STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx 634 */ 635 636 /** @brief Report the UART mask to apply to retrieve the received data 637 * according to the word length and to the parity bits activation. 638 * @note If PCE = 1, the parity bit is not included in the data extracted 639 * by the reception API(). 640 * This masking operation is not carried out in the case of 641 * DMA transfers. 642 * @param __HANDLE__ specifies the UART Handle. 643 * @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field. 644 */ 645 #define UART_MASK_COMPUTATION(__HANDLE__) \ 646 do { \ 647 if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \ 648 { \ 649 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 650 { \ 651 (__HANDLE__)->Mask = 0x01FFU ; \ 652 } \ 653 else \ 654 { \ 655 (__HANDLE__)->Mask = 0x00FFU ; \ 656 } \ 657 } \ 658 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \ 659 { \ 660 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 661 { \ 662 (__HANDLE__)->Mask = 0x00FFU ; \ 663 } \ 664 else \ 665 { \ 666 (__HANDLE__)->Mask = 0x007FU ; \ 667 } \ 668 } \ 669 else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \ 670 { \ 671 if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \ 672 { \ 673 (__HANDLE__)->Mask = 0x007FU ; \ 674 } \ 675 else \ 676 { \ 677 (__HANDLE__)->Mask = 0x003FU ; \ 678 } \ 679 } \ 680 else \ 681 { \ 682 (__HANDLE__)->Mask = 0x0000U; \ 683 } \ 684 } while(0U) 685 686 /** 687 * @brief Ensure that UART frame length is valid. 688 * @param __LENGTH__ UART frame length. 689 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 690 */ 691 #define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) || \ 692 ((__LENGTH__) == UART_WORDLENGTH_8B) || \ 693 ((__LENGTH__) == UART_WORDLENGTH_9B)) 694 695 /** 696 * @brief Ensure that UART wake-up address length is valid. 697 * @param __ADDRESS__ UART wake-up address length. 698 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid) 699 */ 700 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \ 701 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B)) 702 703 #if defined(USART_CR1_FIFOEN) 704 /** 705 * @brief Ensure that UART TXFIFO threshold level is valid. 706 * @param __THRESHOLD__ UART TXFIFO threshold level. 707 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 708 */ 709 #define IS_UART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_8) || \ 710 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_4) || \ 711 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_1_2) || \ 712 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_3_4) || \ 713 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_7_8) || \ 714 ((__THRESHOLD__) == UART_TXFIFO_THRESHOLD_8_8)) 715 716 /** 717 * @brief Ensure that UART RXFIFO threshold level is valid. 718 * @param __THRESHOLD__ UART RXFIFO threshold level. 719 * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) 720 */ 721 #define IS_UART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_8) || \ 722 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_4) || \ 723 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_1_2) || \ 724 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_3_4) || \ 725 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_7_8) || \ 726 ((__THRESHOLD__) == UART_RXFIFO_THRESHOLD_8_8)) 727 728 #endif /* USART_CR1_FIFOEN */ 729 /** 730 * @} 731 */ 732 733 /* Private functions ---------------------------------------------------------*/ 734 735 /** 736 * @} 737 */ 738 739 /** 740 * @} 741 */ 742 743 #ifdef __cplusplus 744 } 745 #endif 746 747 #endif /* STM32L4xx_HAL_UART_EX_H */ 748 749
