1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_uart.h 4 * @author MCD Application Team 5 * @brief Header file of UART HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef STM32L4xx_HAL_UART_H 21 #define STM32L4xx_HAL_UART_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /* Includes ------------------------------------------------------------------*/ 28 #include "stm32l4xx_hal_def.h" 29 30 /** @addtogroup STM32L4xx_HAL_Driver 31 * @{ 32 */ 33 34 /** @addtogroup UART 35 * @{ 36 */ 37 38 /* Exported types ------------------------------------------------------------*/ 39 /** @defgroup UART_Exported_Types UART Exported Types 40 * @{ 41 */ 42 43 /** 44 * @brief UART Init Structure definition 45 */ 46 typedef struct 47 { 48 uint32_t BaudRate; /*!< This member configures the UART communication baud rate. 49 The baud rate register is computed using the following formula: 50 LPUART: 51 ======= 52 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate))) 53 where lpuart_ker_ck_pres is the UART input clock 54 (divided by a prescaler if applicable) 55 UART: 56 ===== 57 - If oversampling is 16 or in LIN mode, 58 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate))) 59 - If oversampling is 8, 60 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / 61 ((huart->Init.BaudRate)))[15:4] 62 Baud Rate Register[3] = 0 63 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / 64 ((huart->Init.BaudRate)))[3:0]) >> 1 65 where uart_ker_ck_pres is the UART input clock 66 (divided by a prescaler if applicable) */ 67 68 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. 69 This parameter can be a value of @ref UARTEx_Word_Length. */ 70 71 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. 72 This parameter can be a value of @ref UART_Stop_Bits. */ 73 74 uint32_t Parity; /*!< Specifies the parity mode. 75 This parameter can be a value of @ref UART_Parity 76 @note When parity is enabled, the computed parity is inserted 77 at the MSB position of the transmitted data (9th bit when 78 the word length is set to 9 data bits; 8th bit when the 79 word length is set to 8 data bits). */ 80 81 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. 82 This parameter can be a value of @ref UART_Mode. */ 83 84 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled 85 or disabled. 86 This parameter can be a value of @ref UART_Hardware_Flow_Control. */ 87 88 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, 89 to achieve higher speed (up to f_PCLK/8). 90 This parameter can be a value of @ref UART_Over_Sampling. */ 91 92 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected. 93 Selecting the single sample method increases the receiver tolerance to clock 94 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */ 95 96 #if defined(USART_PRESC_PRESCALER) 97 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source. 98 This parameter can be a value of @ref UART_ClockPrescaler. */ 99 #endif /* USART_PRESC_PRESCALER */ 100 101 } UART_InitTypeDef; 102 103 /** 104 * @brief UART Advanced Features initialization structure definition 105 */ 106 typedef struct 107 { 108 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several 109 Advanced Features may be initialized at the same time . 110 This parameter can be a value of 111 @ref UART_Advanced_Features_Initialization_Type. */ 112 113 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted. 114 This parameter can be a value of @ref UART_Tx_Inv. */ 115 116 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted. 117 This parameter can be a value of @ref UART_Rx_Inv. */ 118 119 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic 120 vs negative/inverted logic). 121 This parameter can be a value of @ref UART_Data_Inv. */ 122 123 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped. 124 This parameter can be a value of @ref UART_Rx_Tx_Swap. */ 125 126 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled. 127 This parameter can be a value of @ref UART_Overrun_Disable. */ 128 129 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error. 130 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */ 131 132 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled. 133 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */ 134 135 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate 136 detection is carried out. 137 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */ 138 139 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line. 140 This parameter can be a value of @ref UART_MSB_First. */ 141 } UART_AdvFeatureInitTypeDef; 142 143 /** 144 * @brief HAL UART State definition 145 * @note HAL UART State value is a combination of 2 different substates: 146 * gState and RxState (see @ref UART_State_Definition). 147 * - gState contains UART state information related to global Handle management 148 * and also information related to Tx operations. 149 * gState value coding follow below described bitmap : 150 * b7-b6 Error information 151 * 00 : No Error 152 * 01 : (Not Used) 153 * 10 : Timeout 154 * 11 : Error 155 * b5 Peripheral initialization status 156 * 0 : Reset (Peripheral not initialized) 157 * 1 : Init done (Peripheral initialized. HAL UART Init function already called) 158 * b4-b3 (not used) 159 * xx : Should be set to 00 160 * b2 Intrinsic process state 161 * 0 : Ready 162 * 1 : Busy (Peripheral busy with some configuration or internal operations) 163 * b1 (not used) 164 * x : Should be set to 0 165 * b0 Tx state 166 * 0 : Ready (no Tx operation ongoing) 167 * 1 : Busy (Tx operation ongoing) 168 * - RxState contains information related to Rx operations. 169 * RxState value coding follow below described bitmap : 170 * b7-b6 (not used) 171 * xx : Should be set to 00 172 * b5 Peripheral initialization status 173 * 0 : Reset (Peripheral not initialized) 174 * 1 : Init done (Peripheral initialized) 175 * b4-b2 (not used) 176 * xxx : Should be set to 000 177 * b1 Rx state 178 * 0 : Ready (no Rx operation ongoing) 179 * 1 : Busy (Rx operation ongoing) 180 * b0 (not used) 181 * x : Should be set to 0. 182 */ 183 typedef uint32_t HAL_UART_StateTypeDef; 184 185 /** 186 * @brief UART clock sources definition 187 */ 188 typedef enum 189 { 190 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ 191 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ 192 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ 193 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ 194 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ 195 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ 196 } UART_ClockSourceTypeDef; 197 198 /** 199 * @brief HAL UART Reception type definition 200 * @note HAL UART Reception type value aims to identify which type of Reception is ongoing. 201 * This parameter can be a value of @ref UART_Reception_Type_Values : 202 * HAL_UART_RECEPTION_STANDARD = 0x00U, 203 * HAL_UART_RECEPTION_TOIDLE = 0x01U, 204 * HAL_UART_RECEPTION_TORTO = 0x02U, 205 * HAL_UART_RECEPTION_TOCHARMATCH = 0x03U, 206 */ 207 typedef uint32_t HAL_UART_RxTypeTypeDef; 208 209 /** 210 * @brief HAL UART Rx Event type definition 211 * @note HAL UART Rx Event type value aims to identify which type of Event has occurred 212 * leading to call of the RxEvent callback. 213 * This parameter can be a value of @ref UART_RxEvent_Type_Values : 214 * HAL_UART_RXEVENT_TC = 0x00U, 215 * HAL_UART_RXEVENT_HT = 0x01U, 216 * HAL_UART_RXEVENT_IDLE = 0x02U, 217 */ 218 typedef uint32_t HAL_UART_RxEventTypeTypeDef; 219 220 /** 221 * @brief UART handle Structure definition 222 */ 223 typedef struct __UART_HandleTypeDef 224 { 225 USART_TypeDef *Instance; /*!< UART registers base address */ 226 227 UART_InitTypeDef Init; /*!< UART communication parameters */ 228 229 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */ 230 231 const uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ 232 233 uint16_t TxXferSize; /*!< UART Tx Transfer size */ 234 235 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ 236 237 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ 238 239 uint16_t RxXferSize; /*!< UART Rx Transfer size */ 240 241 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ 242 243 uint16_t Mask; /*!< UART Rx RDR register mask */ 244 245 #if defined(USART_CR1_FIFOEN) 246 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used. 247 This parameter can be a value of @ref UARTEx_FIFO_mode. */ 248 249 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */ 250 251 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */ 252 253 #endif /*USART_CR1_FIFOEN */ 254 __IO HAL_UART_RxTypeTypeDef ReceptionType; /*!< Type of ongoing reception */ 255 256 __IO HAL_UART_RxEventTypeTypeDef RxEventType; /*!< Type of Rx Event */ 257 258 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */ 259 260 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */ 261 262 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ 263 264 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ 265 266 HAL_LockTypeDef Lock; /*!< Locking object */ 267 268 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management 269 and also related to Tx operations. This parameter 270 can be a value of @ref HAL_UART_StateTypeDef */ 271 272 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. This 273 parameter can be a value of @ref HAL_UART_StateTypeDef */ 274 275 __IO uint32_t ErrorCode; /*!< UART Error code */ 276 277 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 278 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */ 279 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */ 280 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */ 281 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */ 282 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */ 283 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */ 284 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */ 285 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */ 286 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */ 287 #if defined(USART_CR1_FIFOEN) 288 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */ 289 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */ 290 #endif /* USART_CR1_FIFOEN */ 291 void (* RxEventCallback)(struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< UART Reception Event Callback */ 292 293 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */ 294 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */ 295 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 296 297 } UART_HandleTypeDef; 298 299 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 300 /** 301 * @brief HAL UART Callback ID enumeration definition 302 */ 303 typedef enum 304 { 305 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */ 306 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */ 307 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */ 308 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */ 309 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */ 310 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */ 311 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */ 312 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */ 313 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */ 314 #if defined(USART_CR1_FIFOEN) 315 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */ 316 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */ 317 #endif /* USART_CR1_FIFOEN */ 318 319 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */ 320 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */ 321 322 } HAL_UART_CallbackIDTypeDef; 323 324 /** 325 * @brief HAL UART Callback pointer definition 326 */ 327 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */ 328 typedef void (*pUART_RxEventCallbackTypeDef) 329 (struct __UART_HandleTypeDef *huart, uint16_t Pos); /*!< pointer to a UART Rx Event specific callback function */ 330 331 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 332 333 /** 334 * @} 335 */ 336 337 /* Exported constants --------------------------------------------------------*/ 338 /** @defgroup UART_Exported_Constants UART Exported Constants 339 * @{ 340 */ 341 342 /** @defgroup UART_State_Definition UART State Code Definition 343 * @{ 344 */ 345 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized 346 Value is allowed for gState and RxState */ 347 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use 348 Value is allowed for gState and RxState */ 349 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing 350 Value is allowed for gState only */ 351 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing 352 Value is allowed for gState only */ 353 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing 354 Value is allowed for RxState only */ 355 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing 356 Not to be used for neither gState nor RxState.Value is result 357 of combination (Or) between gState and RxState values */ 358 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state 359 Value is allowed for gState only */ 360 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error 361 Value is allowed for gState only */ 362 /** 363 * @} 364 */ 365 366 /** @defgroup UART_Error_Definition UART Error Definition 367 * @{ 368 */ 369 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */ 370 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */ 371 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */ 372 #define HAL_UART_ERROR_FE (0x00000004U) /*!< Frame error */ 373 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */ 374 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ 375 #define HAL_UART_ERROR_RTO (0x00000020U) /*!< Receiver Timeout error */ 376 377 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 378 #define HAL_UART_ERROR_INVALID_CALLBACK (0x00000040U) /*!< Invalid Callback error */ 379 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 380 /** 381 * @} 382 */ 383 384 /** @defgroup UART_Stop_Bits UART Number of Stop Bits 385 * @{ 386 */ 387 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */ 388 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */ 389 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */ 390 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */ 391 /** 392 * @} 393 */ 394 395 /** @defgroup UART_Parity UART Parity 396 * @{ 397 */ 398 #define UART_PARITY_NONE 0x00000000U /*!< No parity */ 399 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ 400 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ 401 /** 402 * @} 403 */ 404 405 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control 406 * @{ 407 */ 408 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */ 409 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */ 410 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */ 411 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */ 412 /** 413 * @} 414 */ 415 416 /** @defgroup UART_Mode UART Transfer Mode 417 * @{ 418 */ 419 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */ 420 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */ 421 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ 422 /** 423 * @} 424 */ 425 426 /** @defgroup UART_State UART State 427 * @{ 428 */ 429 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */ 430 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */ 431 /** 432 * @} 433 */ 434 435 /** @defgroup UART_Over_Sampling UART Over Sampling 436 * @{ 437 */ 438 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */ 439 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */ 440 /** 441 * @} 442 */ 443 444 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method 445 * @{ 446 */ 447 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */ 448 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */ 449 /** 450 * @} 451 */ 452 453 #if defined(USART_PRESC_PRESCALER) 454 /** @defgroup UART_ClockPrescaler UART Clock Prescaler 455 * @{ 456 */ 457 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ 458 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ 459 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ 460 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ 461 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ 462 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ 463 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ 464 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ 465 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ 466 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ 467 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ 468 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ 469 /** 470 * @} 471 */ 472 473 #endif /* USART_PRESC_PRESCALER */ 474 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode 475 * @{ 476 */ 477 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection 478 on start bit */ 479 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection 480 on falling edge */ 481 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection 482 on 0x7F frame detection */ 483 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection 484 on 0x55 frame detection */ 485 /** 486 * @} 487 */ 488 489 /** @defgroup UART_Receiver_Timeout UART Receiver Timeout 490 * @{ 491 */ 492 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART Receiver Timeout disable */ 493 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART Receiver Timeout enable */ 494 /** 495 * @} 496 */ 497 498 /** @defgroup UART_LIN UART Local Interconnection Network mode 499 * @{ 500 */ 501 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */ 502 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */ 503 /** 504 * @} 505 */ 506 507 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection 508 * @{ 509 */ 510 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */ 511 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */ 512 /** 513 * @} 514 */ 515 516 /** @defgroup UART_DMA_Tx UART DMA Tx 517 * @{ 518 */ 519 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */ 520 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */ 521 /** 522 * @} 523 */ 524 525 /** @defgroup UART_DMA_Rx UART DMA Rx 526 * @{ 527 */ 528 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */ 529 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */ 530 /** 531 * @} 532 */ 533 534 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection 535 * @{ 536 */ 537 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */ 538 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */ 539 /** 540 * @} 541 */ 542 543 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods 544 * @{ 545 */ 546 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */ 547 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */ 548 /** 549 * @} 550 */ 551 552 /** @defgroup UART_Request_Parameters UART Request Parameters 553 * @{ 554 */ 555 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ 556 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */ 557 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */ 558 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ 559 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ 560 /** 561 * @} 562 */ 563 564 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type 565 * @{ 566 */ 567 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ 568 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ 569 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ 570 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ 571 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ 572 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ 573 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ 574 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */ 575 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ 576 /** 577 * @} 578 */ 579 580 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion 581 * @{ 582 */ 583 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */ 584 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */ 585 /** 586 * @} 587 */ 588 589 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion 590 * @{ 591 */ 592 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */ 593 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */ 594 /** 595 * @} 596 */ 597 598 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion 599 * @{ 600 */ 601 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */ 602 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */ 603 /** 604 * @} 605 */ 606 607 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap 608 * @{ 609 */ 610 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */ 611 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */ 612 /** 613 * @} 614 */ 615 616 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable 617 * @{ 618 */ 619 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */ 620 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */ 621 /** 622 * @} 623 */ 624 625 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable 626 * @{ 627 */ 628 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */ 629 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */ 630 /** 631 * @} 632 */ 633 634 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error 635 * @{ 636 */ 637 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */ 638 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */ 639 /** 640 * @} 641 */ 642 643 /** @defgroup UART_MSB_First UART Advanced Feature MSB First 644 * @{ 645 */ 646 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received 647 first disable */ 648 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received 649 first enable */ 650 /** 651 * @} 652 */ 653 654 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable 655 * @{ 656 */ 657 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */ 658 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */ 659 /** 660 * @} 661 */ 662 663 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable 664 * @{ 665 */ 666 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */ 667 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */ 668 /** 669 * @} 670 */ 671 672 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register 673 * @{ 674 */ 675 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */ 676 /** 677 * @} 678 */ 679 680 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection 681 * @{ 682 */ 683 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */ 684 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */ 685 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register 686 not empty or RXFIFO is not empty */ 687 /** 688 * @} 689 */ 690 691 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity 692 * @{ 693 */ 694 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */ 695 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */ 696 /** 697 * @} 698 */ 699 700 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register 701 * @{ 702 */ 703 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB 704 position in CR1 register */ 705 /** 706 * @} 707 */ 708 709 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register 710 * @{ 711 */ 712 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB 713 position in CR1 register */ 714 /** 715 * @} 716 */ 717 718 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask 719 * @{ 720 */ 721 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */ 722 /** 723 * @} 724 */ 725 726 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value 727 * @{ 728 */ 729 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */ 730 /** 731 * @} 732 */ 733 734 /** @defgroup UART_Flags UART Status Flags 735 * Elements values convention: 0xXXXX 736 * - 0xXXXX : Flag mask in the ISR register 737 * @{ 738 */ 739 #if defined(USART_CR1_FIFOEN) 740 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */ 741 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */ 742 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */ 743 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */ 744 #endif /* USART_CR1_FIFOEN */ 745 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */ 746 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */ 747 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */ 748 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */ 749 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */ 750 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */ 751 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */ 752 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */ 753 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */ 754 #define UART_FLAG_RTOF USART_ISR_RTOF /*!< UART receiver timeout flag */ 755 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */ 756 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */ 757 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */ 758 #if defined(USART_CR1_FIFOEN) 759 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */ 760 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */ 761 #else 762 #define UART_FLAG_TXE USART_ISR_TXE /*!< UART transmit data register empty */ 763 #endif /* USART_CR1_FIFOEN */ 764 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */ 765 #if defined(USART_CR1_FIFOEN) 766 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */ 767 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */ 768 #else 769 #define UART_FLAG_RXNE USART_ISR_RXNE /*!< UART read data register not empty */ 770 #endif /* USART_CR1_FIFOEN */ 771 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */ 772 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */ 773 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */ 774 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */ 775 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */ 776 /** 777 * @} 778 */ 779 780 /** @defgroup UART_Interrupt_definition UART Interrupts Definition 781 * Elements values convention: 000ZZZZZ0XXYYYYYb 782 * - YYYYY : Interrupt source position in the XX register (5bits) 783 * - XX : Interrupt source register (2bits) 784 * - 01: CR1 register 785 * - 10: CR2 register 786 * - 11: CR3 register 787 * - ZZZZZ : Flag position in the ISR register(5bits) 788 * Elements values convention: 000000000XXYYYYYb 789 * - YYYYY : Interrupt source position in the XX register (5bits) 790 * - XX : Interrupt source register (2bits) 791 * - 01: CR1 register 792 * - 10: CR2 register 793 * - 11: CR3 register 794 * Elements values convention: 0000ZZZZ00000000b 795 * - ZZZZ : Flag position in the ISR register(4bits) 796 * @{ 797 */ 798 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */ 799 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */ 800 #if defined(USART_CR1_FIFOEN) 801 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */ 802 #endif /* USART_CR1_FIFOEN */ 803 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */ 804 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */ 805 #if defined(USART_CR1_FIFOEN) 806 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */ 807 #endif /* USART_CR1_FIFOEN */ 808 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */ 809 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */ 810 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */ 811 #define UART_IT_CM 0x112EU /*!< UART character match interruption */ 812 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */ 813 #if defined(USART_CR1_FIFOEN) 814 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */ 815 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */ 816 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */ 817 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */ 818 #endif /* USART_CR1_FIFOEN */ 819 #define UART_IT_RTO 0x0B3AU /*!< UART receiver timeout interruption */ 820 821 #define UART_IT_ERR 0x0060U /*!< UART error interruption */ 822 823 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */ 824 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */ 825 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */ 826 /** 827 * @} 828 */ 829 830 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags 831 * @{ 832 */ 833 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ 834 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ 835 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */ 836 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */ 837 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ 838 #if defined(USART_CR1_FIFOEN) 839 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */ 840 #endif /* USART_CR1_FIFOEN */ 841 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ 842 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */ 843 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */ 844 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */ 845 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */ 846 #define UART_CLEAR_RTOF USART_ICR_RTOCF /*!< UART receiver timeout clear flag */ 847 /** 848 * @} 849 */ 850 851 /** @defgroup UART_Reception_Type_Values UART Reception type values 852 * @{ 853 */ 854 #define HAL_UART_RECEPTION_STANDARD (0x00000000U) /*!< Standard reception */ 855 #define HAL_UART_RECEPTION_TOIDLE (0x00000001U) /*!< Reception till completion or IDLE event */ 856 #define HAL_UART_RECEPTION_TORTO (0x00000002U) /*!< Reception till completion or RTO event */ 857 #define HAL_UART_RECEPTION_TOCHARMATCH (0x00000003U) /*!< Reception till completion or CM event */ 858 /** 859 * @} 860 */ 861 862 /** @defgroup UART_RxEvent_Type_Values UART RxEvent type values 863 * @{ 864 */ 865 #define HAL_UART_RXEVENT_TC (0x00000000U) /*!< RxEvent linked to Transfer Complete event */ 866 #define HAL_UART_RXEVENT_HT (0x00000001U) /*!< RxEvent linked to Half Transfer event */ 867 #define HAL_UART_RXEVENT_IDLE (0x00000002U) /*!< RxEvent linked to IDLE event */ 868 /** 869 * @} 870 */ 871 872 /** 873 * @} 874 */ 875 876 /* Exported macros -----------------------------------------------------------*/ 877 /** @defgroup UART_Exported_Macros UART Exported Macros 878 * @{ 879 */ 880 881 /** @brief Reset UART handle states. 882 * @param __HANDLE__ UART handle. 883 * @retval None 884 */ 885 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 886 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 887 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 888 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 889 (__HANDLE__)->MspInitCallback = NULL; \ 890 (__HANDLE__)->MspDeInitCallback = NULL; \ 891 } while(0U) 892 #else 893 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ 894 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ 895 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ 896 } while(0U) 897 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */ 898 899 /** @brief Flush the UART Data registers. 900 * @param __HANDLE__ specifies the UART Handle. 901 * @retval None 902 */ 903 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \ 904 do{ \ 905 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \ 906 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \ 907 } while(0U) 908 909 /** @brief Clear the specified UART pending flag. 910 * @param __HANDLE__ specifies the UART Handle. 911 * @param __FLAG__ specifies the flag to check. 912 * This parameter can be any combination of the following values: 913 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 914 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 915 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 916 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 917 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 918 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag 919 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 920 * @arg @ref UART_CLEAR_RTOF Receiver Timeout clear flag 921 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 922 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 923 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 924 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 925 * @retval None 926 */ 927 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 928 929 /** @brief Clear the UART PE pending flag. 930 * @param __HANDLE__ specifies the UART Handle. 931 * @retval None 932 */ 933 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF) 934 935 /** @brief Clear the UART FE pending flag. 936 * @param __HANDLE__ specifies the UART Handle. 937 * @retval None 938 */ 939 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF) 940 941 /** @brief Clear the UART NE pending flag. 942 * @param __HANDLE__ specifies the UART Handle. 943 * @retval None 944 */ 945 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF) 946 947 /** @brief Clear the UART ORE pending flag. 948 * @param __HANDLE__ specifies the UART Handle. 949 * @retval None 950 */ 951 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF) 952 953 /** @brief Clear the UART IDLE pending flag. 954 * @param __HANDLE__ specifies the UART Handle. 955 * @retval None 956 */ 957 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF) 958 959 #if defined(USART_CR1_FIFOEN) 960 /** @brief Clear the UART TX FIFO empty clear flag. 961 * @param __HANDLE__ specifies the UART Handle. 962 * @retval None 963 */ 964 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF) 965 #endif /* USART_CR1_FIFOEN */ 966 967 /** @brief Check whether the specified UART flag is set or not. 968 * @param __HANDLE__ specifies the UART Handle. 969 * @param __FLAG__ specifies the flag to check. 970 * This parameter can be one of the following values: 971 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag 972 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag 973 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag 974 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag 975 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag 976 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag 977 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag 978 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode) 979 * @arg @ref UART_FLAG_SBKF Send Break flag 980 * @arg @ref UART_FLAG_CMF Character match flag 981 * @arg @ref UART_FLAG_BUSY Busy flag 982 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag 983 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag 984 * @arg @ref UART_FLAG_CTS CTS Change flag 985 * @arg @ref UART_FLAG_LBDF LIN Break detection flag 986 * @arg @ref UART_FLAG_TXE Transmit data register empty flag 987 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag 988 * @arg @ref UART_FLAG_TC Transmission Complete flag 989 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag 990 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag 991 * @arg @ref UART_FLAG_RTOF Receiver Timeout flag 992 * @arg @ref UART_FLAG_IDLE Idle Line detection flag 993 * @arg @ref UART_FLAG_ORE Overrun Error flag 994 * @arg @ref UART_FLAG_NE Noise Error flag 995 * @arg @ref UART_FLAG_FE Framing Error flag 996 * @arg @ref UART_FLAG_PE Parity Error flag 997 * @retval The new state of __FLAG__ (TRUE or FALSE). 998 */ 999 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) 1000 1001 /** @brief Enable the specified UART interrupt. 1002 * @param __HANDLE__ specifies the UART Handle. 1003 * @param __INTERRUPT__ specifies the UART interrupt source to enable. 1004 * This parameter can be one of the following values: 1005 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1006 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1007 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1008 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1009 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1010 * @arg @ref UART_IT_CM Character match interrupt 1011 * @arg @ref UART_IT_CTS CTS change interrupt 1012 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1013 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1014 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1015 * @arg @ref UART_IT_TC Transmission complete interrupt 1016 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1017 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1018 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1019 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1020 * @arg @ref UART_IT_PE Parity Error interrupt 1021 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error) 1022 * @retval None 1023 */ 1024 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1025 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1026 ((__HANDLE__)->Instance->CR1 |= (1U <<\ 1027 ((__INTERRUPT__) & UART_IT_MASK))): \ 1028 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1029 ((__HANDLE__)->Instance->CR2 |= (1U <<\ 1030 ((__INTERRUPT__) & UART_IT_MASK))): \ 1031 ((__HANDLE__)->Instance->CR3 |= (1U <<\ 1032 ((__INTERRUPT__) & UART_IT_MASK)))) 1033 1034 /** @brief Disable the specified UART interrupt. 1035 * @param __HANDLE__ specifies the UART Handle. 1036 * @param __INTERRUPT__ specifies the UART interrupt source to disable. 1037 * This parameter can be one of the following values: 1038 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1039 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1040 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1041 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1042 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1043 * @arg @ref UART_IT_CM Character match interrupt 1044 * @arg @ref UART_IT_CTS CTS change interrupt 1045 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1046 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1047 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1048 * @arg @ref UART_IT_TC Transmission complete interrupt 1049 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1050 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1051 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1052 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1053 * @arg @ref UART_IT_PE Parity Error interrupt 1054 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1055 * @retval None 1056 */ 1057 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (\ 1058 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)?\ 1059 ((__HANDLE__)->Instance->CR1 &= ~ (1U <<\ 1060 ((__INTERRUPT__) & UART_IT_MASK))): \ 1061 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)?\ 1062 ((__HANDLE__)->Instance->CR2 &= ~ (1U <<\ 1063 ((__INTERRUPT__) & UART_IT_MASK))): \ 1064 ((__HANDLE__)->Instance->CR3 &= ~ (1U <<\ 1065 ((__INTERRUPT__) & UART_IT_MASK)))) 1066 1067 /** @brief Check whether the specified UART interrupt has occurred or not. 1068 * @param __HANDLE__ specifies the UART Handle. 1069 * @param __INTERRUPT__ specifies the UART interrupt to check. 1070 * This parameter can be one of the following values: 1071 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1072 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1073 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1074 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1075 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1076 * @arg @ref UART_IT_CM Character match interrupt 1077 * @arg @ref UART_IT_CTS CTS change interrupt 1078 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1079 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1080 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1081 * @arg @ref UART_IT_TC Transmission complete interrupt 1082 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1083 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1084 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1085 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1086 * @arg @ref UART_IT_PE Parity Error interrupt 1087 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1088 * @retval The new state of __INTERRUPT__ (SET or RESET). 1089 */ 1090 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\ 1091 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET) 1092 1093 /** @brief Check whether the specified UART interrupt source is enabled or not. 1094 * @param __HANDLE__ specifies the UART Handle. 1095 * @param __INTERRUPT__ specifies the UART interrupt source to check. 1096 * This parameter can be one of the following values: 1097 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt 1098 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt 1099 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt 1100 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt 1101 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt 1102 * @arg @ref UART_IT_CM Character match interrupt 1103 * @arg @ref UART_IT_CTS CTS change interrupt 1104 * @arg @ref UART_IT_LBD LIN Break detection interrupt 1105 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt 1106 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt 1107 * @arg @ref UART_IT_TC Transmission complete interrupt 1108 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt 1109 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt 1110 * @arg @ref UART_IT_RTO Receive Timeout interrupt 1111 * @arg @ref UART_IT_IDLE Idle line detection interrupt 1112 * @arg @ref UART_IT_PE Parity Error interrupt 1113 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error) 1114 * @retval The new state of __INTERRUPT__ (SET or RESET). 1115 */ 1116 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ?\ 1117 (__HANDLE__)->Instance->CR1 : \ 1118 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ?\ 1119 (__HANDLE__)->Instance->CR2 : \ 1120 (__HANDLE__)->Instance->CR3)) & (1U <<\ 1121 (((uint16_t)(__INTERRUPT__)) &\ 1122 UART_IT_MASK))) != RESET) ? SET : RESET) 1123 1124 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag. 1125 * @param __HANDLE__ specifies the UART Handle. 1126 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set 1127 * to clear the corresponding interrupt 1128 * This parameter can be one of the following values: 1129 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag 1130 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag 1131 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag 1132 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag 1133 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag 1134 * @arg @ref UART_CLEAR_RTOF Receiver timeout clear flag 1135 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag 1136 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag 1137 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag 1138 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag 1139 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag 1140 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag 1141 * @retval None 1142 */ 1143 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) 1144 1145 /** @brief Set a specific UART request flag. 1146 * @param __HANDLE__ specifies the UART Handle. 1147 * @param __REQ__ specifies the request flag to set 1148 * This parameter can be one of the following values: 1149 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request 1150 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request 1151 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request 1152 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request 1153 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request 1154 * @retval None 1155 */ 1156 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) 1157 1158 /** @brief Enable the UART one bit sample method. 1159 * @param __HANDLE__ specifies the UART Handle. 1160 * @retval None 1161 */ 1162 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) 1163 1164 /** @brief Disable the UART one bit sample method. 1165 * @param __HANDLE__ specifies the UART Handle. 1166 * @retval None 1167 */ 1168 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT) 1169 1170 /** @brief Enable UART. 1171 * @param __HANDLE__ specifies the UART Handle. 1172 * @retval None 1173 */ 1174 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) 1175 1176 /** @brief Disable UART. 1177 * @param __HANDLE__ specifies the UART Handle. 1178 * @retval None 1179 */ 1180 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) 1181 1182 /** @brief Enable CTS flow control. 1183 * @note This macro allows to enable CTS hardware flow control for a given UART instance, 1184 * without need to call HAL_UART_Init() function. 1185 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1186 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1187 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1188 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1189 * - macro could only be called when corresponding UART instance is disabled 1190 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1191 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1192 * @param __HANDLE__ specifies the UART Handle. 1193 * @retval None 1194 */ 1195 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ 1196 do{ \ 1197 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1198 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ 1199 } while(0U) 1200 1201 /** @brief Disable CTS flow control. 1202 * @note This macro allows to disable CTS hardware flow control for a given UART instance, 1203 * without need to call HAL_UART_Init() function. 1204 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1205 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need 1206 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1207 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1208 * - macro could only be called when corresponding UART instance is disabled 1209 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1210 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1211 * @param __HANDLE__ specifies the UART Handle. 1212 * @retval None 1213 */ 1214 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ 1215 do{ \ 1216 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ 1217 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ 1218 } while(0U) 1219 1220 /** @brief Enable RTS flow control. 1221 * @note This macro allows to enable RTS hardware flow control for a given UART instance, 1222 * without need to call HAL_UART_Init() function. 1223 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1224 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1225 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1226 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1227 * - macro could only be called when corresponding UART instance is disabled 1228 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1229 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1230 * @param __HANDLE__ specifies the UART Handle. 1231 * @retval None 1232 */ 1233 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ 1234 do{ \ 1235 ATOMIC_SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ 1236 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ 1237 } while(0U) 1238 1239 /** @brief Disable RTS flow control. 1240 * @note This macro allows to disable RTS hardware flow control for a given UART instance, 1241 * without need to call HAL_UART_Init() function. 1242 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. 1243 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need 1244 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : 1245 * - UART instance should have already been initialised (through call of HAL_UART_Init() ) 1246 * - macro could only be called when corresponding UART instance is disabled 1247 * (i.e. __HAL_UART_DISABLE(__HANDLE__)) and should be followed by an Enable 1248 * macro (i.e. __HAL_UART_ENABLE(__HANDLE__)). 1249 * @param __HANDLE__ specifies the UART Handle. 1250 * @retval None 1251 */ 1252 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ 1253 do{ \ 1254 ATOMIC_CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ 1255 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ 1256 } while(0U) 1257 /** 1258 * @} 1259 */ 1260 1261 /* Private macros --------------------------------------------------------*/ 1262 /** @defgroup UART_Private_Macros UART Private Macros 1263 * @{ 1264 */ 1265 #if defined(USART_PRESC_PRESCALER) 1266 /** @brief Get UART clock division factor from clock prescaler value. 1267 * @param __CLOCKPRESCALER__ UART prescaler value. 1268 * @retval UART clock division factor 1269 */ 1270 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \ 1271 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \ 1272 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \ 1273 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \ 1274 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \ 1275 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \ 1276 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \ 1277 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \ 1278 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \ 1279 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \ 1280 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \ 1281 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : 256U) 1282 1283 /** @brief BRR division operation to set BRR register with LPUART. 1284 * @param __PCLK__ LPUART clock. 1285 * @param __BAUD__ Baud rate set by the user. 1286 * @param __CLOCKPRESCALER__ UART prescaler value. 1287 * @retval Division result 1288 */ 1289 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1290 ((uint32_t)((((((uint64_t)(__PCLK__))/(UARTPrescTable[(__CLOCKPRESCALER__)]))*256U)+ \ 1291 (uint32_t)((__BAUD__)/2U)) / (__BAUD__)) \ 1292 ) 1293 1294 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1295 * @param __PCLK__ UART clock. 1296 * @param __BAUD__ Baud rate set by the user. 1297 * @param __CLOCKPRESCALER__ UART prescaler value. 1298 * @retval Division result 1299 */ 1300 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1301 (((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)])*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1302 1303 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1304 * @param __PCLK__ UART clock. 1305 * @param __BAUD__ Baud rate set by the user. 1306 * @param __CLOCKPRESCALER__ UART prescaler value. 1307 * @retval Division result 1308 */ 1309 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) \ 1310 ((((__PCLK__)/UARTPrescTable[(__CLOCKPRESCALER__)]) + ((__BAUD__)/2U)) / (__BAUD__)) 1311 #else 1312 1313 /** @brief BRR division operation to set BRR register with LPUART. 1314 * @param __PCLK__ LPUART clock. 1315 * @param __BAUD__ Baud rate set by the user. 1316 * @retval Division result 1317 */ 1318 #define UART_DIV_LPUART(__PCLK__, __BAUD__) (((((uint64_t)(__PCLK__)*256U)) + ((__BAUD__)/2U)) / (__BAUD__)) 1319 1320 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode. 1321 * @param __PCLK__ UART clock. 1322 * @param __BAUD__ Baud rate set by the user. 1323 * @retval Division result 1324 */ 1325 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__)) 1326 1327 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode. 1328 * @param __PCLK__ UART clock. 1329 * @param __BAUD__ Baud rate set by the user. 1330 * @retval Division result 1331 */ 1332 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__)) 1333 #endif /* USART_PRESC_PRESCALER */ 1334 1335 /** @brief Check whether or not UART instance is Low Power UART. 1336 * @param __HANDLE__ specifies the UART Handle. 1337 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART) 1338 */ 1339 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance)) 1340 1341 /** @brief Check UART Baud rate. 1342 * @param __BAUDRATE__ Baudrate specified by the user. 1343 * The maximum Baud Rate is derived from the maximum clock on L4 1344 * divided by the smallest oversampling used on the USART (i.e. 8) 1345 * (i.e. 120 MHz on STM32L4Rx/L4Sx, 80 Mhz otherwise) 1346 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid) 1347 */ 1348 #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) 1349 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 15000001U) 1350 #else 1351 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 10000001U) 1352 #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ 1353 1354 /** @brief Check UART assertion time. 1355 * @param __TIME__ 5-bit value assertion time. 1356 * @retval Test result (TRUE or FALSE). 1357 */ 1358 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1359 1360 /** @brief Check UART deassertion time. 1361 * @param __TIME__ 5-bit value deassertion time. 1362 * @retval Test result (TRUE or FALSE). 1363 */ 1364 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU) 1365 1366 /** 1367 * @brief Ensure that UART frame number of stop bits is valid. 1368 * @param __STOPBITS__ UART frame number of stop bits. 1369 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1370 */ 1371 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \ 1372 ((__STOPBITS__) == UART_STOPBITS_1) || \ 1373 ((__STOPBITS__) == UART_STOPBITS_1_5) || \ 1374 ((__STOPBITS__) == UART_STOPBITS_2)) 1375 1376 /** 1377 * @brief Ensure that LPUART frame number of stop bits is valid. 1378 * @param __STOPBITS__ LPUART frame number of stop bits. 1379 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid) 1380 */ 1381 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \ 1382 ((__STOPBITS__) == UART_STOPBITS_2)) 1383 1384 /** 1385 * @brief Ensure that UART frame parity is valid. 1386 * @param __PARITY__ UART frame parity. 1387 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) 1388 */ 1389 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \ 1390 ((__PARITY__) == UART_PARITY_EVEN) || \ 1391 ((__PARITY__) == UART_PARITY_ODD)) 1392 1393 /** 1394 * @brief Ensure that UART hardware flow control is valid. 1395 * @param __CONTROL__ UART hardware flow control. 1396 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid) 1397 */ 1398 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\ 1399 (((__CONTROL__) == UART_HWCONTROL_NONE) || \ 1400 ((__CONTROL__) == UART_HWCONTROL_RTS) || \ 1401 ((__CONTROL__) == UART_HWCONTROL_CTS) || \ 1402 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS)) 1403 1404 /** 1405 * @brief Ensure that UART communication mode is valid. 1406 * @param __MODE__ UART communication mode. 1407 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1408 */ 1409 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U)) 1410 1411 /** 1412 * @brief Ensure that UART state is valid. 1413 * @param __STATE__ UART state. 1414 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) 1415 */ 1416 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \ 1417 ((__STATE__) == UART_STATE_ENABLE)) 1418 1419 /** 1420 * @brief Ensure that UART oversampling is valid. 1421 * @param __SAMPLING__ UART oversampling. 1422 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid) 1423 */ 1424 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \ 1425 ((__SAMPLING__) == UART_OVERSAMPLING_8)) 1426 1427 /** 1428 * @brief Ensure that UART frame sampling is valid. 1429 * @param __ONEBIT__ UART frame sampling. 1430 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) 1431 */ 1432 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \ 1433 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE)) 1434 1435 /** 1436 * @brief Ensure that UART auto Baud rate detection mode is valid. 1437 * @param __MODE__ UART auto Baud rate detection mode. 1438 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) 1439 */ 1440 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \ 1441 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \ 1442 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \ 1443 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME)) 1444 1445 /** 1446 * @brief Ensure that UART receiver timeout setting is valid. 1447 * @param __TIMEOUT__ UART receiver timeout setting. 1448 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid) 1449 */ 1450 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \ 1451 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE)) 1452 1453 /** @brief Check the receiver timeout value. 1454 * @note The maximum UART receiver timeout value is 0xFFFFFF. 1455 * @param __TIMEOUTVALUE__ receiver timeout value. 1456 * @retval Test result (TRUE or FALSE) 1457 */ 1458 #define IS_UART_RECEIVER_TIMEOUT_VALUE(__TIMEOUTVALUE__) ((__TIMEOUTVALUE__) <= 0xFFFFFFU) 1459 1460 /** 1461 * @brief Ensure that UART LIN state is valid. 1462 * @param __LIN__ UART LIN state. 1463 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid) 1464 */ 1465 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \ 1466 ((__LIN__) == UART_LIN_ENABLE)) 1467 1468 /** 1469 * @brief Ensure that UART LIN break detection length is valid. 1470 * @param __LENGTH__ UART LIN break detection length. 1471 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) 1472 */ 1473 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \ 1474 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B)) 1475 1476 /** 1477 * @brief Ensure that UART DMA TX state is valid. 1478 * @param __DMATX__ UART DMA TX state. 1479 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) 1480 */ 1481 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \ 1482 ((__DMATX__) == UART_DMA_TX_ENABLE)) 1483 1484 /** 1485 * @brief Ensure that UART DMA RX state is valid. 1486 * @param __DMARX__ UART DMA RX state. 1487 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) 1488 */ 1489 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \ 1490 ((__DMARX__) == UART_DMA_RX_ENABLE)) 1491 1492 /** 1493 * @brief Ensure that UART half-duplex state is valid. 1494 * @param __HDSEL__ UART half-duplex state. 1495 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid) 1496 */ 1497 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \ 1498 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE)) 1499 1500 /** 1501 * @brief Ensure that UART wake-up method is valid. 1502 * @param __WAKEUP__ UART wake-up method . 1503 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid) 1504 */ 1505 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \ 1506 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK)) 1507 1508 /** 1509 * @brief Ensure that UART request parameter is valid. 1510 * @param __PARAM__ UART request parameter. 1511 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) 1512 */ 1513 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \ 1514 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \ 1515 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \ 1516 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \ 1517 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST)) 1518 1519 /** 1520 * @brief Ensure that UART advanced features initialization is valid. 1521 * @param __INIT__ UART advanced features initialization. 1522 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid) 1523 */ 1524 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \ 1525 UART_ADVFEATURE_TXINVERT_INIT | \ 1526 UART_ADVFEATURE_RXINVERT_INIT | \ 1527 UART_ADVFEATURE_DATAINVERT_INIT | \ 1528 UART_ADVFEATURE_SWAP_INIT | \ 1529 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \ 1530 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \ 1531 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \ 1532 UART_ADVFEATURE_MSBFIRST_INIT)) 1533 1534 /** 1535 * @brief Ensure that UART frame TX inversion setting is valid. 1536 * @param __TXINV__ UART frame TX inversion setting. 1537 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid) 1538 */ 1539 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \ 1540 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE)) 1541 1542 /** 1543 * @brief Ensure that UART frame RX inversion setting is valid. 1544 * @param __RXINV__ UART frame RX inversion setting. 1545 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid) 1546 */ 1547 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \ 1548 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE)) 1549 1550 /** 1551 * @brief Ensure that UART frame data inversion setting is valid. 1552 * @param __DATAINV__ UART frame data inversion setting. 1553 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid) 1554 */ 1555 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \ 1556 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE)) 1557 1558 /** 1559 * @brief Ensure that UART frame RX/TX pins swap setting is valid. 1560 * @param __SWAP__ UART frame RX/TX pins swap setting. 1561 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid) 1562 */ 1563 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \ 1564 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE)) 1565 1566 /** 1567 * @brief Ensure that UART frame overrun setting is valid. 1568 * @param __OVERRUN__ UART frame overrun setting. 1569 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid) 1570 */ 1571 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \ 1572 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE)) 1573 1574 /** 1575 * @brief Ensure that UART auto Baud rate state is valid. 1576 * @param __AUTOBAUDRATE__ UART auto Baud rate state. 1577 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid) 1578 */ 1579 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == \ 1580 UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \ 1581 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)) 1582 1583 /** 1584 * @brief Ensure that UART DMA enabling or disabling on error setting is valid. 1585 * @param __DMA__ UART DMA enabling or disabling on error setting. 1586 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid) 1587 */ 1588 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \ 1589 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR)) 1590 1591 /** 1592 * @brief Ensure that UART frame MSB first setting is valid. 1593 * @param __MSBFIRST__ UART frame MSB first setting. 1594 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid) 1595 */ 1596 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \ 1597 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE)) 1598 1599 /** 1600 * @brief Ensure that UART stop mode state is valid. 1601 * @param __STOPMODE__ UART stop mode state. 1602 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid) 1603 */ 1604 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \ 1605 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE)) 1606 1607 /** 1608 * @brief Ensure that UART mute mode state is valid. 1609 * @param __MUTE__ UART mute mode state. 1610 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid) 1611 */ 1612 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \ 1613 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE)) 1614 1615 /** 1616 * @brief Ensure that UART wake-up selection is valid. 1617 * @param __WAKE__ UART wake-up selection. 1618 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid) 1619 */ 1620 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \ 1621 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \ 1622 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY)) 1623 1624 /** 1625 * @brief Ensure that UART driver enable polarity is valid. 1626 * @param __POLARITY__ UART driver enable polarity. 1627 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid) 1628 */ 1629 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \ 1630 ((__POLARITY__) == UART_DE_POLARITY_LOW)) 1631 1632 #if defined(USART_PRESC_PRESCALER) 1633 /** 1634 * @brief Ensure that UART Prescaler is valid. 1635 * @param __CLOCKPRESCALER__ UART Prescaler value. 1636 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) 1637 */ 1638 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \ 1639 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \ 1640 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \ 1641 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \ 1642 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \ 1643 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \ 1644 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \ 1645 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \ 1646 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \ 1647 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \ 1648 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \ 1649 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256)) 1650 #endif /* USART_PRESC_PRESCALER */ 1651 1652 /** 1653 * @} 1654 */ 1655 1656 /* Include UART HAL Extended module */ 1657 #include "stm32l4xx_hal_uart_ex.h" 1658 1659 /* Exported functions --------------------------------------------------------*/ 1660 /** @addtogroup UART_Exported_Functions UART Exported Functions 1661 * @{ 1662 */ 1663 1664 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions 1665 * @{ 1666 */ 1667 1668 /* Initialization and de-initialization functions ****************************/ 1669 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); 1670 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); 1671 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); 1672 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); 1673 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart); 1674 void HAL_UART_MspInit(UART_HandleTypeDef *huart); 1675 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); 1676 1677 /* Callbacks Register/UnRegister functions ***********************************/ 1678 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1679 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID, 1680 pUART_CallbackTypeDef pCallback); 1681 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID); 1682 1683 HAL_StatusTypeDef HAL_UART_RegisterRxEventCallback(UART_HandleTypeDef *huart, pUART_RxEventCallbackTypeDef pCallback); 1684 HAL_StatusTypeDef HAL_UART_UnRegisterRxEventCallback(UART_HandleTypeDef *huart); 1685 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1686 1687 /** 1688 * @} 1689 */ 1690 1691 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions 1692 * @{ 1693 */ 1694 1695 /* IO operation functions *****************************************************/ 1696 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout); 1697 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); 1698 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1699 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1700 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size); 1701 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1702 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); 1703 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); 1704 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); 1705 /* Transfer Abort functions */ 1706 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); 1707 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); 1708 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); 1709 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); 1710 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); 1711 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); 1712 1713 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); 1714 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); 1715 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); 1716 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); 1717 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); 1718 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); 1719 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart); 1720 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart); 1721 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart); 1722 1723 void HAL_UARTEx_RxEventCallback(UART_HandleTypeDef *huart, uint16_t Size); 1724 1725 /** 1726 * @} 1727 */ 1728 1729 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions 1730 * @{ 1731 */ 1732 1733 /* Peripheral Control functions ************************************************/ 1734 void HAL_UART_ReceiverTimeout_Config(UART_HandleTypeDef *huart, uint32_t TimeoutValue); 1735 HAL_StatusTypeDef HAL_UART_EnableReceiverTimeout(UART_HandleTypeDef *huart); 1736 HAL_StatusTypeDef HAL_UART_DisableReceiverTimeout(UART_HandleTypeDef *huart); 1737 1738 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); 1739 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart); 1740 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart); 1741 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); 1742 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); 1743 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); 1744 1745 /** 1746 * @} 1747 */ 1748 1749 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions 1750 * @{ 1751 */ 1752 1753 /* Peripheral State and Errors functions **************************************************/ 1754 HAL_UART_StateTypeDef HAL_UART_GetState(const UART_HandleTypeDef *huart); 1755 uint32_t HAL_UART_GetError(const UART_HandleTypeDef *huart); 1756 1757 /** 1758 * @} 1759 */ 1760 1761 /** 1762 * @} 1763 */ 1764 1765 /* Private functions -----------------------------------------------------------*/ 1766 /** @addtogroup UART_Private_Functions UART Private Functions 1767 * @{ 1768 */ 1769 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1) 1770 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart); 1771 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */ 1772 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart); 1773 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart); 1774 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, 1775 uint32_t Tickstart, uint32_t Timeout); 1776 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart); 1777 HAL_StatusTypeDef UART_Start_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1778 HAL_StatusTypeDef UART_Start_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); 1779 1780 /** 1781 * @} 1782 */ 1783 1784 /* Private variables -----------------------------------------------------------*/ 1785 #if defined(USART_PRESC_PRESCALER) 1786 /** @defgroup UART_Private_variables UART Private variables 1787 * @{ 1788 */ 1789 /* Prescaler Table used in BRR computation macros. 1790 Declared as extern here to allow use of private UART macros, outside of HAL UART functions */ 1791 extern const uint16_t UARTPrescTable[12]; 1792 /** 1793 * @} 1794 */ 1795 1796 #endif /* USART_PRESC_PRESCALER */ 1797 /** 1798 * @} 1799 */ 1800 1801 /** 1802 * @} 1803 */ 1804 1805 #ifdef __cplusplus 1806 } 1807 #endif 1808 1809 #endif /* STM32L4xx_HAL_UART_H */ 1810 1811
