1 /**
2   ******************************************************************************
3   * @file    stm32l4xx_hal_can_legacy.h
4   * @author  MCD Application Team
5   * @brief   Header file of CAN HAL module.
6   ******************************************************************************
7   * @attention
8   *
9   * Copyright (c) 2017 STMicroelectronics.
10   * All rights reserved.
11   *
12   * This software is licensed under terms that can be found in the LICENSE file
13   * in the root directory of this software component.
14   * If no LICENSE file comes with this software, it is provided AS-IS.
15   *
16   ******************************************************************************
17   */
18 
19 /* Define to prevent recursive inclusion -------------------------------------*/
20 #ifndef __STM32L4xx_CAN_LEGACY_H
21 #define __STM32L4xx_CAN_LEGACY_H
22 
23 #ifdef __cplusplus
24  extern "C" {
25 #endif
26 
27 #if defined(CAN1)
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32l4xx_hal_def.h"
30 
31 /** @addtogroup STM32L4xx_HAL_Driver
32   * @{
33   */
34 
35 /** @addtogroup CAN
36   * @{
37   */
38 
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup CAN_Exported_Types CAN Exported Types
41   * @{
42   */
43 
44 /**
45   * @brief  HAL State structures definition
46   */
47 typedef enum
48 {
49   HAL_CAN_STATE_RESET             = 0x00,  /*!< CAN not yet initialized or disabled */
50   HAL_CAN_STATE_READY             = 0x01,  /*!< CAN initialized and ready for use   */
51   HAL_CAN_STATE_BUSY              = 0x02,  /*!< CAN process is ongoing              */
52   HAL_CAN_STATE_BUSY_TX           = 0x12,  /*!< CAN process is ongoing              */
53   HAL_CAN_STATE_BUSY_RX           = 0x22,  /*!< CAN process is ongoing              */
54   HAL_CAN_STATE_BUSY_TX_RX        = 0x32,  /*!< CAN process is ongoing              */
55   HAL_CAN_STATE_TIMEOUT           = 0x03,  /*!< Timeout state                       */
56   HAL_CAN_STATE_ERROR             = 0x04   /*!< CAN error state                     */
57 
58 }HAL_CAN_StateTypeDef;
59 
60 /**
61   * @brief  CAN init structure definition
62   */
63 typedef struct
64 {
65   uint32_t Prescaler;  /*!< Specifies the length of a time quantum.
66                             This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
67 
68   uint32_t Mode;       /*!< Specifies the CAN operating mode.
69                             This parameter can be a value of @ref CAN_operating_mode */
70 
71   uint32_t SJW;        /*!< Specifies the maximum number of time quanta
72                             the CAN hardware is allowed to lengthen or
73                             shorten a bit to perform resynchronization.
74                             This parameter can be a value of @ref CAN_synchronisation_jump_width */
75 
76   uint32_t BS1;        /*!< Specifies the number of time quanta in Bit Segment 1.
77                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
78 
79   uint32_t BS2;        /*!< Specifies the number of time quanta in Bit Segment 2.
80                             This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
81 
82   uint32_t TTCM;       /*!< Enable or disable the time triggered communication mode.
83                             This parameter can be set to ENABLE or DISABLE. */
84 
85   uint32_t ABOM;       /*!< Enable or disable the automatic bus-off management.
86                             This parameter can be set to ENABLE or DISABLE */
87 
88   uint32_t AWUM;       /*!< Enable or disable the automatic wake-up mode.
89                             This parameter can be set to ENABLE or DISABLE */
90 
91   uint32_t NART;       /*!< Enable or disable the non-automatic retransmission mode.
92                             This parameter can be set to ENABLE or DISABLE */
93 
94   uint32_t RFLM;       /*!< Enable or disable the receive FIFO Locked mode.
95                             This parameter can be set to ENABLE or DISABLE */
96 
97   uint32_t TXFP;       /*!< Enable or disable the transmit FIFO priority.
98                             This parameter can be set to ENABLE or DISABLE */
99 }CAN_InitTypeDef;
100 
101 /**
102   * @brief  CAN filter configuration structure definition
103   */
104 typedef struct
105 {
106   uint32_t FilterIdHigh;          /*!< Specifies the filter identification number (MSBs for a 32-bit
107                                        configuration, first one for a 16-bit configuration).
108                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
109 
110   uint32_t FilterIdLow;           /*!< Specifies the filter identification number (LSBs for a 32-bit
111                                        configuration, second one for a 16-bit configuration).
112                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
113 
114   uint32_t FilterMaskIdHigh;      /*!< Specifies the filter mask number or identification number,
115                                        according to the mode (MSBs for a 32-bit configuration,
116                                        first one for a 16-bit configuration).
117                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
118 
119   uint32_t FilterMaskIdLow;       /*!< Specifies the filter mask number or identification number,
120                                        according to the mode (LSBs for a 32-bit configuration,
121                                        second one for a 16-bit configuration).
122                                        This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
123 
124   uint32_t FilterFIFOAssignment;  /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
125                                        This parameter can be a value of @ref CAN_filter_FIFO */
126 
127   uint32_t FilterNumber;          /*!< Specifies the filter which will be initialized.
128                                        This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
129 
130   uint32_t FilterMode;            /*!< Specifies the filter mode to be initialized.
131                                        This parameter can be a value of @ref CAN_filter_mode */
132 
133   uint32_t FilterScale;           /*!< Specifies the filter scale.
134                                        This parameter can be a value of @ref CAN_filter_scale */
135 
136   uint32_t FilterActivation;      /*!< Enable or disable the filter.
137                                        This parameter can be set to ENABLE or DISABLE */
138 
139   uint32_t BankNumber;            /*!< Select the start slave bank filter.
140                                        This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
141 
142 }CAN_FilterConfTypeDef;
143 
144 /**
145   * @brief  CAN Tx message structure definition
146   */
147 typedef struct
148 {
149   uint32_t StdId;    /*!< Specifies the standard identifier.
150                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
151 
152   uint32_t ExtId;    /*!< Specifies the extended identifier.
153                           This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
154 
155   uint32_t IDE;      /*!< Specifies the type of identifier for the message that will be transmitted.
156                           This parameter can be a value of @ref CAN_identifier_type */
157 
158   uint32_t RTR;      /*!< Specifies the type of frame for the message that will be transmitted.
159                           This parameter can be a value of @ref CAN_remote_transmission_request */
160 
161   uint32_t DLC;      /*!< Specifies the length of the frame that will be transmitted.
162                           This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
163 
164   uint8_t Data[8];   /*!< Contains the data to be transmitted.
165                           This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
166 
167 }CanTxMsgTypeDef;
168 
169 /**
170   * @brief  CAN Rx message structure definition
171   */
172 typedef struct
173 {
174   uint32_t StdId;       /*!< Specifies the standard identifier.
175                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
176 
177   uint32_t ExtId;       /*!< Specifies the extended identifier.
178                              This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
179 
180   uint32_t IDE;         /*!< Specifies the type of identifier for the message that will be received.
181                              This parameter can be a value of @ref CAN_identifier_type */
182 
183   uint32_t RTR;         /*!< Specifies the type of frame for the received message.
184                              This parameter can be a value of @ref CAN_remote_transmission_request */
185 
186   uint32_t DLC;         /*!< Specifies the length of the frame that will be received.
187                              This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
188 
189   uint8_t Data[8];      /*!< Contains the data to be received.
190                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
191 
192   uint32_t FMI;         /*!< Specifies the index of the filter the message stored in the mailbox passes through.
193                              This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
194 
195   uint32_t FIFONumber;  /*!< Specifies the receive FIFO number.
196                              This parameter can be CAN_FIFO0 or CAN_FIFO1 */
197 
198 }CanRxMsgTypeDef;
199 
200 /**
201   * @brief  CAN handle Structure definition
202   */
203 typedef struct
204 {
205   CAN_TypeDef                 *Instance;  /*!< Register base address          */
206 
207   CAN_InitTypeDef             Init;       /*!< CAN required parameters        */
208 
209   CanTxMsgTypeDef*            pTxMsg;     /*!< Pointer to transmit structure  */
210 
211   CanRxMsgTypeDef*            pRxMsg;     /*!< Pointer to reception structure */
212 
213   __IO HAL_CAN_StateTypeDef   State;      /*!< CAN communication state        */
214 
215   HAL_LockTypeDef             Lock;       /*!< CAN locking object             */
216 
217   __IO uint32_t               ErrorCode;  /*!< CAN Error code                 */
218 
219 }CAN_HandleTypeDef;
220 
221 /**
222   * @}
223   */
224 
225 /* Exported constants --------------------------------------------------------*/
226 /** @defgroup CAN_Exported_Constants CAN Exported Constants
227   * @{
228   */
229 
230 /** @defgroup CAN_Error_Code CAN Error Code
231   * @{
232   */
233 #define   HAL_CAN_ERROR_NONE        ((uint32_t)0x00000000)    /*!< No error             */
234 #define   HAL_CAN_ERROR_EWG         ((uint32_t)0x00000001)    /*!< EWG error            */
235 #define   HAL_CAN_ERROR_EPV         ((uint32_t)0x00000002)    /*!< EPV error            */
236 #define   HAL_CAN_ERROR_BOF         ((uint32_t)0x00000004)    /*!< BOF error            */
237 #define   HAL_CAN_ERROR_STF         ((uint32_t)0x00000008)    /*!< Stuff error          */
238 #define   HAL_CAN_ERROR_FOR         ((uint32_t)0x00000010)    /*!< Form error           */
239 #define   HAL_CAN_ERROR_ACK         ((uint32_t)0x00000020)    /*!< Acknowledgment error */
240 #define   HAL_CAN_ERROR_BR          ((uint32_t)0x00000040)    /*!< Bit recessive        */
241 #define   HAL_CAN_ERROR_BD          ((uint32_t)0x00000080)    /*!< LEC dominant         */
242 #define   HAL_CAN_ERROR_CRC         ((uint32_t)0x00000100)    /*!< LEC transfer error   */
243 #define   HAL_CAN_ERROR_FOV0        ((uint32_t)0x00000200)    /*!< FIFO0 overrun error  */
244 #define   HAL_CAN_ERROR_FOV1        ((uint32_t)0x00000400)    /*!< FIFO1 overrun error  */
245 /**
246   * @}
247   */
248 
249 /** @defgroup CAN_InitStatus CAN initialization Status
250   * @{
251   */
252 #define CAN_INITSTATUS_FAILED       ((uint32_t)0x00000000)  /*!< CAN initialization failed */
253 #define CAN_INITSTATUS_SUCCESS      ((uint32_t)0x00000001)  /*!< CAN initialization OK */
254 /**
255   * @}
256   */
257 
258 /** @defgroup CAN_operating_mode CAN Operating Mode
259   * @{
260   */
261 #define CAN_MODE_NORMAL             ((uint32_t)0x00000000)                     /*!< Normal mode   */
262 #define CAN_MODE_LOOPBACK           ((uint32_t)CAN_BTR_LBKM)                   /*!< Loopback mode */
263 #define CAN_MODE_SILENT             ((uint32_t)CAN_BTR_SILM)                   /*!< Silent mode   */
264 #define CAN_MODE_SILENT_LOOPBACK    ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM))  /*!< Loopback combined with silent mode */
265 /**
266   * @}
267   */
268 
269 
270 /** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
271   * @{
272   */
273 #define CAN_SJW_1TQ                 ((uint32_t)0x00000000)     /*!< 1 time quantum */
274 #define CAN_SJW_2TQ                 ((uint32_t)CAN_BTR_SJW_0)  /*!< 2 time quantum */
275 #define CAN_SJW_3TQ                 ((uint32_t)CAN_BTR_SJW_1)  /*!< 3 time quantum */
276 #define CAN_SJW_4TQ                 ((uint32_t)CAN_BTR_SJW)    /*!< 4 time quantum */
277 /**
278   * @}
279   */
280 
281 /** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
282   * @{
283   */
284 #define CAN_BS1_1TQ                 ((uint32_t)0x00000000)                                       /*!< 1 time quantum  */
285 #define CAN_BS1_2TQ                 ((uint32_t)CAN_BTR_TS1_0)                                    /*!< 2 time quantum  */
286 #define CAN_BS1_3TQ                 ((uint32_t)CAN_BTR_TS1_1)                                    /*!< 3 time quantum  */
287 #define CAN_BS1_4TQ                 ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0))                  /*!< 4 time quantum  */
288 #define CAN_BS1_5TQ                 ((uint32_t)CAN_BTR_TS1_2)                                    /*!< 5 time quantum  */
289 #define CAN_BS1_6TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0))                  /*!< 6 time quantum  */
290 #define CAN_BS1_7TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1))                  /*!< 7 time quantum  */
291 #define CAN_BS1_8TQ                 ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 8 time quantum  */
292 #define CAN_BS1_9TQ                 ((uint32_t)CAN_BTR_TS1_3)                                    /*!< 9 time quantum  */
293 #define CAN_BS1_10TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0))                  /*!< 10 time quantum */
294 #define CAN_BS1_11TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1))                  /*!< 11 time quantum */
295 #define CAN_BS1_12TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0))  /*!< 12 time quantum */
296 #define CAN_BS1_13TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2))                  /*!< 13 time quantum */
297 #define CAN_BS1_14TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0))  /*!< 14 time quantum */
298 #define CAN_BS1_15TQ                ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1))  /*!< 15 time quantum */
299 #define CAN_BS1_16TQ                ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
300 /**
301   * @}
302   */
303 
304 /** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
305   * @{
306   */
307 #define CAN_BS2_1TQ                 ((uint32_t)0x00000000)                       /*!< 1 time quantum */
308 #define CAN_BS2_2TQ                 ((uint32_t)CAN_BTR_TS2_0)                    /*!< 2 time quantum */
309 #define CAN_BS2_3TQ                 ((uint32_t)CAN_BTR_TS2_1)                    /*!< 3 time quantum */
310 #define CAN_BS2_4TQ                 ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0))  /*!< 4 time quantum */
311 #define CAN_BS2_5TQ                 ((uint32_t)CAN_BTR_TS2_2)                    /*!< 5 time quantum */
312 #define CAN_BS2_6TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0))  /*!< 6 time quantum */
313 #define CAN_BS2_7TQ                 ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1))  /*!< 7 time quantum */
314 #define CAN_BS2_8TQ                 ((uint32_t)CAN_BTR_TS2)                      /*!< 8 time quantum */
315 /**
316   * @}
317   */
318 
319 /** @defgroup CAN_filter_mode CAN Filter Mode
320   * @{
321   */
322 #define CAN_FILTERMODE_IDMASK       ((uint8_t)0x00)  /*!< Identifier mask mode */
323 #define CAN_FILTERMODE_IDLIST       ((uint8_t)0x01)  /*!< Identifier list mode */
324 /**
325   * @}
326   */
327 
328 /** @defgroup CAN_filter_scale CAN Filter Scale
329   * @{
330   */
331 #define CAN_FILTERSCALE_16BIT       ((uint8_t)0x00)  /*!< Two 16-bit filters */
332 #define CAN_FILTERSCALE_32BIT       ((uint8_t)0x01)  /*!< One 32-bit filter  */
333 /**
334   * @}
335   */
336 
337 /** @defgroup CAN_filter_FIFO CAN Filter FIFO
338   * @{
339   */
340 #define CAN_FILTER_FIFO0             ((uint8_t)0x00)  /*!< Filter FIFO 0 assignment for filter x */
341 #define CAN_FILTER_FIFO1             ((uint8_t)0x01)  /*!< Filter FIFO 1 assignment for filter x */
342 /**
343   * @}
344   */
345 
346 /** @defgroup CAN_identifier_type CAN Identifier Type
347   * @{
348   */
349 #define CAN_ID_STD             ((uint32_t)0x00000000)  /*!< Standard Id */
350 #define CAN_ID_EXT             ((uint32_t)0x00000004)  /*!< Extended Id */
351 /**
352   * @}
353   */
354 
355 /** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
356   * @{
357   */
358 #define CAN_RTR_DATA                ((uint32_t)0x00000000)  /*!< Data frame */
359 #define CAN_RTR_REMOTE              ((uint32_t)0x00000002)  /*!< Remote frame */
360 /**
361   * @}
362   */
363 
364 /** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number
365   * @{
366   */
367 #define CAN_FIFO0                   ((uint8_t)0x00)  /*!< CAN FIFO 0 used to receive */
368 #define CAN_FIFO1                   ((uint8_t)0x01)  /*!< CAN FIFO 1 used to receive */
369 /**
370   * @}
371   */
372 
373 /** @defgroup CAN_flags CAN Flags
374   * @{
375   */
376 /* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
377    and CAN_ClearFlag() functions. */
378 /* If the flag is 0x1XXXXXXX, it means that it can only be used with
379    CAN_GetFlagStatus() function.  */
380 
381 /* Transmit Flags */
382 #define CAN_FLAG_RQCP0             ((uint32_t)0x00000500)  /*!< Request MailBox0 flag         */
383 #define CAN_FLAG_RQCP1             ((uint32_t)0x00000508)  /*!< Request MailBox1 flag         */
384 #define CAN_FLAG_RQCP2             ((uint32_t)0x00000510)  /*!< Request MailBox2 flag         */
385 #define CAN_FLAG_TXOK0             ((uint32_t)0x00000501)  /*!< Transmission OK MailBox0 flag */
386 #define CAN_FLAG_TXOK1             ((uint32_t)0x00000509)  /*!< Transmission OK MailBox1 flag */
387 #define CAN_FLAG_TXOK2             ((uint32_t)0x00000511)  /*!< Transmission OK MailBox2 flag */
388 #define CAN_FLAG_TME0              ((uint32_t)0x0000051A)  /*!< Transmit mailbox 0 empty flag */
389 #define CAN_FLAG_TME1              ((uint32_t)0x0000051B)  /*!< Transmit mailbox 0 empty flag */
390 #define CAN_FLAG_TME2              ((uint32_t)0x0000051C)  /*!< Transmit mailbox 0 empty flag */
391 
392 /* Receive Flags */
393 #define CAN_FLAG_FF0               ((uint32_t)0x00000203)  /*!< FIFO 0 Full flag    */
394 #define CAN_FLAG_FOV0              ((uint32_t)0x00000204)  /*!< FIFO 0 Overrun flag */
395 
396 #define CAN_FLAG_FF1               ((uint32_t)0x00000403)  /*!< FIFO 1 Full flag    */
397 #define CAN_FLAG_FOV1              ((uint32_t)0x00000404)  /*!< FIFO 1 Overrun flag */
398 
399 /* Operating Mode Flags */
400 #define CAN_FLAG_WKU               ((uint32_t)0x00000103)  /*!< Wake up flag           */
401 #define CAN_FLAG_SLAK              ((uint32_t)0x00000101)  /*!< Sleep acknowledge flag */
402 #define CAN_FLAG_SLAKI             ((uint32_t)0x00000104)  /*!< Sleep acknowledge flag */
403 /* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
404          In this case the SLAK bit can be polled.*/
405 
406 /* Error Flags */
407 #define CAN_FLAG_EWG               ((uint32_t)0x00000300)  /*!< Error warning flag   */
408 #define CAN_FLAG_EPV               ((uint32_t)0x00000301)  /*!< Error passive flag   */
409 #define CAN_FLAG_BOF               ((uint32_t)0x00000302)  /*!< Bus-Off flag         */
410 /**
411   * @}
412   */
413 
414 /** @defgroup CAN_interrupts CAN Interrupts
415   * @{
416   */
417 #define CAN_IT_TME                  ((uint32_t)CAN_IER_TMEIE)   /*!< Transmit mailbox empty interrupt */
418 
419 /* Receive Interrupts */
420 #define CAN_IT_FMP0                 ((uint32_t)CAN_IER_FMPIE0)  /*!< FIFO 0 message pending interrupt */
421 #define CAN_IT_FF0                  ((uint32_t)CAN_IER_FFIE0)   /*!< FIFO 0 full interrupt            */
422 #define CAN_IT_FOV0                 ((uint32_t)CAN_IER_FOVIE0)  /*!< FIFO 0 overrun interrupt         */
423 #define CAN_IT_FMP1                 ((uint32_t)CAN_IER_FMPIE1)  /*!< FIFO 1 message pending interrupt */
424 #define CAN_IT_FF1                  ((uint32_t)CAN_IER_FFIE1)   /*!< FIFO 1 full interrupt            */
425 #define CAN_IT_FOV1                 ((uint32_t)CAN_IER_FOVIE1)  /*!< FIFO 1 overrun interrupt         */
426 
427 /* Operating Mode Interrupts */
428 #define CAN_IT_WKU                  ((uint32_t)CAN_IER_WKUIE)  /*!< Wake-up interrupt           */
429 #define CAN_IT_SLK                  ((uint32_t)CAN_IER_SLKIE)  /*!< Sleep acknowledge interrupt */
430 
431 /* Error Interrupts */
432 #define CAN_IT_EWG                  ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt   */
433 #define CAN_IT_EPV                  ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt   */
434 #define CAN_IT_BOF                  ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt         */
435 #define CAN_IT_LEC                  ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
436 #define CAN_IT_ERR                  ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt           */
437 
438 /**
439   * @}
440   */
441 
442 /* Mailboxes definition */
443 #define CAN_TXMAILBOX_0   ((uint8_t)0x00)
444 #define CAN_TXMAILBOX_1   ((uint8_t)0x01)
445 #define CAN_TXMAILBOX_2   ((uint8_t)0x02)
446 
447 /**
448   * @}
449   */
450 
451 /* Exported macros -----------------------------------------------------------*/
452 /** @defgroup CAN_Exported_Macro CAN Exported Macros
453   * @{
454   */
455 
456 /** @brief  Reset CAN handle state.
457   * @param  __HANDLE__: CAN handle.
458   * @retval None
459   */
460 #define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
461 
462 /**
463   * @brief  Enable the specified CAN interrupt.
464   * @param  __HANDLE__: CAN handle.
465   * @param  __INTERRUPT__: CAN Interrupt.
466   * @retval None
467   */
468 #define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
469 
470 /**
471   * @brief  Disable the specified CAN interrupt.
472   * @param  __HANDLE__: CAN handle.
473   * @param  __INTERRUPT__: CAN Interrupt.
474   * @retval None
475   */
476 #define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
477 
478 /**
479   * @brief  Return the number of pending received messages.
480   * @param  __HANDLE__: CAN handle.
481   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
482   * @retval The number of pending message.
483   */
484 #define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
485 ((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
486 
487 /** @brief  Check whether the specified CAN flag is set or not.
488   * @param  __HANDLE__: specifies the CAN Handle.
489   * @param  __FLAG__: specifies the flag to check.
490   *         This parameter can be one of the following values:
491   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
492   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
493   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
494   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
495   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
496   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
497   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
498   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
499   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
500   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
501   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
502   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
503   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
504   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
505   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
506   *            @arg CAN_FLAG_WKU: Wake up Flag
507   *            @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
508   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
509   *            @arg CAN_FLAG_EWG: Error Warning Flag
510   *            @arg CAN_FLAG_EPV: Error Passive Flag
511   *            @arg CAN_FLAG_BOF: Bus-Off Flag
512   * @retval The new state of __FLAG__ (TRUE or FALSE).
513   */
514 #define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
515 ((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
516  (((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
517  (((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
518  (((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
519  ((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
520 
521 /** @brief  Clear the specified CAN pending flag.
522   * @param  __HANDLE__: specifies the CAN Handle.
523   * @param  __FLAG__: specifies the flag to check.
524   *         This parameter can be one of the following values:
525   *            @arg CAN_TSR_RQCP0: Request MailBox0 Flag
526   *            @arg CAN_TSR_RQCP1: Request MailBox1 Flag
527   *            @arg CAN_TSR_RQCP2: Request MailBox2 Flag
528   *            @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
529   *            @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
530   *            @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
531   *            @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
532   *            @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
533   *            @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
534   *            @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
535   *            @arg CAN_FLAG_FF0: FIFO 0 Full Flag
536   *            @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
537   *            @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
538   *            @arg CAN_FLAG_FF1: FIFO 1 Full Flag
539   *            @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
540   *            @arg CAN_FLAG_WKU: Wake up Flag
541   *            @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
542   * @retval The new state of __FLAG__ (TRUE or FALSE).
543   */
544 #define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
545 ((((__FLAG__) >> 8U) == 5)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
546  (((__FLAG__) >> 8U) == 2)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
547  (((__FLAG__) >> 8U) == 4)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
548  (((__FLAG__) >> 8U) == 1)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0)
549 
550 
551 /** @brief  Check whether the specified CAN interrupt source is enabled or not.
552   * @param  __HANDLE__: specifies the CAN Handle.
553   * @param  __INTERRUPT__: specifies the CAN interrupt source to check.
554   *         This parameter can be one of the following values:
555   *            @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
556   *            @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
557   *            @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
558   * @retval The new state of __IT__ (TRUE or FALSE).
559   */
560 #define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
561 
562 /**
563   * @brief  Check the transmission status of a CAN Frame.
564   * @param  __HANDLE__: specifies the CAN Handle.
565   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
566   * @retval The new status of transmission  (TRUE or FALSE).
567   */
568 #define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
569 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
570  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
571  ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
572 
573 
574 
575 /**
576   * @brief  Release the specified receive FIFO.
577   * @param  __HANDLE__: CAN handle.
578   * @param  __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
579   * @retval None
580   */
581 #define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
582 ((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
583 
584 /**
585   * @brief  Cancel a transmit request.
586   * @param  __HANDLE__: specifies the CAN Handle.
587   * @param  __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
588   * @retval None
589   */
590 #define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
591 (((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
592  ((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
593  ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
594 
595 /**
596   * @brief  Enable or disable the DBG Freeze for CAN.
597   * @param  __HANDLE__: specifies the CAN Handle.
598   * @param  __NEWSTATE__: new state of the CAN peripheral.
599   *         This parameter can be: ENABLE (CAN reception/transmission is frozen
600   *         during debug. Reception FIFO can still be accessed/controlled normally)
601   *         or DISABLE (CAN is working during debug).
602   * @retval None
603   */
604 #define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
605 ((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
606 
607 /**
608  * @}
609  */
610 
611 /* Exported functions --------------------------------------------------------*/
612 /** @addtogroup CAN_Exported_Functions CAN Exported Functions
613   * @{
614   */
615 
616 /** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
617  *  @brief    Initialization and Configuration functions
618  * @{
619  */
620 /* addtogroup and de-initialization functions *****************************/
621 HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
622 HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
623 HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
624 void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
625 void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
626 /**
627  * @}
628  */
629 
630 /** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions
631  *  @brief    I/O operation functions
632  * @{
633  */
634 /* IO operation functions *****************************************************/
635 HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
636 HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
637 HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
638 HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
639 HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
640 HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
641 void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
642 void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
643 void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
644 void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
645 /**
646  * @}
647  */
648 
649 /** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
650  *  @brief   CAN Peripheral State functions
651  * @{
652  */
653 /* Peripheral State and Error functions ***************************************/
654 uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
655 HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
656 /**
657  * @}
658  */
659 
660 /**
661  * @}
662  */
663 
664 /* Private types -------------------------------------------------------------*/
665 /* Private constants ---------------------------------------------------------*/
666 /** @defgroup CAN_Private_Constants CAN Private Constants
667   * @{
668   */
669 /** @defgroup CAN_transmit_constants CAN Transmit Constants
670   * @{
671   */
672 #define CAN_TXSTATUS_NOMAILBOX      ((uint8_t)0x04)  /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
673 /**
674   * @}
675   */
676 #define CAN_FLAG_MASK     ((uint32_t)0x000000FF)
677 
678 
679 /**
680   * @}
681   */
682 
683 /* Private macros ------------------------------------------------------------*/
684 /** @defgroup CAN_Private_Macros CAN Private Macros
685   * @{
686   */
687 
688 #define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
689                            ((MODE) == CAN_MODE_LOOPBACK)|| \
690                            ((MODE) == CAN_MODE_SILENT) || \
691                            ((MODE) == CAN_MODE_SILENT_LOOPBACK))
692 
693 #define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
694                          ((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
695 
696 #define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
697 
698 #define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
699 
700 #define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
701 
702 #define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
703 
704 #define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
705                                   ((MODE) == CAN_FILTERMODE_IDLIST))
706 
707 #define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
708                                     ((SCALE) == CAN_FILTERSCALE_32BIT))
709 
710 #define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
711                                   ((FIFO) == CAN_FILTER_FIFO1))
712 
713 #define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
714 
715 #define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
716 
717 #define IS_CAN_STDID(STDID)   ((STDID) <= ((uint32_t)0x7FF))
718 
719 #define IS_CAN_EXTID(EXTID)   ((EXTID) <= ((uint32_t)0x1FFFFFFF))
720 
721 #define IS_CAN_DLC(DLC)       ((DLC) <= ((uint8_t)0x08))
722 
723 #define IS_CAN_IDTYPE(IDTYPE)  (((IDTYPE) == CAN_ID_STD) || \
724                                 ((IDTYPE) == CAN_ID_EXT))
725 
726 #define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
727 
728 #define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
729 
730 /**
731   * @}
732   */
733 
734 /* Private functions ---------------------------------------------------------*/
735 
736 /**
737   * @}
738   */
739 
740 /**
741   * @}
742   */
743 #endif /* CAN1 */
744 
745 #ifdef __cplusplus
746 }
747 #endif
748 
749 #endif /* __STM32L4xx_HAL_CAN_LEGACY_H */
750