1 /** 2 ****************************************************************************** 3 * @file stm32l1xx_hal_lcd.h 4 * @author MCD Application Team 5 * @brief Header file of LCD Controller HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved. 11 * 12 * This software is licensed under terms that can be found in the LICENSE file 13 * in the root directory of this software component. 14 * If no LICENSE file comes with this software, it is provided AS-IS. 15 * 16 ****************************************************************************** 17 */ 18 19 /* Define to prevent recursive inclusion -------------------------------------*/ 20 #ifndef __STM32L1xx_HAL_LCD_H 21 #define __STM32L1xx_HAL_LCD_H 22 23 #ifdef __cplusplus 24 extern "C" { 25 #endif 26 27 /** @addtogroup STM32L1xx_HAL_Driver 28 * @{ 29 */ 30 31 #if defined (STM32L100xB) || defined (STM32L100xBA) || defined (STM32L100xC) ||\ 32 defined (STM32L152xB) || defined (STM32L152xBA) || defined (STM32L152xC) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L152xE) || defined (STM32L152xDX) ||\ 33 defined (STM32L162xC) || defined (STM32L162xCA) || defined (STM32L162xD) || defined (STM32L162xE) || defined (STM32L162xDX) 34 35 /* Includes ------------------------------------------------------------------*/ 36 #include "stm32l1xx_hal_def.h" 37 38 /** @addtogroup LCD 39 * @{ 40 */ 41 42 /* Exported types ------------------------------------------------------------*/ 43 44 /** @defgroup LCD_Exported_Types LCD Exported Types 45 * @{ 46 */ 47 48 /** 49 * @brief LCD Init structure definition 50 */ 51 52 typedef struct 53 { 54 uint32_t Prescaler; /*!< Configures the LCD Prescaler. 55 This parameter can be one value of @ref LCD_Prescaler */ 56 uint32_t Divider; /*!< Configures the LCD Divider. 57 This parameter can be one value of @ref LCD_Divider */ 58 uint32_t Duty; /*!< Configures the LCD Duty. 59 This parameter can be one value of @ref LCD_Duty */ 60 uint32_t Bias; /*!< Configures the LCD Bias. 61 This parameter can be one value of @ref LCD_Bias */ 62 uint32_t VoltageSource; /*!< Selects the LCD Voltage source. 63 This parameter can be one value of @ref LCD_Voltage_Source */ 64 uint32_t Contrast; /*!< Configures the LCD Contrast. 65 This parameter can be one value of @ref LCD_Contrast */ 66 uint32_t DeadTime; /*!< Configures the LCD Dead Time. 67 This parameter can be one value of @ref LCD_DeadTime */ 68 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration. 69 This parameter can be one value of @ref LCD_PulseOnDuration */ 70 uint32_t HighDrive; /*!< Configures the LCD High Drive. 71 This parameter can be one value of @ref LCD_HighDrive */ 72 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode. 73 This parameter can be one value of @ref LCD_BlinkMode */ 74 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency. 75 This parameter can be one value of @ref LCD_BlinkFrequency */ 76 uint32_t MuxSegment; /*!< Enable or disable mux segment. 77 This parameter can be set to ENABLE or DISABLE. */ 78 }LCD_InitTypeDef; 79 80 /** 81 * @brief HAL LCD State structures definition 82 */ 83 typedef enum 84 { 85 HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */ 86 HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ 87 HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ 88 HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */ 89 HAL_LCD_STATE_ERROR = 0x04 /*!< Error */ 90 }HAL_LCD_StateTypeDef; 91 92 /** 93 * @brief UART handle Structure definition 94 */ 95 typedef struct 96 { 97 LCD_TypeDef *Instance; /* LCD registers base address */ 98 99 LCD_InitTypeDef Init; /* LCD communication parameters */ 100 101 HAL_LockTypeDef Lock; /* Locking object */ 102 103 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */ 104 105 __IO uint32_t ErrorCode; /* LCD Error code */ 106 107 }LCD_HandleTypeDef; 108 109 /** 110 * @} 111 */ 112 113 /* Exported constants --------------------------------------------------------*/ 114 115 /** @defgroup LCD_Exported_Constants LCD Exported Constants 116 * @{ 117 */ 118 119 /** @defgroup LCD_Error_Codes LCD Error Codes 120 * @{ 121 */ 122 123 #define HAL_LCD_ERROR_NONE (0x00U) /*!< No error */ 124 #define HAL_LCD_ERROR_FCRSF (0x01U) /*!< Synchro flag timeout error */ 125 #define HAL_LCD_ERROR_UDR (0x02U) /*!< Update display request flag timeout error */ 126 #define HAL_LCD_ERROR_UDD (0x04U) /*!< Update display done flag timeout error */ 127 #define HAL_LCD_ERROR_ENS (0x08U) /*!< LCD enabled status flag timeout error */ 128 #define HAL_LCD_ERROR_RDY (0x10U) /*!< LCD Booster ready timeout error */ 129 130 /** 131 * @} 132 */ 133 134 /** @defgroup LCD_Prescaler LCD Prescaler 135 * @{ 136 */ 137 138 #define LCD_PRESCALER_1 (0x00000000U) /*!< CLKPS = LCDCLK */ 139 #define LCD_PRESCALER_2 (0x00400000U) /*!< CLKPS = LCDCLK/2 */ 140 #define LCD_PRESCALER_4 (0x00800000U) /*!< CLKPS = LCDCLK/4 */ 141 #define LCD_PRESCALER_8 (0x00C00000U) /*!< CLKPS = LCDCLK/8 */ 142 #define LCD_PRESCALER_16 (0x01000000U) /*!< CLKPS = LCDCLK/16 */ 143 #define LCD_PRESCALER_32 (0x01400000U) /*!< CLKPS = LCDCLK/32 */ 144 #define LCD_PRESCALER_64 (0x01800000U) /*!< CLKPS = LCDCLK/64 */ 145 #define LCD_PRESCALER_128 (0x01C00000U) /*!< CLKPS = LCDCLK/128 */ 146 #define LCD_PRESCALER_256 (0x02000000U) /*!< CLKPS = LCDCLK/256 */ 147 #define LCD_PRESCALER_512 (0x02400000U) /*!< CLKPS = LCDCLK/512 */ 148 #define LCD_PRESCALER_1024 (0x02800000U) /*!< CLKPS = LCDCLK/1024 */ 149 #define LCD_PRESCALER_2048 (0x02C00000U) /*!< CLKPS = LCDCLK/2048 */ 150 #define LCD_PRESCALER_4096 (0x03000000U) /*!< CLKPS = LCDCLK/4096 */ 151 #define LCD_PRESCALER_8192 (0x03400000U) /*!< CLKPS = LCDCLK/8192 */ 152 #define LCD_PRESCALER_16384 (0x03800000U) /*!< CLKPS = LCDCLK/16384 */ 153 #define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */ 154 155 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \ 156 ((__PRESCALER__) == LCD_PRESCALER_2) || \ 157 ((__PRESCALER__) == LCD_PRESCALER_4) || \ 158 ((__PRESCALER__) == LCD_PRESCALER_8) || \ 159 ((__PRESCALER__) == LCD_PRESCALER_16) || \ 160 ((__PRESCALER__) == LCD_PRESCALER_32) || \ 161 ((__PRESCALER__) == LCD_PRESCALER_64) || \ 162 ((__PRESCALER__) == LCD_PRESCALER_128) || \ 163 ((__PRESCALER__) == LCD_PRESCALER_256) || \ 164 ((__PRESCALER__) == LCD_PRESCALER_512) || \ 165 ((__PRESCALER__) == LCD_PRESCALER_1024) || \ 166 ((__PRESCALER__) == LCD_PRESCALER_2048) || \ 167 ((__PRESCALER__) == LCD_PRESCALER_4096) || \ 168 ((__PRESCALER__) == LCD_PRESCALER_8192) || \ 169 ((__PRESCALER__) == LCD_PRESCALER_16384) || \ 170 ((__PRESCALER__) == LCD_PRESCALER_32768)) 171 172 /** 173 * @} 174 */ 175 176 /** @defgroup LCD_Divider LCD Divider 177 * @{ 178 */ 179 180 #define LCD_DIVIDER_16 (0x00000000U) /*!< LCD frequency = CLKPS/16 */ 181 #define LCD_DIVIDER_17 (0x00040000U) /*!< LCD frequency = CLKPS/17 */ 182 #define LCD_DIVIDER_18 (0x00080000U) /*!< LCD frequency = CLKPS/18 */ 183 #define LCD_DIVIDER_19 (0x000C0000U) /*!< LCD frequency = CLKPS/19 */ 184 #define LCD_DIVIDER_20 (0x00100000U) /*!< LCD frequency = CLKPS/20 */ 185 #define LCD_DIVIDER_21 (0x00140000U) /*!< LCD frequency = CLKPS/21 */ 186 #define LCD_DIVIDER_22 (0x00180000U) /*!< LCD frequency = CLKPS/22 */ 187 #define LCD_DIVIDER_23 (0x001C0000U) /*!< LCD frequency = CLKPS/23 */ 188 #define LCD_DIVIDER_24 (0x00200000U) /*!< LCD frequency = CLKPS/24 */ 189 #define LCD_DIVIDER_25 (0x00240000U) /*!< LCD frequency = CLKPS/25 */ 190 #define LCD_DIVIDER_26 (0x00280000U) /*!< LCD frequency = CLKPS/26 */ 191 #define LCD_DIVIDER_27 (0x002C0000U) /*!< LCD frequency = CLKPS/27 */ 192 #define LCD_DIVIDER_28 (0x00300000U) /*!< LCD frequency = CLKPS/28 */ 193 #define LCD_DIVIDER_29 (0x00340000U) /*!< LCD frequency = CLKPS/29 */ 194 #define LCD_DIVIDER_30 (0x00380000U) /*!< LCD frequency = CLKPS/30 */ 195 #define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */ 196 197 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \ 198 ((__DIVIDER__) == LCD_DIVIDER_17) || \ 199 ((__DIVIDER__) == LCD_DIVIDER_18) || \ 200 ((__DIVIDER__) == LCD_DIVIDER_19) || \ 201 ((__DIVIDER__) == LCD_DIVIDER_20) || \ 202 ((__DIVIDER__) == LCD_DIVIDER_21) || \ 203 ((__DIVIDER__) == LCD_DIVIDER_22) || \ 204 ((__DIVIDER__) == LCD_DIVIDER_23) || \ 205 ((__DIVIDER__) == LCD_DIVIDER_24) || \ 206 ((__DIVIDER__) == LCD_DIVIDER_25) || \ 207 ((__DIVIDER__) == LCD_DIVIDER_26) || \ 208 ((__DIVIDER__) == LCD_DIVIDER_27) || \ 209 ((__DIVIDER__) == LCD_DIVIDER_28) || \ 210 ((__DIVIDER__) == LCD_DIVIDER_29) || \ 211 ((__DIVIDER__) == LCD_DIVIDER_30) || \ 212 ((__DIVIDER__) == LCD_DIVIDER_31)) 213 214 /** 215 * @} 216 */ 217 218 219 /** @defgroup LCD_Duty LCD Duty 220 * @{ 221 */ 222 223 #define LCD_DUTY_STATIC (0x00000000U) /*!< Static duty */ 224 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */ 225 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */ 226 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */ 227 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */ 228 229 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \ 230 ((__DUTY__) == LCD_DUTY_1_2) || \ 231 ((__DUTY__) == LCD_DUTY_1_3) || \ 232 ((__DUTY__) == LCD_DUTY_1_4) || \ 233 ((__DUTY__) == LCD_DUTY_1_8)) 234 235 /** 236 * @} 237 */ 238 239 240 /** @defgroup LCD_Bias LCD Bias 241 * @{ 242 */ 243 244 #define LCD_BIAS_1_4 (0x00000000U) /*!< 1/4 Bias */ 245 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */ 246 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */ 247 248 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \ 249 ((__BIAS__) == LCD_BIAS_1_2) || \ 250 ((__BIAS__) == LCD_BIAS_1_3)) 251 /** 252 * @} 253 */ 254 255 /** @defgroup LCD_Voltage_Source LCD Voltage Source 256 * @{ 257 */ 258 259 #define LCD_VOLTAGESOURCE_INTERNAL (0x00000000U) /*!< Internal voltage source for the LCD */ 260 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */ 261 262 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \ 263 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL)) 264 265 /** 266 * @} 267 */ 268 269 /** @defgroup LCD_Interrupts LCD Interrupts 270 * @{ 271 */ 272 #define LCD_IT_SOF LCD_FCR_SOFIE 273 #define LCD_IT_UDD LCD_FCR_UDDIE 274 275 /** 276 * @} 277 */ 278 279 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration 280 * @{ 281 */ 282 283 #define LCD_PULSEONDURATION_0 (0x00000000U) /*!< Pulse ON duration = 0 pulse */ 284 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */ 285 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */ 286 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */ 287 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */ 288 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */ 289 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */ 290 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */ 291 292 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \ 293 ((__DURATION__) == LCD_PULSEONDURATION_1) || \ 294 ((__DURATION__) == LCD_PULSEONDURATION_2) || \ 295 ((__DURATION__) == LCD_PULSEONDURATION_3) || \ 296 ((__DURATION__) == LCD_PULSEONDURATION_4) || \ 297 ((__DURATION__) == LCD_PULSEONDURATION_5) || \ 298 ((__DURATION__) == LCD_PULSEONDURATION_6) || \ 299 ((__DURATION__) == LCD_PULSEONDURATION_7)) 300 /** 301 * @} 302 */ 303 304 /** @defgroup LCD_HighDrive LCD HighDrive 305 * @{ 306 */ 307 308 #define LCD_HIGHDRIVE_0 (0x00000000U) /*!< Low resistance Drive */ 309 #define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */ 310 311 #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \ 312 ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1)) 313 /** 314 * @} 315 */ 316 317 /** @defgroup LCD_DeadTime LCD Dead Time 318 * @{ 319 */ 320 321 #define LCD_DEADTIME_0 (0x00000000U) /*!< No dead Time */ 322 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */ 323 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */ 324 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */ 325 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */ 326 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */ 327 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */ 328 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */ 329 330 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \ 331 ((__TIME__) == LCD_DEADTIME_1) || \ 332 ((__TIME__) == LCD_DEADTIME_2) || \ 333 ((__TIME__) == LCD_DEADTIME_3) || \ 334 ((__TIME__) == LCD_DEADTIME_4) || \ 335 ((__TIME__) == LCD_DEADTIME_5) || \ 336 ((__TIME__) == LCD_DEADTIME_6) || \ 337 ((__TIME__) == LCD_DEADTIME_7)) 338 /** 339 * @} 340 */ 341 342 /** @defgroup LCD_BlinkMode LCD Blink Mode 343 * @{ 344 */ 345 346 #define LCD_BLINKMODE_OFF (0x00000000U) /*!< Blink disabled */ 347 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */ 348 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to 349 8 pixels according to the programmed duty) */ 350 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */ 351 352 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \ 353 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \ 354 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \ 355 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM)) 356 /** 357 * @} 358 */ 359 360 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency 361 * @{ 362 */ 363 364 #define LCD_BLINKFREQUENCY_DIV8 (0x00000000U) /*!< The Blink frequency = fLCD/8 */ 365 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */ 366 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */ 367 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */ 368 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */ 369 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */ 370 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */ 371 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */ 372 373 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \ 374 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \ 375 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \ 376 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \ 377 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \ 378 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \ 379 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \ 380 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024)) 381 /** 382 * @} 383 */ 384 385 /** @defgroup LCD_Contrast LCD Contrast 386 * @{ 387 */ 388 389 #define LCD_CONTRASTLEVEL_0 (0x00000000U) /*!< Maximum Voltage = 2.60V */ 390 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */ 391 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */ 392 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */ 393 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */ 394 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */ 395 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */ 396 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */ 397 398 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \ 399 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \ 400 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \ 401 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \ 402 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \ 403 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \ 404 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \ 405 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7)) 406 /** 407 * @} 408 */ 409 410 /** @defgroup LCD_MuxSegment LCD Mux Segment 411 * @{ 412 */ 413 414 #define LCD_MUXSEGMENT_DISABLE (0x00000000U) /*!< SEG pin multiplexing disabled */ 415 #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */ 416 417 #define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \ 418 ((__VALUE__) == LCD_MUXSEGMENT_DISABLE)) 419 /** 420 * @} 421 */ 422 423 /** @defgroup LCD_Flag LCD Flag 424 * @{ 425 */ 426 427 #define LCD_FLAG_ENS LCD_SR_ENS 428 #define LCD_FLAG_SOF LCD_SR_SOF 429 #define LCD_FLAG_UDR LCD_SR_UDR 430 #define LCD_FLAG_UDD LCD_SR_UDD 431 #define LCD_FLAG_RDY LCD_SR_RDY 432 #define LCD_FLAG_FCRSF LCD_SR_FCRSR 433 434 /** 435 * @} 436 */ 437 438 /** @defgroup LCD_RAMRegister LCD RAMRegister 439 * @{ 440 */ 441 442 #define LCD_RAM_REGISTER0 (0x00000000U) /*!< LCD RAM Register 0 */ 443 #define LCD_RAM_REGISTER1 (0x00000001U) /*!< LCD RAM Register 1 */ 444 #define LCD_RAM_REGISTER2 (0x00000002U) /*!< LCD RAM Register 2 */ 445 #define LCD_RAM_REGISTER3 (0x00000003U) /*!< LCD RAM Register 3 */ 446 #define LCD_RAM_REGISTER4 (0x00000004U) /*!< LCD RAM Register 4 */ 447 #define LCD_RAM_REGISTER5 (0x00000005U) /*!< LCD RAM Register 5 */ 448 #define LCD_RAM_REGISTER6 (0x00000006U) /*!< LCD RAM Register 6 */ 449 #define LCD_RAM_REGISTER7 (0x00000007U) /*!< LCD RAM Register 7 */ 450 #define LCD_RAM_REGISTER8 (0x00000008U) /*!< LCD RAM Register 8 */ 451 #define LCD_RAM_REGISTER9 (0x00000009U) /*!< LCD RAM Register 9 */ 452 #define LCD_RAM_REGISTER10 (0x0000000AU) /*!< LCD RAM Register 10 */ 453 #define LCD_RAM_REGISTER11 (0x0000000BU) /*!< LCD RAM Register 11 */ 454 #define LCD_RAM_REGISTER12 (0x0000000CU) /*!< LCD RAM Register 12 */ 455 #define LCD_RAM_REGISTER13 (0x0000000DU) /*!< LCD RAM Register 13 */ 456 #define LCD_RAM_REGISTER14 (0x0000000EU) /*!< LCD RAM Register 14 */ 457 #define LCD_RAM_REGISTER15 (0x0000000FU) /*!< LCD RAM Register 15 */ 458 459 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \ 460 ((__REGISTER__) == LCD_RAM_REGISTER1) || \ 461 ((__REGISTER__) == LCD_RAM_REGISTER2) || \ 462 ((__REGISTER__) == LCD_RAM_REGISTER3) || \ 463 ((__REGISTER__) == LCD_RAM_REGISTER4) || \ 464 ((__REGISTER__) == LCD_RAM_REGISTER5) || \ 465 ((__REGISTER__) == LCD_RAM_REGISTER6) || \ 466 ((__REGISTER__) == LCD_RAM_REGISTER7) || \ 467 ((__REGISTER__) == LCD_RAM_REGISTER8) || \ 468 ((__REGISTER__) == LCD_RAM_REGISTER9) || \ 469 ((__REGISTER__) == LCD_RAM_REGISTER10) || \ 470 ((__REGISTER__) == LCD_RAM_REGISTER11) || \ 471 ((__REGISTER__) == LCD_RAM_REGISTER12) || \ 472 ((__REGISTER__) == LCD_RAM_REGISTER13) || \ 473 ((__REGISTER__) == LCD_RAM_REGISTER14) || \ 474 ((__REGISTER__) == LCD_RAM_REGISTER15)) 475 476 /** 477 * @} 478 */ 479 480 /** 481 * @} 482 */ 483 484 /* Exported macro ------------------------------------------------------------*/ 485 486 /** @defgroup LCD_Exported_Macros LCD Exported Macros 487 * @{ 488 */ 489 490 /** @brief Reset LCD handle state 491 * @param __HANDLE__ specifies the LCD Handle. 492 * @retval None 493 */ 494 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET) 495 496 /** @brief macros to enables or disables the LCD 497 * @param __HANDLE__ specifies the LCD Handle. 498 * @retval None 499 */ 500 #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) 501 #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN)) 502 503 /** @brief Macros to enable or disable the low resistance divider. Displays with high 504 * internal resistance may need a longer drive time to achieve 505 * satisfactory contrast. This function is useful in this case if some 506 * additional power consumption can be tolerated. 507 * @param __HANDLE__ specifies the LCD Handle. 508 * @note When this mode is enabled, the PulseOn Duration (PON) have to be 509 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1). 510 * @retval None 511 */ 512 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \ 513 do{ \ 514 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ 515 LCD_WaitForSynchro(__HANDLE__); \ 516 }while(0) 517 518 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \ 519 do{ \ 520 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \ 521 LCD_WaitForSynchro(__HANDLE__); \ 522 }while(0) 523 524 /** 525 * @brief Macro to configure the LCD pulses on duration. 526 * @param __HANDLE__ specifies the LCD Handle. 527 * @param __DURATION__ specifies the LCD pulse on duration in terms of 528 * CK_PS (prescaled LCD clock period) pulses. 529 * This parameter can be one of the following values: 530 * @arg LCD_PULSEONDURATION_0: 0 pulse 531 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS 532 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS 533 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS 534 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS 535 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS 536 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS 537 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS 538 * @retval None 539 */ 540 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \ 541 do{ \ 542 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \ 543 LCD_WaitForSynchro(__HANDLE__); \ 544 }while(0) 545 546 /** 547 * @brief Macro to configure the LCD dead time. 548 * @param __HANDLE__ specifies the LCD Handle. 549 * @param __DEADTIME__ specifies the LCD dead time. 550 * This parameter can be one of the following values: 551 * @arg LCD_DEADTIME_0: No dead Time 552 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame 553 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame 554 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame 555 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame 556 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame 557 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame 558 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame 559 * @retval None 560 */ 561 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \ 562 do{ \ 563 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \ 564 LCD_WaitForSynchro(__HANDLE__); \ 565 }while(0) 566 567 /** 568 * @brief Macro to configure the LCD Contrast. 569 * @param __HANDLE__ specifies the LCD Handle. 570 * @param __CONTRAST__ specifies the LCD Contrast. 571 * This parameter can be one of the following values: 572 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V 573 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V 574 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V 575 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V 576 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V 577 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V 578 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V 579 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V 580 * @retval None 581 */ 582 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \ 583 do{ \ 584 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \ 585 LCD_WaitForSynchro(__HANDLE__); \ 586 } while(0) 587 588 /** 589 * @brief Macro to configure the LCD Blink mode and Blink frequency. 590 * @param __HANDLE__ specifies the LCD Handle. 591 * @param __BLINKMODE__ specifies the LCD blink mode. 592 * This parameter can be one of the following values: 593 * @arg LCD_BLINKMODE_OFF: Blink disabled 594 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel) 595 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8 596 * pixels according to the programmed duty) 597 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM 598 * (all pixels) 599 * @param __BLINKFREQUENCY__ specifies the LCD blink frequency. 600 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8 601 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16 602 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32 603 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64 604 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128 605 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256 606 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512 607 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024 608 * @retval None 609 */ 610 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \ 611 do{ \ 612 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \ 613 LCD_WaitForSynchro(__HANDLE__); \ 614 }while(0) 615 616 /** @brief Enables or disables the specified LCD interrupt. 617 * @param __HANDLE__ specifies the LCD Handle. 618 * @param __INTERRUPT__ specifies the LCD interrupt source to be enabled or disabled. 619 * This parameter can be one of the following values: 620 * @arg LCD_IT_SOF: Start of Frame Interrupt 621 * @arg LCD_IT_UDD: Update Display Done Interrupt 622 * @retval None 623 */ 624 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ 625 do{ \ 626 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ 627 LCD_WaitForSynchro(__HANDLE__); \ 628 }while(0) 629 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ 630 do{ \ 631 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \ 632 LCD_WaitForSynchro(__HANDLE__); \ 633 }while(0) 634 635 /** @brief Checks whether the specified LCD interrupt is enabled or not. 636 * @param __HANDLE__ specifies the LCD Handle. 637 * @param __IT__ specifies the LCD interrupt source to check. 638 * This parameter can be one of the following values: 639 * @arg LCD_IT_SOF: Start of Frame Interrupt 640 * @arg LCD_IT_UDD: Update Display Done Interrupt. 641 * @note If the device is in STOP mode (PCLK not provided) UDD will not 642 * generate an interrupt even if UDDIE = 1. 643 * If the display is not enabled the UDD interrupt will never occur. 644 * @retval The state of __IT__ (TRUE or FALSE). 645 */ 646 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__)) 647 648 /** @brief Checks whether the specified LCD flag is set or not. 649 * @param __HANDLE__ specifies the LCD Handle. 650 * @param __FLAG__ specifies the flag to check. 651 * This parameter can be one of the following values: 652 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status. 653 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR 654 * goes from 0 to 1. On deactivation it reflects the real status of 655 * LCD so it becomes 0 at the end of the last displayed frame. 656 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at 657 * the beginning of a new frame, at the same time as the display data is 658 * updated. 659 * @arg LCD_FLAG_UDR: Update Display Request flag. 660 * @arg LCD_FLAG_UDD: Update Display Done flag. 661 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status 662 * of the step-up converter. 663 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag. 664 * This flag is set by hardware each time the LCD_FCR register is updated 665 * in the LCDCLK domain. 666 * @retval The new state of __FLAG__ (TRUE or FALSE). 667 */ 668 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) 669 670 /** @brief Clears the specified LCD pending flag. 671 * @param __HANDLE__ specifies the LCD Handle. 672 * @param __FLAG__ specifies the flag to clear. 673 * This parameter can be any combination of the following values: 674 * @arg LCD_FLAG_SOF: Start of Frame Interrupt 675 * @arg LCD_FLAG_UDD: Update Display Done Interrupt 676 * @retval None 677 */ 678 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__)) 679 680 /** 681 * @} 682 */ 683 684 /* Exported functions ------------------------------------------------------- */ 685 686 /** @addtogroup LCD_Exported_Functions 687 * @{ 688 */ 689 690 /** @addtogroup LCD_Exported_Functions_Group1 691 * @{ 692 */ 693 694 /* Initialization/de-initialization methods **********************************/ 695 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd); 696 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd); 697 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd); 698 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd); 699 700 /** 701 * @} 702 */ 703 704 /** @addtogroup LCD_Exported_Functions_Group2 705 * @{ 706 */ 707 708 /* IO operation methods *******************************************************/ 709 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data); 710 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd); 711 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd); 712 713 /** 714 * @} 715 */ 716 717 /** @addtogroup LCD_Exported_Functions_Group3 718 * @{ 719 */ 720 721 /* Peripheral State methods **************************************************/ 722 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd); 723 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd); 724 725 /** 726 * @} 727 */ 728 729 /** 730 * @} 731 */ 732 733 /** @addtogroup LCD_Private_Functions 734 * @{ 735 */ 736 737 /* Private functions ---------------------------------------------------------*/ 738 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd); 739 740 /** 741 * @} 742 */ 743 744 /** 745 * @} 746 */ 747 748 #endif /* STM32L100xB || STM32L100xBA || STM32L100xC ||... || STM32L162xD || STM32L162xE || STM32L162xDX */ 749 750 /** 751 * @} 752 */ 753 754 #ifdef __cplusplus 755 } 756 #endif 757 758 #endif /* __STM32L1xx_HAL_LCD_H */ 759
