1 /** 2 ****************************************************************************** 3 * @file stm32h7xx.h 4 * @author MCD Application Team 5 * @brief CMSIS STM32H7xx Device Peripheral Access Layer Header File. 6 * 7 * The file is the unique include file that the application programmer 8 * is using in the C source code, usually in main.c. This file contains: 9 * - Configuration section that allows to select: 10 * - The STM32H7xx device used in the target application 11 * - To use or not the peripheral's drivers in application code(i.e. 12 * code will be based on direct access to peripheral's registers 13 * rather than drivers API), this option is controlled by 14 * "#define USE_HAL_DRIVER" 15 * 16 ****************************************************************************** 17 * @attention 18 * 19 * Copyright (c) 2017 STMicroelectronics. 20 * All rights reserved. 21 * 22 * This software is licensed under terms that can be found in the LICENSE file 23 * in the root directory of this software component. 24 * If no LICENSE file comes with this software, it is provided AS-IS. 25 * 26 ****************************************************************************** 27 */ 28 29 /** @addtogroup CMSIS 30 * @{ 31 */ 32 33 /** @addtogroup stm32h7xx 34 * @{ 35 */ 36 37 #ifndef STM32H7xx_H 38 #define STM32H7xx_H 39 40 #ifdef __cplusplus 41 extern "C" { 42 #endif /* __cplusplus */ 43 44 /** @addtogroup Library_configuration_section 45 * @{ 46 */ 47 48 /** 49 * @brief STM32 Family 50 */ 51 #if !defined (STM32H7) 52 #define STM32H7 53 #endif /* STM32H7 */ 54 55 56 /* Uncomment the line below according to the target STM32H7 device used in your 57 application 58 */ 59 60 #if !defined (STM32H743xx) && !defined (STM32H753xx) && !defined (STM32H750xx) && !defined (STM32H742xx) && \ 61 !defined (STM32H745xx) && !defined (STM32H745xG) && !defined (STM32H755xx) && !defined (STM32H747xx) && !defined (STM32H747xG)&& !defined (STM32H757xx) && \ 62 !defined (STM32H7A3xx) && !defined (STM32H7A3xxQ) && !defined (STM32H7B3xx) && !defined (STM32H7B3xxQ) && !defined (STM32H7B0xx) && !defined (STM32H7B0xxQ) && \ 63 !defined (STM32H735xx) && !defined (STM32H733xx) && !defined (STM32H730xx) && !defined (STM32H730xxQ) && !defined (STM32H725xx) && !defined (STM32H723xx) 64 /* #define STM32H742xx */ /*!< STM32H742VI, STM32H742ZI, STM32H742AI, STM32H742II, STM32H742BI, STM32H742XI Devices */ 65 /* #define STM32H743xx */ /*!< STM32H743VI, STM32H743ZI, STM32H743AI, STM32H743II, STM32H743BI, STM32H743XI Devices */ 66 /* #define STM32H753xx */ /*!< STM32H753VI, STM32H753ZI, STM32H753AI, STM32H753II, STM32H753BI, STM32H753XI Devices */ 67 /* #define STM32H750xx */ /*!< STM32H750V, STM32H750I, STM32H750X Devices */ 68 /* #define STM32H747xx */ /*!< STM32H747ZI, STM32H747AI, STM32H747II, STM32H747BI, STM32H747XI Devices */ 69 /* #define STM32H747xG */ /*!< STM32H747AG, STM32H747IG, STM32H747BG, STM32H747XG */ 70 /* #define STM32H757xx */ /*!< STM32H757ZI, STM32H757AI, STM32H757II, STM32H757BI, STM32H757XI Devices */ 71 /* #define STM32H745xx */ /*!< STM32H745ZI, STM32H745II, STM32H745BI, STM32H745XI Devices */ 72 /* #define STM32H745xG */ /*!< STM32H745ZG, STM32H745IG, STM32H745BG, STM32H745XG Devices */ 73 /* #define STM32H755xx */ /*!< STM32H755ZI, STM32H755II, STM32H755BI, STM32H755XI Devices */ 74 /* #define STM32H7B0xx */ /*!< STM32H7B0IBTx, STM32H7B0RBTx, STM32H7B0VBTx, STM32H7B0ZBTx Devices */ 75 /* #define STM32H7B0xxQ */ /*!< STM32H7B0ABIxQ, STM32H7B0IBKxQ Devices */ 76 /* #define STM32H7A3xx */ /*!< STM32H7A3IIK6, STM32H7A3IIT6, STM32H7A3NIH6, STM32H7A3RIT6, STM32H7A3VIH6, STM32H7A3VIT6, STM32H7A3ZIT6 */ 77 /* #define STM32H7A3xxQ */ /*!< STM32H7A3QIY6Q, STM32H7A3IIK6Q, STM32H7A3IIT6Q, STM32H7A3LIH6Q, STM32H7A3VIH6Q, STM32H7A3VIT6Q, STM32H7A3AII6Q, STM32H7A3ZIT6Q */ 78 /* #define STM32H7B3xx */ /*!< STM32H7B3IIK6, STM32H7B3IIT6, STM32H7B3NIH6, STM32H7B3RIT6, STM32H7B3VIH6, STM32H7B3VIT6, STM32H7B3ZIT6 */ 79 /* #define STM32H7B3xxQ */ /*!< STM32H7B3QIY6Q, STM32H7B3IIK6Q, STM32H7B3IIT6Q, STM32H7B3LIH6Q, STM32H7B3VIH6Q, STM32H7B3VIT6Q, STM32H7B3AII6Q, STM32H7B3ZIT6Q */ 80 /* #define STM32H735xx */ /*!< STM32H735AGI6, STM32H735IGK6, STM32H735RGV6, STM32H735VGT6, STM32H735VGY6, STM32H735ZGT6 Devices */ 81 /* #define STM32H733xx */ /*!< STM32H733VGH6, STM32H733VGT6, STM32H733ZGI6, STM32H733ZGT6, Devices */ 82 /* #define STM32H730xx */ /*!< STM32H730VBH6, STM32H730VBT6, STM32H730ZBT6, STM32H730ZBI6 Devices */ 83 /* #define STM32H730xxQ */ /*!< STM32H730IBT6Q, STM32H730ABI6Q, STM32H730IBK6Q Devices */ 84 /* #define STM32H725xx */ /*!< STM32H725AGI6, STM32H725IGK6, STM32H725IGT6, STM32H725RGV6, STM32H725VGT6, STM32H725VGY6, STM32H725ZGT6, STM32H725REV6, SM32H725VET6, STM32H725ZET6, STM32H725AEI6, STM32H725IET6, STM32H725IEK6 Devices */ 85 /* #define STM32H723xx */ /*!< STM32H723VGH6, STM32H723VGT6, STM32H723ZGI6, STM32H723ZGT6, STM32H723VET6, STM32H723VEH6, STM32H723ZET6, STM32H723ZEI6 Devices */ 86 #endif 87 88 /* Tip: To avoid modifying this file each time you need to switch between these 89 devices, you can define the device in your toolchain compiler preprocessor. 90 */ 91 92 #if defined(DUAL_CORE) && !defined(CORE_CM4) && !defined(CORE_CM7) 93 #error "Dual core device, please select CORE_CM4 or CORE_CM7" 94 #endif 95 96 #if !defined (USE_HAL_DRIVER) 97 /** 98 * @brief Comment the line below if you will not use the peripherals drivers. 99 In this case, these drivers will not be included and the application code will 100 be based on direct access to peripherals registers 101 */ 102 /*#define USE_HAL_DRIVER */ 103 #endif /* USE_HAL_DRIVER */ 104 105 /** 106 * @brief CMSIS Device version number V1.10.5 107 */ 108 #define __STM32H7xx_CMSIS_DEVICE_VERSION_MAIN (0x01) /*!< [31:24] main version */ 109 #define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB1 (0x0A) /*!< [23:16] sub1 version */ 110 #define __STM32H7xx_CMSIS_DEVICE_VERSION_SUB2 (0x05) /*!< [15:8] sub2 version */ 111 #define __STM32H7xx_CMSIS_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */ 112 #define __STM32H7xx_CMSIS_DEVICE_VERSION ((__STM32H7xx_CMSIS_DEVICE_VERSION_MAIN << 24)\ 113 |(__STM32H7xx_CMSIS_DEVICE_VERSION_SUB1 << 16)\ 114 |(__STM32H7xx_CMSIS_DEVICE_VERSION_SUB2 << 8 )\ 115 |(__STM32H7xx_CMSIS_DEVICE_VERSION_RC)) 116 117 /** 118 * @} 119 */ 120 121 /** @addtogroup Device_Included 122 * @{ 123 */ 124 125 #if defined(STM32H743xx) 126 #include "stm32h743xx.h" 127 #elif defined(STM32H753xx) 128 #include "stm32h753xx.h" 129 #elif defined(STM32H750xx) 130 #include "stm32h750xx.h" 131 #elif defined(STM32H742xx) 132 #include "stm32h742xx.h" 133 #elif defined(STM32H745xx) 134 #include "stm32h745xx.h" 135 #elif defined(STM32H745xG) 136 #include "stm32h745xg.h" 137 #elif defined(STM32H755xx) 138 #include "stm32h755xx.h" 139 #elif defined(STM32H747xx) 140 #include "stm32h747xx.h" 141 #elif defined(STM32H747xG) 142 #include "stm32h747xg.h" 143 #elif defined(STM32H757xx) 144 #include "stm32h757xx.h" 145 #elif defined(STM32H7B0xx) 146 #include "stm32h7b0xx.h" 147 #elif defined(STM32H7B0xxQ) 148 #include "stm32h7b0xxq.h" 149 #elif defined(STM32H7A3xx) 150 #include "stm32h7a3xx.h" 151 #elif defined(STM32H7B3xx) 152 #include "stm32h7b3xx.h" 153 #elif defined(STM32H7A3xxQ) 154 #include "stm32h7a3xxq.h" 155 #elif defined(STM32H7B3xxQ) 156 #include "stm32h7b3xxq.h" 157 #elif defined(STM32H735xx) 158 #include "stm32h735xx.h" 159 #elif defined(STM32H733xx) 160 #include "stm32h733xx.h" 161 #elif defined(STM32H730xx) 162 #include "stm32h730xx.h" 163 #elif defined(STM32H730xxQ) 164 #include "stm32h730xxq.h" 165 #elif defined(STM32H725xx) 166 #include "stm32h725xx.h" 167 #elif defined(STM32H723xx) 168 #include "stm32h723xx.h" 169 #else 170 #error "Please select first the target STM32H7xx device used in your application (in stm32h7xx.h file)" 171 #endif 172 173 /** 174 * @} 175 */ 176 177 /** @addtogroup Exported_types 178 * @{ 179 */ 180 typedef enum 181 { 182 RESET = 0, 183 SET = !RESET 184 } FlagStatus, ITStatus; 185 186 typedef enum 187 { 188 DISABLE = 0, 189 ENABLE = !DISABLE 190 } FunctionalState; 191 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) 192 193 typedef enum 194 { 195 SUCCESS = 0, 196 ERROR = !SUCCESS 197 } ErrorStatus; 198 199 /** 200 * @} 201 */ 202 203 204 /** @addtogroup Exported_macros 205 * @{ 206 */ 207 #define SET_BIT(REG, BIT) ((REG) |= (BIT)) 208 209 #define CLEAR_BIT(REG, BIT) ((REG) &= ~(BIT)) 210 211 #define READ_BIT(REG, BIT) ((REG) & (BIT)) 212 213 #define CLEAR_REG(REG) ((REG) = (0x0)) 214 215 #define WRITE_REG(REG, VAL) ((REG) = (VAL)) 216 217 #define READ_REG(REG) ((REG)) 218 219 #define MODIFY_REG(REG, CLEARMASK, SETMASK) WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK))) 220 221 #define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) 222 223 /* Use of CMSIS compiler intrinsics for register exclusive access */ 224 /* Atomic 32-bit register access macro to set one or several bits */ 225 #define ATOMIC_SET_BIT(REG, BIT) \ 226 do { \ 227 uint32_t val; \ 228 do { \ 229 val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \ 230 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 231 } while(0) 232 233 /* Atomic 32-bit register access macro to clear one or several bits */ 234 #define ATOMIC_CLEAR_BIT(REG, BIT) \ 235 do { \ 236 uint32_t val; \ 237 do { \ 238 val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \ 239 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 240 } while(0) 241 242 /* Atomic 32-bit register access macro to clear and set one or several bits */ 243 #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \ 244 do { \ 245 uint32_t val; \ 246 do { \ 247 val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ 248 } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \ 249 } while(0) 250 251 /* Atomic 16-bit register access macro to set one or several bits */ 252 #define ATOMIC_SETH_BIT(REG, BIT) \ 253 do { \ 254 uint16_t val; \ 255 do { \ 256 val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \ 257 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 258 } while(0) 259 260 /* Atomic 16-bit register access macro to clear one or several bits */ 261 #define ATOMIC_CLEARH_BIT(REG, BIT) \ 262 do { \ 263 uint16_t val; \ 264 do { \ 265 val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \ 266 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 267 } while(0) 268 269 /* Atomic 16-bit register access macro to clear and set one or several bits */ 270 #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \ 271 do { \ 272 uint16_t val; \ 273 do { \ 274 val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \ 275 } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \ 276 } while(0) 277 278 /** 279 * @} 280 */ 281 282 #if defined (USE_HAL_DRIVER) 283 #include "stm32h7xx_hal.h" 284 #endif /* USE_HAL_DRIVER */ 285 286 287 #ifdef __cplusplus 288 } 289 #endif /* __cplusplus */ 290 291 #endif /* STM32H7xx_H */ 292 /** 293 * @} 294 */ 295 296 /** 297 * @} 298 */ 299 300 301 302 303
